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2020 – today
- 2023
[j2]Atsutake Kosuge
, Yao-Chung Hsu, Rei Sumikawa, Mototsugu Hamada, Tadahiro Kuroda, Tomoe Ishikawa:
A 10.7-µJ/Frame 88% Accuracy CIFAR-10 Single-Chip Neuromorphic Field-Programmable Gate Array Processor Featuring Various Nonlinear Functions of Dendrites in the Human Cerebrum. IEEE Micro 43(6): 19-27 (2023)- [c5]Yao-Chung Hsu, Atsutake Kosuge, Rei Sumikawa, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda:
A Fully Synthesized 13.7μJ/Prediction 88% Accuracy CIFAR-10 Single-Chip Data-Reusing Wired-Logic Processor Using Non-Linear Neural Network. ASP-DAC 2023: 182-183 - [c4]Dongzhu Li, Yao-Chung Hsu, Rei Sumikawa, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda:
A 0.13mJ/Prediction CIFAR-100 Raster-Scan- Based Wired-Logic Processor Using Non-Linear Neural Network. ISCAS 2023: 1-5 - [c3]Atsutake Kosuge, Rei Sumikawa, Yao-Chung Hsu, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda:
A 183.4nJ/inference 152.8μW Single-Chip Fully Synthesizable Wired-Logic DNN Processor for Always-On 35 Voice Commands Recognition Application. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j1]Atsutake Kosuge, Yao-Chung Hsu, Mototsugu Hamada, Tadahiro Kuroda:
A 0.61-μJ/Frame Pipelined Wired-logic DNN Processor in 16-nm FPGA Using Convolutional Non-Linear Neural Network. IEEE Open J. Circuits Syst. 3: 4-14 (2022) - [c2]Yao-Chung Hsu, Atsutake Kosuge, Rei Sumikawa, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda:
A 13.7μJ/prediction 88% Accuracy CIFAR-10 Single-Chip Wired-logic Processor in 16-nm FPGA using Non-Linear Neural Network. HCS 2022: 1-14
2010 – 2019
- 2014
- [c1]Yao-Chung Hsu, Chi-Han Lin, Wen-Tsuen Chen:
Design of a Sensing Service Architecture for Internet of Things with Semantic Sensor Selection. UIC/ATC/ScalCom 2014: 290-298
Coauthor Index
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