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T. Schiefelbein

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1990 – 1999

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1995
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H. Pottinger, W. Eatherton, J. Kelly, T. Schiefelbein, L. R. Mullin, R. Ziegler:
Hardware Assists for High Performance Computing Using a Mathematics of Arrays. FPGA 1995: 39-45
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W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottinger, L. R. Mullin, R. Ziegler:
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays. ISCAS 1995: 945-948

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