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Nitin Chaturvedi
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Journal Articles
- 2024
- [j5]Kartik Jhawar, Jugal Gandhi
, Diksha Shekhawat
, Aniket Upadhyay, Avadh Harkishanka, Nitin Chaturvedi, M. Santosh, Jai Gopal Pandey:
Modeling, hardware architecture, and performance analyses of an AEAD-based lightweight cipher. J. Real Time Image Process. 21(2): 32 (2024) - 2021
- [j4]Kanika Monga, Kunal Harbhajanka, Arush Srivastava, Nitin Chaturvedi
, S. Gurunarayanan:
Design of an MTJ/CMOS-Based Asynchronous System for Ultra-Low Power Energy Autonomous Applications. J. Circuits Syst. Comput. 30(4): 2150058:1-2150058:14 (2021) - 2019
- [j3]Kanika, R. Sankara Prasad, Nitin Chaturvedi, S. Gurunarayanan:
A low power high speed MTJ based non-volatile SRAM cell for energy harvesting based IoT applications. Integr. 65: 43-50 (2019) - 2015
- [j2]Nitin Chaturvedi, S. Gurunarayanan:
An efficient adaptive block pinning for multicore architectures. Microprocess. Microsystems 39(3): 181-188 (2015) - [j1]Nitin Chaturvedi, Arun Subramaniyan, S. Gurunarayanan:
An adaptive migration-replication scheme (AMR) for shared cache in chip multiprocessors. J. Supercomput. 71(10): 3904-3933 (2015)
Conference and Workshop Papers
- 2022
- [c7]Kanika Monga, Eesha Karnawat, Nitin Chaturvedi, S. Gurunarayanan:
Design of a Programmable Delay Line with On-Chip Calibration to Achieve Immunity Against Process Variations. VDAT 2022: 408-419 - 2021
- [c6]Tejasvi Alladi
, Vishnu Venkatesh, Vinay Chamola, Nitin Chaturvedi:
Drone-MAP: A Novel Authentication Scheme for Drone-Assisted 5G Networks. INFOCOM Workshops 2021: 1-6 - 2020
- [c5]Kanika Monga, Lakshaya Maheshwari, Nitin Chaturvedi, S. Gurunarayanan:
Twin-Coupled Sense Amplifier to improve margin in 1T-1MTJ based MRAM array. VDAT 2020: 1-4 - 2019
- [c4]Kanika Monga, Akul Malhotra, Nitin Chaturvedi, S. Gurunayaranan:
A Novel Low Power Non-Volatile SRAM Cell with Self Write Termination. ICCCNT 2019: 1-4 - [c3]Kanika Monga, Nitin Chaturvedi:
A CMOS/MTJ Based Novel Non-volatile SRAM Cell with Asynchronous Write Termination for Normally OFF Applications. VDAT 2019: 553-564 - 2018
- [c2]R. Gautham Sundar Ram, Nitin Chaturvedi, Sumeet Saurav, Sanjay Singh:
An FPGA Based Hardware Accelerator for Classification of Handwritten Digits. ISDA (1) 2018: 945-954 - 2016
- [c1]Pranshu Kalra, Shaista Hussain, Nitin Chaturvedi:
An Investigation of Power-Performance Aware Accelerator/Core Allocation Challenges in Dark Silicon Heterogeneous Systems. iNIS 2016: 52-55
Informal and Other Publications
- 2019
- [i1]Kanika Monga, Akul Malhotra, Nitin Chaturvedi, S. Gurunayaranan:
A Novel Low Power Non-Volatile SRAM Cell with Self Write Termination. CoRR abs/1910.04683 (2019)
Coauthor Index
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