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ORCIDScott M. Fairbanks
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2000 – 2009
- 2009
[c10]Scott Fairbanks:
The Lackey Self-Timed Switch-Fabric Design Framework. ASYNC 2009: 45-54- 2007
- [c9]Frankie Liu, Ron Ho, Robert J. Drost, Scott Fairbanks:
On-chip samplers for test and debug of asynchronous circuits. ASYNC 2007: 153-162 - [c8]David Hopkins, Alex Chow, Robert Bosnyak, Bill Coates, Jo C. Ebergen, Scott Fairbanks, Jonathan Gainsley, Ron Ho, Jon K. Lexau, Frankie Liu, Tarik Ono, Justin Schauer, Ivan E. Sutherland, Robert J. Drost:
Circuit Techniques to Enable 430Gb/s/mm2 Proximity Communication. ISSCC 2007: 368-609 - 2005
- [c7]Scott Fairbanks, Simon W. Moore:
Self-Timed Circuitry for Global Clocking. ASYNC 2005: 86-96 - 2004
- [c6]Scott Fairbanks, Simon W. Moore:
Analog Micropipeline Rings for High Precision Timing. ASYNC 2004: 41-50 - 2001
- [c5]Ivan E. Sutherland, Scott Fairbanks:
GasP: A Minimal FIFO Control. ASYNC 2001: 46-53 - [c4]William S. Coates, Jon K. Lexau, Ian W. Jones, Scott M. Fairbanks, Ivan E. Sutherland:
FLEETzero: An Asynchronous Switching Experiment. ASYNC 2001: 173-
1990 – 1999
- 1999
- [j1]Charles E. Molnar, Ian W. Jones, William S. Coates, Jon K. Lexau, Scott M. Fairbanks, Ivan E. Sutherland:
Two FIFO ring performance experiments. Proc. IEEE 87(2): 297-307 (1999) - [c3]Bill Coates, Jo C. Ebergen, Jon K. Lexau, Scott Fairbanks, Ian W. Jones, Alex Ridgway, David Money Harris, Ivan E. Sutherland:
A Counterflow Pipeline Experiment. ASYNC 1999: 161-172 - 1998
- [c2]William S. Coates, Jon K. Lexau, Ian W. Jones, Scott M. Fairbanks, Ivan E. Sutherland:
A FIFO Data Switch Design Experiment. ASYNC 1998: 4- - [c1]Jo C. Ebergen, Scott Fairbanks, Ivan E. Sutherland:
Predicting Performance of Micropipelines Using Charlie Diagrams. ASYNC 1998: 238-246
Coauthor Index
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