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Journal Articles
- 2013
[j1]Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun:
Adaptive Multi-Pulse Program Scheme Based on Tunneling Speed Classification for Next Generation Multi-Bit/Cell NAND FLASH. IEEE J. Solid State Circuits 48(4): 948-959 (2013)
Conference and Workshop Papers
- 2012
- [c4]Daeyeal Lee, Ik Joon Chang, Sangyong Yoon, Joonsuc Jang, Dong-Su Jang, Wook-Ghee Hahn, Jong-Yeol Park, Doo-Gon Kim, Chiweon Yoon, Bong-Soon Lim, ByungJun Min, Sung-Won Yun, Ji-Sang Lee, Il-Han Park, Kyung-Ryun Kim, Jeong-Yun Yun, Youse Kim, Yong-Sung Cho, Kyung-Min Kang, Sang-Hyun Joo, Jin-Young Chun, Jung-No Im, Seunghyuk Kwon, Seokjun Ham, Ansoo Park, Jae-Duk Yu, Nam-Hee Lee, Tae-Sung Lee, Moosung Kim, Hoosung Kim, Ki-Whan Song, Byung-Gil Jeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun:
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. ISSCC 2012: 430-432 - [c3]Seung-Hwan Shin, Dong-Kyo Shim, Jaeyong Jeong, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, Tae-Young Kim, Hyun Wook Park, Hyun-Jun Yoon, Youngsun Song, Yoon-Hee Choi, Sang-Won Shim, Yang-Lo Ahn, Ki-Tae Park, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun:
A new 3-bit programming algorithm using SLC-to-TLC migration for 8MB/s high performance TLC NAND flash memory. VLSIC 2012: 132-133 - [c2]Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun:
Adaptive multi-pulse program scheme based on tunneling speed classification for next generation multi-bit/cell NAND FLASH. VLSIC 2012: 136-137 - 2011
- [c1]Ki-Tae Park, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, In-Mo Kim, Bo-Geun Kim, Min-Seok Kim, Yoon-Hee Choi, Seung-Hwan Shin, Youngson Song, Joo-Yong Park, Jae-Eun Lee, Chang-Gyu Eun, Ho-Chul Lee, Hyeong-Jun Kim, Jun-Hee Lee, Jong-Young Kim, Tae-Min Kweon, Hyun-Jun Yoon, Taehyun Kim, Dong-Kyo Shim, Jongsun Sel, Ji-Yeon Shin, Pansuk Kwak, Jin-Man Han, Keon-Soo Kim, Sungsoo Lee, Youngho Lim, Tae-Sung Jung:
A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology. ISSCC 2011: 212-213
Coauthor Index
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