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Journal Articles
- 2014
[j3]Mingshuo Wang, Fan Ye, Wei Li, Junyan Ren:
A 42fJ 8-bit 1.0-GS/s folding and interpolating ADC with 1GHz signal bandwidth. IEICE Electron. Express 11(2): 20130986 (2014)- [j2]Mingshuo Wang, Li Lin, Fan Ye
, Junyan Ren:
A 7 bit 1 GS/s pipelined folding and interpolating ADC with coarse-stage-free joint encoding. IEICE Electron. Express 11(12): 20140371 (2014) - 2013
- [j1]Zhenyu Wang, Mingshuo Wang, Weiru Gu, Chixiao Chen, Fan Ye, Junyan Ren:
A High-Linearity Pipelined ADC With Opamp Split-Sharing in a Combined Front-End of S/H and MDAC1. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(11): 2834-2844 (2013)
Conference and Workshop Papers
- 2015
- [c5]Rongjin Xu, Yongzhen Chen, Mingshuo Wang, Ning Li, Fan Ye, Junyan Ren:
A 1.5-GS/s 5-bit interpolating ADC with offset averaging and interpolating sharing resistors network. ASICON 2015: 1-4 - 2014
- [c4]Chixiao Chen, Zemin Feng, Huabin Chen, Mingshuo Wang, Jun Xu, Fan Ye, Junyan Ren:
A low-offset calibration-free comparator with a mismatch-suppressed dynamic preamplifier. ISCAS 2014: 2361-2364 - 2012
- [c3]Mingshuo Wang, Tao Lin, Fan Ye, Ning Li, Junyan Ren:
A 1.2 V 1.0-GS/s 8-bit Voltage-Buffer-Free Folding and interpolating ADC. MWSCAS 2012: 274-277 - [c2]Long Cheng, Yu-Jing Lin, Mingshuo Wang, Fan Ye, Ning Li, Junyan Ren:
A cancellation technique for output-dependent delay differences in high-accuracy DACs. MWSCAS 2012: 1104-1107 - 2011
- [c1]Qianqian Ha, Fan Ye, Chixiao Chen, Xiaoshi Zhu, Mingshuo Wang, Yu-Jing Lin, Ning Li, Junyan Ren:
A 4-channel 8-bit 650-MSample/s DAC with interpolation filter for embedded application. ASICON 2011: 492-495
Coauthor Index
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