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Sameer Pawanekar
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Journal Articles
- 2018
- [j1]Sameer Pawanekar, Kalpesh Kapoor, Gaurav Trivedi:
Kapees3: A High-Quality VLSI Placement Tool Using Nesterov's Method for Density Penalty. J. Circuits Syst. Comput. 27(8): 1850122:1-1850122:29 (2018)
Conference and Workshop Papers
- 2021
- [c7]Sameer Pawanekar, Geetanjali Udgirkar:
Performance of Reinforcement Learning Simulation: x86 v/s ARM. ICACDS (1) 2021: 420-430 - 2017
- [c6]Sameer Pawanekar, Gaurav Trivedi:
Fast FPGA Placement Using Analytical Optimization. VDAT 2017: 681-693 - [c5]Sameer Pawanekar, Gaurav Trivedi:
Analytical Partitioning: Improvement over FM. VDAT 2017: 718-730 - 2015
- [c4]Sameer Pawanekar, Gaurav Trivedi:
TSV aware standard cell placement for 3D ICs. VDAT 2015: 1-6 - [c3]Sameer Pawanekar, Gaurav Trivedi:
Net weighing based timing driven standard cell placer. VDAT 2015: 1-6 - [c2]Sameer Pawanekar, Gaurav Trivedi, Kalpesh Kapoor:
A Nonlinear Analytical Optimization Method for Standard Cell Placement of VLSI Circuits. VLSID 2015: 423-428 - 2013
- [c1]Sameer Pawanekar, Kalpesh Kapoor, Gaurav Trivedi:
Kapees: A New Tool for Standard Cell Placement. VDAT 2013: 66-73
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