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Cheng Qian 0006
Person information
- affiliation: National University of Defense Technology, School of Computer, Changsha, Hunan, China
Other persons with the same name
- Cheng Qian — disambiguation page
- Cheng Qian 0001
— IQVIA, Cambridge, MA, USA (and 3 more)
- Cheng Qian 0002 — University of Birmingham, School of Electronic, Electrical and Computer Engineering, UK
- Cheng Qian 0003
— Beihang University, School of Reliability and Systems Engineering, Beijing, China (and 2 more)
- Cheng Qian 0004
— Texas A&M University, Department of Electrical and Computer Engineering, College Station, TX, USA
- Cheng Qian 0005
— Northwestern Polytechnical University, Ningbo Institute, China (and 1 more)
- Cheng Qian 0007
— Towson University, Department of Computer and Information Sciences, Towson, MD, USA (and 1 more)
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2020 – today
- 2020
- [j5]Qi Yu
, Bruce R. Childers, Libo Huang
, Cheng Qian, Zhiying Wang:
HPE: Hierarchical Page Eviction Policy for Unified Memory in GPUs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2461-2474 (2020) - [j4]Qi Yu
, Bruce R. Childers, Libo Huang, Cheng Qian, Zhiying Wang:
A quantitative evaluation of unified memory in GPUs. J. Supercomput. 76(4): 2958-2985 (2020) - [c12]Qi Yu, Bruce R. Childers, Libo Huang, Cheng Qian, Hui Guo, Zhiying Wang:
Coordinated Page Prefetch and Eviction for Memory Oversubscription Management in GPUs. IPDPS 2020: 472-482
2010 – 2019
- 2019
- [c11]Qi Yu, Bruce R. Childers, Libo Huang, Cheng Qian, Zhiying Wang:
Hierarchical Page Eviction Policy for Unified Memory in GPUs. ISPASS 2019: 149-150 - 2018
- [j3]Hui Guo
, Libo Huang, Ya-Shuai Lü, Jianqiao Ma, Cheng Qian, Sheng Ma
, Zhiying Wang:
Accelerating BFS via Data Structure-Aware Prefetching on GPU. IEEE Access 6: 60234-60248 (2018) - [j2]Qi Yu
, Libo Huang, Cheng Qian, Jianqiao Ma, Zhiying Wang:
FC-AMAT: factor-based C-AMAT analysis in memory system measurement. Innov. Syst. Softw. Eng. 14(2): 143-156 (2018) - [j1]Cheng Qian, Libo Huang, Qi Yu, Zhiying Wang:
CHAM: Improving Prefetch Efficiency Using a Composite Hierarchy-Aware Method. J. Circuits Syst. Comput. 27(7): 1850114:1-1850114:34 (2018) - [c10]Cheng Qian, Libo Huang, Qi Yu, Zhiying Wang, Bruce R. Childers:
CMH: compression management for improving capacity in the hybrid memory cube. CF 2018: 121-128 - [c9]Qi Yu, Libo Huang, Hui Guo, Cheng Qian, Sheng Ma, Zhiying Wang:
Improving Branch Prediction Accuracy on Multi-Core Architectures for Big Data. ISPA/IUCC/BDCloud/SocialCom/SustainCom 2018: 377-382 - [c8]Cheng Qian, Bruce R. Childers, Libo Huang, Qi Yu, Zhiying Wang:
HMCSP: Reducing Transaction Latency of CSR-based SPMV in Hybrid Memory Cube. ISPASS 2018: 114-116 - [c7]Qi Yu, Libo Huang, Cheng Qian, Jianqiao Ma, Zhiying Wang:
Evaluating Memory Performance of Emerging Scale-Out Applications Using C-AMAT. ISPASS 2018: 117-119 - 2017
- [c6]Qi Yu, Libo Huang, Cheng Qian, Zhiying Wang:
BC-AMAT: Considering Blocked Time in Memory System Measurement. Conf. Computing Frontiers 2017: 230-236 - [c5]Jianqiao Ma, Qi Yu, Libo Huang, Cheng Qian, Zhiying Wang:
Trace-based method for big data memory characteristics research. ICACCI 2017: 1023-1027 - [c4]Qi Yu, Libo Huang, Cheng Qian, Jianqiao Ma, Zhiying Wang:
Factor-Based C-AMAT Analysis for Memory Optimization. VECoS 2017: 79-91 - 2015
- [c3]Cheng Qian, Libo Huang, Peng Xie, Nong Xiao, Zhiying Wang:
A Study on Non-volatile 3D Stacked Memory for Big Data Applications. ICA3PP (1) 2015: 103-118 - [c2]Cheng Qian, Libo Huang, Peng Xie, Nong Xiao, Zhiying Wang:
Efficient data management on 3D stacked memory for big data applications. IDT 2015: 84-89 - 2014
- [c1]Xin Liu, Li Shen, Cheng Qian, Zhiying Wang:
Dynamic Power Estimation with Hardware Performance Counters Support on Multi-core Platform. ACA 2014: 177-189
Coauthor Index
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