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ORCIDAmit Ranjan Trivedi
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2020 – today
- 2022
[j12]Dinesh Rajasekharan, Amol D. Gaidhane
, Amit Ranjan Trivedi, Yogesh Singh Chauhan:
Ferroelectric FET-Based Implementation of FitzHugh-Nagumo Neuron Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2107-2114 (2022)- [j11]Priyesh Shukla, Ankith Muralidhar, Nick Iliev, Theja Tulabandhula, Sawyer B. Fuller, Amit Ranjan Trivedi:
Ultralow-Power Localization of Insect-Scale Drones: Interplay of Probabilistic Filtering and Compute-in-Memory. IEEE Trans. Very Large Scale Integr. Syst. 30(1): 68-80 (2022) - 2021
- [j10]Shamma Nasrin, Diaa Badawi, Ahmet Enis Çetin, Wilfred Gomes, Amit Ranjan Trivedi:
MF-Net: Compute-In-Memory SRAM for Multibit Precision Inference Using Memory-Immersed Data Conversion and Multiplication-Free Operators. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 1966-1978 (2021) - [j9]Fengchao Zhang, Shubhra Deb Paul, Patanjali SLPSK, Amit Ranjan Trivedi, Swarup Bhunia:
On Database-Free Authentication of Microelectronic Components. IEEE Trans. Very Large Scale Integr. Syst. 29(1): 149-161 (2021) - [c23]Shamma Nasrin, Priyesh Shukla, Shruthi Jaisimha, Amit Ranjan Trivedi:
Compute-in-Memory Upside Down: A Learning Operator Co-Design Perspective for Scalability. DATE 2021: 890-895 - [i9]Shamma Nasrin, Diaa Badawi, Ahmet Enis Çetin, Wilfred Gomes, Amit Ranjan Trivedi:
MF-Net: Compute-In-Memory SRAM for Multibit Precision Inference using Memory-immersed Data Conversion and Multiplication-free Operators. CoRR abs/2102.00035 (2021) - [i8]Priyesh Shukla, Ankith Muralidhar, Nick Iliev, Theja Tulabandhula, Sawyer B. Fuller, Amit Ranjan Trivedi:
Probabilistic Localization of Insect-Scale Drones on Floating-Gate Inverter Arrays. CoRR abs/2102.08247 (2021) - [i7]Shamma Nasrin, Ahish Shylendra, Yuti Kadakia, Nick Iliev, Wilfred Gomes, Theja Tulabandhula, Amit Ranjan Trivedi:
ENOS: Energy-Aware Network Operator Search for Hybrid Digital and Compute-in-Memory DNN Accelerators. CoRR abs/2104.05217 (2021) - [i6]Priyesh Shukla, Shamma Nasrin, Nastaran Darabi, Wilfred Gomes, Amit Ranjan Trivedi:
MC-CIM: Compute-in-Memory with Monte-Carlo Dropouts for Bayesian Edge Intelligence. CoRR abs/2111.07125 (2021) - 2020
- [j8]Bogil Kim, Sungjae Lee, Amit Ranjan Trivedi, William J. Song:
Energy-Efficient Acceleration of Deep Neural Networks on Realtime-Constrained Embedded Edge Devices. IEEE Access 8: 216259-216270 (2020) - [j7]Nick Iliev, Alberto Gianelli, Amit Ranjan Trivedi:
Low Power Speaker Identification by Integrated Clustering and Gaussian Mixture Model Scoring. IEEE Embed. Syst. Lett. 12(1): 9-12 (2020) - [j6]Ahish Shylendra, Priyesh Shukla, Saibal Mukhopadhyay, Swarup Bhunia, Amit Ranjan Trivedi:
Low Power Unsupervised Anomaly Detection by Nonparametric Modeling of Sensor Statistics. IEEE Trans. Very Large Scale Integr. Syst. 28(8): 1833-1843 (2020) - [c22]Shamma Nasrin, Srikanth Ramakrishna, Theja Tulabandhula, Amit Ranjan Trivedi:
Supported-BinaryNet: Bitcell Array-Based Weight Supports for Dynamic Accuracy-Energy Trade-Offs in SRAM-Based Binarized Neural Network. ISCAS 2020: 1-5 - [c21]Priyesh Shukla, Ahish Shylendra, Theja Tulabandhula, Amit Ranjan Trivedi:
MC2RAM: Markov Chain Monte Carlo Sampling in SRAM for Fast Bayesian Inference. ISCAS 2020: 1-5 - [c20]Ahish Shylendra, Priyesh Shukla, Swarup Bhunia, Amit Ranjan Trivedi:
Fault Attack Detection in AES by Monitoring Power Side-Channel Statistics. ISQED 2020: 219-224 - [c19]Ahish Shylendra, Sina Haji Alizad, Priyesh Shukla, Amit Ranjan Trivedi:
Non-parametric Statistical Density Function Synthesizer and Monte Carlo Sampler in CMOS. VLSI Design 2020: 19-24 - [i5]Priyesh Shukla, Ahish Shylendra, Theja Tulabandhula, Amit Ranjan Trivedi:
MC2RAM: Markov Chain Monte Carlo Sampling in SRAM for Fast Bayesian Inference. CoRR abs/2003.02629 (2020) - [i4]Ahish Shylendra, Priyesh Shukla, Saibal Mukhopadhyay, Swarup Bhunia, Amit Ranjan Trivedi:
Low Power Unsupervised Anomaly Detection by Non-Parametric Modeling of Sensor Statistics. CoRR abs/2003.10088 (2020) - [i3]Nick Iliev, Amit Ranjan Trivedi:
Low Latency CMOS Hardware Acceleration for Fully Connected Layers in Deep Neural Networks. CoRR abs/2011.12839 (2020)
2010 – 2019
- 2019
- [j5]Ahish Shylendra, Swarup Bhunia, Amit Ranjan Trivedi:
An Intrinsic and Database-Free Authentication by Exploiting Process Variation in Back-End Capacitors. IEEE Trans. Very Large Scale Integr. Syst. 27(6): 1253-1261 (2019) - [c18]Alberto Gianelli, Nick Iliev, Shamma Nasrin, Mariagrazia Graziano, Amit Ranjan Trivedi:
Low Power Speaker Identification using Look Up-free Gaussian Mixture Model in CMOS. COOL CHIPS 2019: 1-3 - [c17]Shamma Nasrin, Diaa Badawi, Ahmet Enis Çetin, Wilfred Gomes, Amit Ranjan Trivedi:
Towards Co-designing Neural Network Function Approximators with In-SRAM Computing. EMC2@NeurIPS 2019: 40-43 - [c16]Dinesh Rajasekharan, Amit Ranjan Trivedi, Yogesh Singh Chauhan:
Neuromorphic Circuits on FDSOI Technology for Computer Vision Applications. VLSI Design 2019: 504-505 - [c15]Shih-Chang Hung, Nick Iliev, Balajee Vamanan, Amit Ranjan Trivedi:
Self-Organizing Maps-Based Flexible and High-Speed Packet Classification in Software Defined Networking. VLSI Design 2019: 545-546 - [i2]Shamma Nasrin, Srikanth Ramakrishna, Theja Tulabandhula, Amit Ranjan Trivedi:
Supported-BinaryNet: Bitcell Array-based Weight Supports for Dynamic Accuracy-Latency Trade-offs in SRAM-based Binarized Neural Network. CoRR abs/1911.08518 (2019) - 2018
- [c14]Amit Ranjan Trivedi, Ahish Shylendra:
Ultralow power acoustic feature-scoring using gaussian I-V transistors. DAC 2018: 77:1-77:6 - [c13]Ahish Shylendra, Swarup Bhunia, Amit Ranjan Trivedi:
Intrinsic and Database-free Watermarking in ICs by Exploiting Process and Design Dependent Variability in Metal-Oxide-Metal Capacitances. ISLPED 2018: 44:1-44:6 - 2017
- [c12]Nick Iliev, Amit Ranjan Trivedi:
Low Power Spatial Localization of Mobile Sensors with Recurrent Neural Network. ICCD 2017: 297-300 - [c11]Tonmoy Dhar, Swarup Bhunia, Amit Ranjan Trivedi:
A solitary protection measure against scan chain, fault injection, and power analysis attacks on AES. MWSCAS 2017: 575-578 - [c10]Jong Hwan Ko, Yun Long, Mohammad Faisal Amir, Duckhwan Kim, Jaeha Kung, Taesik Na, Amit Ranjan Trivedi, Saibal Mukhopadhyay:
Energy-efficient neural image processing for Internet-of-Things edge devices. MWSCAS 2017: 1069-1072 - 2016
- [j4]Mohammad Faisal Amir, Amit Ranjan Trivedi, Saibal Mukhopadhyay:
Exploration of Si/Ge Tunnel FET Bit Cells for Ultra-low Power Embedded Memory. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(2): 185-197 (2016) - [j3]Denny Lie, Amit Ranjan Trivedi, Saibal Mukhopadhyay:
Impact of Heterogeneous Technology Integration on the Power, Performance, and Quality of a 3D Image Sensor. IEEE Trans. Multi Scale Comput. Syst. 2(1): 61-67 (2016) - [c9]Susmita Dey Manasi, Amit Ranjan Trivedi:
Gate/source-overlapped heterojunction Tunnel FET-based LAMSTAR neural network and its Application to EEG Signal Classification. IJCNN 2016: 955-962 - [c8]Amit Ranjan Trivedi, Susmita Dey Manasi:
A Comparative Study of Si/Ge and GaSb/InAs Tunnel FET-Based Cellular Neural Network. ISVLSI 2016: 685-690 - [i1]Susmita Dey Manasi, M. M. Al Rashid, J. Atulasimha, S. K. Bandyopadhyay, Amit Ranjan Trivedi:
Straintronic magneto-tunneling-junction based ternary content addressable memory. CoRR abs/1610.03902 (2016) - 2015
- [c7]Sravan K. Marella, Amit Ranjan Trivedi, Saibal Mukhopadhyay, Sachin S. Sapatnekar:
Optimization of FinFET-based circuits using a dual gate pitch technique. ICCAD 2015: 758-763 - 2014
- [j2]Amit Ranjan Trivedi, Wen Yueh, Saibal Mukhopadhyay:
In Situ Power Gating Efficiency Learner for Fine-Grained Self-Adaptive Power Gating. IEEE Trans. Circuits Syst. II Express Briefs 61-II(5): 344-348 (2014) - [c6]Amit Ranjan Trivedi, Mohammad Faisal Amir, Saibal Mukhopadhyay:
Ultra-low power electronics with Si/Ge tunnel FET. DATE 2014: 1-6 - 2013
- [c5]Amit Ranjan Trivedi, Abhash Kumar Singh, Sundara Tejaswi Digumarti, Deepak Fulwani, Swagat Kumar:
Design and Implementation of a Smart Wheelchair. AIR 2013: 96:1-96:6 - [c4]Amit Ranjan Trivedi, Sergio Carlo, Saibal Mukhopadhyay:
Exploring tunnel-FET for ultra low power analog applications: a case study on operational transconductance amplifier. DAC 2013: 109:1-109:6 - 2012
- [c3]Amit Ranjan Trivedi, Saibal Mukhopadhyay:
Self-adaptive power gating with test circuit for on-line characterization of energy inflection activity. VTS 2012: 38-43 - [c2]Wen Yueh, Subho Chatterjee, Amit Ranjan Trivedi, Saibal Mukhopadhyay:
On the parametric failures of SRAM in a 3D-die stack considering tier-to-tier supply cross-talk. VTS 2012: 264-269 - 2010
- [c1]Shyam Parthasarathy, Amit Ranjan Trivedi, Saurabh Sirohi, Robert A. Groves, Michael Olsen, Yogesh Singh Chauhan, Michael Carroll, Dan Kerr, Ali Tombak, Phil Mason:
RF SOI Switch FET Design and Modeling Tradeoffs for GSM Applications. VLSI Design 2010: 194-199
2000 – 2009
- 2007
- [j1]Amit Ranjan Trivedi, Supriyo Bandyopadhyay, Marc Cahay:
Switching voltage, dynamic power dissipation and on-to-off conductance ratio of a spin field effect transistor. IET Circuits Devices Syst. 1(6): 395-400 (2007)
Coauthor Index
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