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Václav Simek
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Journal Articles
- 2019
- [j2]Petr Fiser
, Ivo Hálecek, Jan Schmidt, Václav Simek
:
SAT-Based Generation of Optimum Circuits with Polymorphic Behavior Support. J. Circuits Syst. Comput. 28(Supplement-1): 1940010:1-1940010:29 (2019) - 2013
- [j1]Lukás Sekanina, Richard Ruzicka, Zdenek Vasícek, Václav Simek
, Petr Hanácek
:
Implementing A Unique Chip Id On A Reconfigurable Polymorphic Circuit. Inf. Technol. Control. 42(1): 7-14 (2013)
Conference and Workshop Papers
- 2023
- [c27]Richard Ruzicka, Václav Simek, Jan Nevoral:
Polymorphic RTL Computational Elements. DSD 2023: 523-530 - 2022
- [c26]Richard Ruzicka, Václav Simek:
Technology Mapping for PAIG Optimised Polymorphic Circuits. DSD 2022: 801-808 - 2020
- [c25]Adam Crha, Václav Simek, Richard Ruzicka:
KL-cuts influence on optimization of polymorphic circuits based on PAIG rewriting. DDECS 2020: 1-6 - [c24]Jan Nevoral, Václav Simek, Richard Ruzicka:
Power Consumption Analysis of New Generation of Polymorphic Gates. DDECS 2020: 1-6 - 2019
- [c23]Jan Nevoral, Václav Simek
, Richard Ruzicka:
PoLibSi: Path Towards Intrinsically Reconfigurable Components. DSD 2019: 328-334 - [c22]Adam Crha, Václav Simek
, Richard Ruzicka:
PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis. DSD 2019: 335-342 - 2018
- [c21]Jan Nevoral
, Richard Ruzicka, Václav Simek
:
From Ambipolarity to Multifunctionality: Novel Library of Polymorphic Gates Using Double-Gate FETs. DSD 2018: 657-664 - [c20]Adam Crha, Václav Simek
, Richard Ruzicka:
Towards novel format for representation of polymorphic circuits. DTIS 2018: 1-2 - [c19]Petr Fiser, Václav Simek
:
Optimum polymorphic circuits synthesis method. DTIS 2018: 1-6 - [c18]Jan Nevoral
, Richard Ruzicka, Václav Simek
:
CMOS Gates with Second Function. ISVLSI 2018: 82-87 - 2017
- [c17]Bernhard Fritz, Andreas Steininger
, Václav Simek
, Varadan Savulimedu Veeravalli:
Setup for an Experimental Study of Radiation Effects in 65nm CMOS. DSD 2017: 329-336 - [c16]Adam Crha, Richard Ruzicka, Václav Simek
:
Synthesis tool for design of complex polymorphic circuits. DTIS 2017: 1-6 - [c15]Jan Nevoral
, Václav Simek
, Richard Ruzicka:
Compact library of efficient polymorphic gates based on ambipolar transistors. DTIS 2017: 1-6 - 2016
- [c14]Václav Simek
, Radek Tesar, Richard Ruzicka, Adam Crha:
Modelling and physical implementation of ambipolar components based on organic materials. ICM 2016: 341-344 - 2015
- [c13]Václav Simek
, Richard Ruzicka, Adam Crha:
Toward efficient synthesis method of multifunctional logic circuits. ICM 2015: 21-24 - [c12]Adam Crha, Richard Ruzicka, Václav Simek
:
Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates. UKSim 2015: 612-617 - 2014
- [c11]Václav Simek
, Richard Ruzicka, Adam Crha, Radek Tesar:
Implementation of a Cellular Automaton with Globally Switchable Rules. ACRI 2014: 378-387 - [c10]Václav Simek
, Richard Ruzicka:
Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature. EMS 2014: 501-506 - [c9]Radek Tesar, Richard Ruzicka, Václav Simek
:
Resistant Gates for Polymorphic Electronics. EMS 2014: 513-518 - 2012
- [c8]Richard Ruzicka, Václav Simek
:
NAND/NOR gate polymorphism in low temperature environment. DDECS 2012: 34-37 - 2011
- [c7]Richard Ruzicka, Václav Simek
, Lukás Sekanina:
Behavior of CMOS polymorphic circuits in high temperature environment. DDECS 2011: 447-452 - [c6]Richard Ruzicka, Václav Simek
:
Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles. DSD 2011: 205-212 - 2010
- [c5]Václav Simek
, Richard Ruzicka, Lukás Sekanina:
On analysis of fabricated polymorphic circuits. DDECS 2010: 281-284 - 2009
- [c4]Václav Simek
, Radim Dvorak, Frantisek Zboril, Vladimír Drábek:
GPU Accelerated Solver of Time-Dependent Air Pollutant Transport Equations. DSD 2009: 707-713 - [c3]Václav Simek
, Radim Dvorak, Frantisek Zboril, Jirí Kunovsky:
Towards Accelerated Computation of Atmospheric Equations Using CUDA. UKSim 2009: 449-454 - 2008
- [c2]Václav Simek
, Ram Rakesh Asn:
GPU Acceleration of 2D-DWT Image Compression in MATLAB with CUDA. EMS 2008: 274-277 - [c1]Václav Simek
, Michal Kraus, Jirí Kunovsky, Jirí Petrek:
GPU Based Acceleration of Telegraph Equation. UKSim 2008: 629-630
Coauthor Index
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