default search action

combined dblp search
author search
venue search
publication search

ask others

Srinivasa R. Danda

> Home > Persons

Person information

Refine list

refinements active!

zoomed in on ?? of ?? records

view refined list in

export refined list as

showing all ?? records

Journal Articles

see FAQ

What is the meaning of the colors in the publication lists?

1996
[j1]
- view
  authority control:
- export record
  dblp key:
  - journals/tcad/DandaLMPST96
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/DandaLMPST96
Srinivasa R. Danda, Xiaolin Liu, Sreekrishna Madhwapathy, Anand Panyam, Naveed A. Sherwani, Ioannis G. Tollis:
Optimal algorithms for planar over-the-cell routing problems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(11): 1365-1378 (1996)

Conference and Workshop Papers

see FAQ

What is the meaning of the colors in the publication lists?

1995
[c4]
- view
  authority control:
- export record
  dblp key:
  - conf/glvlsi/DandaMSS95
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/DandaMSS95
Srinivasa R. Danda, Sreekrishna Madhwapathy, Naveed A. Sherwani, Aman Sureka:
OPRON: a new approach to planar OTC routing. Great Lakes Symposium on VLSI 1995: 208-212
[c3]
- view
  authority control:
- export record
  dblp key:
  - conf/vlsid/DandaMS95
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsid/DandaMS95
Srinivasa R. Danda, Sreekrishna Madhwapathy, Naveed A. Sherwani:
Optimal algorithms for planar over-the-cell routing in the presence of obstacles. VLSI Design 1995: 3-7
1994
[c2]
- view
  authority control:
- export record
  dblp key:
  - conf/glvlsi/ShanbhagDS94
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/ShanbhagDS94
Arun Shanbhag, Srinivasa R. Danda, Naveed A. Sherwani:
Floorplanning for mixed macro block and standard cell designs. Great Lakes Symposium on VLSI 1994: 26-29
[c1]
- view
  authority control:
- export record
  dblp key:
  - conf/glvlsi/PanyamDMS94
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/PanyamDMS94
Anand Panyam, Srinivasa R. Danda, Sreekrishna Madhwapathy, Naveed A. Sherwani:
An optimal algorithm for maximum two planar subset problem [VLSI layout]. Great Lakes Symposium on VLSI 1994: 80-85

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.