Nobuaki Otsuka

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Yasuhisa Takeyama

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Publications

2008
[c6]
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  - conf/isscc/KawasumiYTHKTSKFFO08
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Atsushi Kawasumi, Tomoaki Yabe, Yasuhisa Takeyama, Osamu Hirabayashi, Keiichi Kushida, Akihito Tohata, Takahiko Sasaki, Akira Katayama, Gou Fukano, Yuki Fujimura, Nobuaki Otsuka:
A Single-Power-Supply 0.7V 1GHz 45nm SRAM with An Asymmetrical Unit-×-ratio Memory Cell. ISSCC 2008: 382-383
[c4]
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  - conf/itc/KatayamaYHTKSO08
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Akira Katayama, Tomoaki Yabe, Osamu Hirabayashi, Yasuhisa Takeyama, Keiichi Kushida, Takahiko Sasaki, Nobuaki Otsuka:
Direct Cell-Stability Test Techniques for an SRAM Macro with Asymmetric Cell-Bias-Voltage Modulation. ITC 2008: 1-7
2006
[j2]
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  - journals/jssc/TakeyamaOHKO06
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Yasuhisa Takeyama, Hiroyuki Otake, Osamu Hirabayashi, Keiichi Kushida, Nobuaki Otsuka:
A low leakage SRAM macro with replica cell biasing scheme. IEEE J. Solid State Circuits 41(4): 815-822 (2006)
2005
[c2]
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  - conf/mtdt/KushidaOHT05
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Keiichi Kushida, Nobuaki Otsuka, Osamu Hirabayashi, Yasuhisa Takeyama:
DFT techniques for memory macro with built-in ECC. MTDT 2005: 109-114
2002
[c1]
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  - conf/itc/HirabayashiSYKTKTO02
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Osamu Hirabayashi, Azuma Suzuki, Tomoaki Yabe, Atsushi Kawasumi, Yasuhisa Takeyama, Keiichi Kushida, Akihito Tohata, Nobuaki Otsuka:
DFT Techniques for Wafer-Level At-Speed Testing of High-Speed SRAMs. ITC 2002: 164-169

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