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Rei-Chin Ju

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2000 – 2009

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2004
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Jiun-In Guo, Rei-Chin Ju, Jia-Wei Chen:
An efficient 2-D DCT/IDCT core design using cyclic convolution and adder-based realization. IEEE Trans. Circuits Syst. Video Technol. 14(4): 416-428 (2004)
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Rei-Chin Ju, Jia-Wei Chen, Jiun-In Guo, Tien-Fu Chen:
A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT. ISCAS (2) 2004: 769-772

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