Daniel Ziener

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Andreas Becher

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Publications

2022
[c33]
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Ali Asghar, Amanda Katherine Robillard, Ilya Tuzov, Andreas Becher, Daniel Ziener:
Using Look Up Table Content as Signatures to Identify IP Cores in Modern FPGAs. ARCS 2022: 132-147
2016
[j4]
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Daniel Ziener, Florian Bauer, Andreas Becher, Christopher Dennl, Klaus Meyer-Wegener, Ute Schürfeld, Jürgen Teich, Jörg-Stephan Vogt, Helmut Weber:
FPGA-Based Dynamically Reconfigurable SQL Query Processing. ACM Trans. Reconfigurable Technol. Syst. 9(4): 25:1-25:24 (2016)
[c25]
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Andreas Becher, Jorge Echavarria, Daniel Ziener, Stefan Wildermann, Jürgen Teich:
A LUT-Based Approximate Adder. FCCM 2016: 27
[c24]
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Jorge Echavarria, Stefan Wildermann, Andreas Becher, Jürgen Teich, Daniel Ziener:
FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs. FPT 2016: 213-216
2015
[c22]
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  - conf/ahs/GleinRBZFTH15
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Robért Glein, Florian Rittner, Andreas Becher, Daniel Ziener, Jürgen Frickel, Jürgen Teich, Albert Heuberger:
Reliability of space-grade vs. COTS SRAM-based FPGA in N-modular redundancy. AHS 2015: 1-8
[c21]
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Andreas Becher, Daniel Ziener, Klaus Meyer-Wegener, Jürgen Teich:
A co-design approach for accelerated SQL query processing via FPGA-based data filtering. FPT 2015: 192-195
2014
[c18]
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  - conf/fpl/BecherBZT14
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Andreas Becher, Florian Bauer, Daniel Ziener, Jürgen Teich:
Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration. FPL 2014: 1-8

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