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Panayiotis Tsanakas
- > Home > Persons > Panayiotis Tsanakas
Publications
- 2005
- [c32]Florina M. Ciorba, Theodore Andronikos, Ioannis Drositis, George K. Papakonstantinou, Panayotis Tsanakas:
Reducing the Communication Cost via Chain Pattern Scheduling. NCA 2005: 186-196 - 2003
- [c30]Theodore Andronikos, Marios Kalathas, Florina M. Ciorba, Panayiotis Theodoropoulos, George K. Papakonstantinou, Panayotis Tsanakas:
Scheduling Nested Loops with the Least Number of Processors. Applied Informatics 2003: 713-718 - 1999
- [j14]Theodore Andronikos, Nectarios Koziris, George K. Papakonstantinou, Panayotis Tsanakas:
Optimal Scheduling for UET/UET-UCT Generalized n-Dimensional Grid Task Graphs. J. Parallel Distributed Comput. 57(2): 140-165 (1999) - 1998
- [c22]Andrew Koulouris, Nectarios Koziris, Theodore Andronikos, George K. Papakonstantinou, Panayiotis Tsanakas:
Automatic generation of a VLSI parallel architecture for QRS detection. EUSIPCO 1998: 1-4 - [c21]Andrew Koulouris, Nectarios Koziris, Theodore Andronikos, George K. Papakonstantinou, Panayotis Tsanakas:
A Parallel Parsing VLSI Architecture for Arbitrary Context Free Grammars. ICPADS 1998: 783- - 1997
- [j10]Theodore Andronikos, Nectarios Koziris, Zacharias Tsiatsoulis, George K. Papakonstantinou, Panayotis Tsanakas:
Lower Time and Processor Bounds for Efficient Mapping of Uniform Dependence Algorithms into Systolic Arrays. Parallel Algorithms Appl. 10(3-4): 177-194 (1997) - [c15]Nectarios Koziris, Theodore Andronikos, George Economakos, George K. Papakonstantinou, Panayotis Tsanakas:
Automatic Hardware Synthesis of Nested Loops Using UET Grids and VHDL. HPCN Europe 1997: 888-897 - [c11]Theodore Andronikos, Nectarios Koziris, George K. Papakonstantinou, Panayotis Tsanakas:
Optimal Scheduling for UET-UCT Generalized n-Dimensional Grid Task Graphs. IPPS 1997: 146-151
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