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Donghyuk Lee
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Publications
- 2018
- [i21]Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin K. Chang, Onur Mutlu:
Adaptive-Latency DRAM: Reducing DRAM Latency by Exploiting Timing Margins. CoRR abs/1805.03047 (2018) - [i19]Kevin K. Chang, Abhijith Kashyap, Hasan Hassan, Saugata Ghose, Kevin Hsieh, Donghyuk Lee, Tianshi Li, Gennady Pekhimenko, Samira Manabi Khan, Onur Mutlu:
Flexible-Latency DRAM: Understanding and Exploiting Latency Variation in Modern DRAM Chips. CoRR abs/1805.03154 (2018) - [i16]Hasan Hassan, Nandita Vijaykumar, Samira Manabi Khan, Saugata Ghose, Kevin K. Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, Onur Mutlu:
SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure. CoRR abs/1805.03195 (2018) - 2017
- [j9]Samira Manabi Khan, Chris Wilkerson, Donghyuk Lee, Alaa R. Alameldeen, Onur Mutlu:
A Case for Memory Content-Based Detection and Mitigation of Data-Dependent Failures in DRAM. IEEE Comput. Archit. Lett. 16(2): 88-93 (2017) - [j7]Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu:
Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms. Proc. ACM Meas. Anal. Comput. Syst. 1(1): 26:1-26:36 (2017) - [c22]Hasan Hassan, Nandita Vijaykumar, Samira Manabi Khan, Saugata Ghose, Kevin K. Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, Onur Mutlu:
SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies. HPCA 2017: 241-252 - [c21]Samira Manabi Khan, Chris Wilkerson, Zhe Wang, Alaa R. Alameldeen, Donghyuk Lee, Onur Mutlu:
Detecting and mitigating data-dependent DRAM failures by exploiting current memory content. MICRO 2017: 27-40 - [c17]Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu:
Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms. SIGMETRICS (Abstracts) 2017: 54 - 2016
- [j6]Donghyuk Lee, Saugata Ghose, Gennady Pekhimenko, Samira Manabi Khan, Onur Mutlu:
Simultaneous Multi-Layer Access: Improving 3D-Stacked Memory Bandwidth at Low Cost. ACM Trans. Archit. Code Optim. 12(4): 63:1-63:29 (2016) - [c15]Samira Manabi Khan, Donghyuk Lee, Onur Mutlu:
PARBOR: An Efficient System-Level Technique to Detect Data-Dependent Failures in DRAM. DSN 2016: 239-250 - [c12]Kevin K. Chang, Abhijith Kashyap, Hasan Hassan, Saugata Ghose, Kevin Hsieh, Donghyuk Lee, Tianshi Li, Gennady Pekhimenko, Samira Manabi Khan, Onur Mutlu:
Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization. SIGMETRICS 2016: 323-336 - [i6]Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin Kai-Wei Chang, Onur Mutlu:
Adaptive-Latency DRAM (AL-DRAM). CoRR abs/1603.08454 (2016) - [i4]Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Saugata Ghose, Onur Mutlu:
Reducing DRAM Latency by Exploiting Design-Induced Latency Variation in Modern DRAM Chips. CoRR abs/1610.09604 (2016) - 2015
- [c10]Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin Kai-Wei Chang, Onur Mutlu:
Adaptive-latency DRAM: Optimizing DRAM timing for the common-case. HPCA 2015: 489-501 - [i1]Donghyuk Lee, Gennady Pekhimenko, Samira Manabi Khan, Saugata Ghose, Onur Mutlu:
Simultaneous Multi Layer Access: A High Bandwidth and Low Cost 3D-Stacked Memory Interface. CoRR abs/1506.03160 (2015) - 2014
- [c5]Samira Manabi Khan, Donghyuk Lee, Yoongu Kim, Alaa R. Alameldeen, Chris Wilkerson, Onur Mutlu:
The efficacy of error mitigation techniques for DRAM retention failures: a comparative experimental study. SIGMETRICS 2014: 519-532
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