José Manuel Cazeaux

◀ ▷ joint publications with Daniele Rossi 0001

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Publications

2014
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Daniele Rossi, Martin Omaña, José Manuel Cazeaux, Cecilia Metra, T. M. Mak:
Clock Faults Induced Min and Max Delay Violations. J. Electron. Test. 30(1): 111-123 (2014)
2009
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  - journals/tvlsi/RossiCOMC09
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Daniele Rossi, José Manuel Cazeaux, Martin Omaña, Cecilia Metra, Abhijit Chatterjee:
Accurate Linear Model for SET Critical Charge Estimation. IEEE Trans. Very Large Scale Integr. Syst. 17(8): 1161-1166 (2009)
2006
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  - conf/date/OmanaCRM06
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Martin Omaña, José Manuel Cazeaux, Daniele Rossi, Cecilia Metra:
Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects. DATE 2006: 170-175
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  - conf/ddecs/MetraROCM06
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Cecilia Metra, Daniele Rossi, Martin Omaña, José Manuel Cazeaux, T. M. Mak:
Can Clock Faults be Detected Through Functional Test? DDECS 2006: 168-173
[c5]
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  - conf/iolts/MetraORCM06
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Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak:
Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation. IOLTS 2006: 17-22
2005
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José Manuel Cazeaux, Daniele Rossi, Cecilia Metra:
Self-Checking Voter for High Speed TMR Systems. J. Electron. Test. 21(4): 377-389 (2005)
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Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak:
The Other Side of the Timing Equation: a Result of Clock Faults. DFT 2005: 169-177
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  - conf/iolts/CazeauxROMC05
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José Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee:
On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. IOLTS 2005: 23-28
2004
[c1]
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  - conf/iolts/CazeauxRM04
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José Manuel Cazeaux, Daniele Rossi, Cecilia Metra:
New High Speed CMOS Self-Checking Voter. IOLTS 2004: 58-66

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