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Lang Zeng
Publications
- 2024
- [j8]Kaili Zhang, Zhongzhen Tong, Xinxin Liang, Chengzhi Wang, You Wang, Yue Zhang, Weisheng Zhao, Lang Zeng, Deming Zhang:
A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1077-1081 (2024) - 2023
- [j6]Kaili Zhang, Deming Zhang, Mingyang Song, Zhipeng Guo, You Wang, Chengzhi Wang, Yue Zhang, Lang Zeng:
A Novel 9T1C-SRAM Compute-In-Memory Macro With Count-Less Pulse-Width Modulation Input and ADC-Less Charge-Integration-Count Output. IEEE Trans. Circuits Syst. I Regul. Pap. 70(10): 3944-3953 (2023) - 2020
- [j4]Kaili Zhang, Deming Zhang, Chengzhi Wang, Lang Zeng, You Wang, Weisheng Zhao:
Compact Modeling and Analysis of Voltage-Gated Spin-Orbit Torque Magnetic Tunnel Junction. IEEE Access 8: 50792-50800 (2020) - [j3]Chengzhi Wang, Deming Zhang, Lang Zeng, Weisheng Zhao:
Design of Magnetic Non-Volatile TCAM With Priority-Decision in Memory Technology for High Speed, Low Power, and High Reliability. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 464-474 (2020) - [c15]Kaili Zhang, Deming Zhang, Chengzhi Wang, Lang Zeng, Weisheng Zhao:
Voltage-Gated Spin-Hall Effect Based Magnetic Non-Volatile Flip-Flop for High Speed, Low Power and Compact Cell Area. ISCAS 2020: 1-5 - 2019
- [j2]Chengzhi Wang, Deming Zhang, Lang Zeng, Erya Deng, Jie Chen, Weisheng Zhao:
A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1454-1464 (2019) - [c13]Chengzhi Wang, Deming Zhang, Lang Zeng, Kaili Zhang, Youguang Zhang, Weisheng Zhao:
Low-Power, High-Speed and High-Density Magnetic Non-Volatile SRAM Design with Voltage-Gated Spin-Orbit Torque. NANOARCH 2019: 1-6 - 2018
- [c12]Chengzhi Wang, Deming Zhang, Lang Zeng, Jie Chen, Weisheng Zhao:
A Novel 15T-4MTJ based Non-volatile Ternary Content-Addressable Memory Cell for High-Speed, Low-Power and High-Reliable Search Operation. APCCAS 2018: 431-434 - [c11]Deming Zhang, Yanchun Hou, Chengzhi Wang, Jie Chen, Lang Zeng, Weisheng Zhao:
Hardware Acceleration Implementation of Sparse Coding Algorithm with Spintronic Devices. NANOARCH 2018: 79-85
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last updated on 2024-04-25 01:59 CEST by the dblp team
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