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Ron Sass
Publications
- 2019
- [c58]Abhi D. Rajagopala, Ron Sass, Andrew G. Schmidt:
Volcan: System Integration of HLS and HMC on FPGAs. ReConFig 2019: 1-2 - 2018
- [c57]Abhi D. Rajagopala, Ron Sass, Andrew G. Schmidt, Matthew French:
Bridging the Gap between Advanced Memory and Heterogeneous Architectures. FCCM 2018: 226 - 2012
- [j11]Andrew G. Schmidt, Neil Steiner, Matthew French, Ron Sass:
HwPMI: An Extensible Performance Monitoring Infrastructure for Improving Hardware Design and Productivity on FPGAs. Int. J. Reconfigurable Comput. 2012: 162404:1-162404:12 (2012) - [j9]Andrew G. Schmidt, William V. Kritikos, Shanyuan Gao, Ron Sass:
An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing. Int. J. Reconfigurable Comput. 2012: 564704:1-564704:15 (2012) - [j8]William V. Kritikos, Andrew G. Schmidt, Ron Sass, Erik K. Anderson, Matthew French:
Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip. Int. J. Reconfigurable Comput. 2012: 872610:1-872610:11 (2012) - [j7]Andrew G. Schmidt, Siddhartha Datta, Ashwin A. Mendon, Ron Sass:
Investigation into scaling I/O bound streaming applications productively with an all-FPGA cluster. Parallel Comput. 38(8): 344-364 (2012) - 2011
- [c42]Andrew G. Schmidt, Bin Huang, Ron Sass, Matthew French:
Checkpoint/Restart and Beyond: Resilient High Performance Computing with FPGAs. FCCM 2011: 162-169 - [c41]William V. Kritikos, Yamuna Rajasekhar, Andrew G. Schmidt, Ron Sass:
A Radix Tree Router for Scalable FPGA Networks. FPL 2011: 76-81 - [c39]Ron Sass, Andrew G. Schmidt, Scott Buscemi:
Reconfigurable Computing Cluster - A Five-Year Perspective of the Project. PARCO 2011: 595-602 - [c38]Andrew G. Schmidt, Ron Sass:
Improving FPGA Design and Evaluation Productivity with a Hardware Performance Monitoring Infrastructure. ReConFig 2011: 422-427 - 2010
- [c37]Shanyuan Gao, Andrew G. Schmidt, Ron Sass:
Impact of reconfigurable hardware on accelerating MPI_Reduce. FPT 2010: 29-36 - [c35]Andrew G. Schmidt, William V. Kritikos, Ron Sass, Erik K. Anderson, Matthew French:
Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip. ReConFig 2010: 334-339 - [c34]Bin Huang, Andrew G. Schmidt, Ashwin A. Mendon, Ron Sass:
Investigating resilient high performance reconfigurable computing with minimally-invasive system monitoring. HPRCTA@SC 2010: 1-8 - 2009
- [j6]Ashwin A. Mendon, Andrew G. Schmidt, Ron Sass:
A Hardware Filesystem Implementation with Multidisk Support. Int. J. Reconfigurable Comput. 2009: 572860:1-572860:13 (2009) - [c32]Andrew G. Schmidt, William V. Kritikos, Rahul R. Sharma, Ron Sass:
AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks. FCCM 2009: 271-274 - [c30]Shanyuan Gao, Andrew G. Schmidt, Ron Sass:
Hardware implementation of MPI_Barrier on an FPGA cluster. FPL 2009: 12-17 - 2008
- [c28]Yamuna Rajasekhar, Yashodhan Phatak, Andrew G. Schmidt, William V. Kritikos, Ron Sass:
FPGA Session Control (FSC): Providing Remote Access to a Cluster of FPGAs. FCCM 2008: 298-299 - [c27]Andrew G. Schmidt, William V. Kritikos, Siddhartha Datta, Ron Sass:
Reconfigurable Computing Cluster Project: Phase I Brief. FCCM 2008: 300-301 - [c26]Yamuna Rajasekhar, William V. Kritikos, Andrew G. Schmidt, Ron Sass:
Teaching FPGA system design via a remote laboratory facility. FPL 2008: 687-690 - 2007
- [c24]Ron Sass, William V. Kritikos, Andrew G. Schmidt, Srinivas Beeravolu, Parag Beeraka:
Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing. FCCM 2007: 127-140 - [c23]Andrew G. Schmidt, Ron Sass:
Quantifying Effective Memory Bandwidth of Platform FPGAs. FCCM 2007: 337-338 - [c21]Andrew G. Schmidt, Ron Sass:
Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores. FPL 2007: 601-604
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