Masahiro Nomura

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Hiroyuki Kobatake

> Home > Persons > Masahiro Nomura

Publications

2011
[j9]
- view
  authority control:
- export record
  dblp key:
  - journals/jssc/TakedaSAAHITNTH11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/TakedaSAAHITNTH11
Koichi Takeda, Toshio Saito, Shinobu Asayama, Yoshiharu Aimoto, Hiroyuki Kobatake, Shinya Ito, Toshifumi Takahashi, Masahiro Nomura, Kiyoshi Takeuchi, Yoshihiro Hayashi:
Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs. IEEE J. Solid State Circuits 46(4): 806-814 (2011)
2006
[j5]
- view
  authority control:
- export record
  dblp key:
  - journals/jssc/TakedaHANNIK06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/TakedaHANNIK06
Koichi Takeda, Yasuhiko Hagihara, Yoshiharu Aimoto, Masahiro Nomura, Yoetsu Nakazawa, Toshio Ishii, Hiroyuki Kobatake:
A read-static-noise-margin-free SRAM cell for low-VDD and high-speed applications. IEEE J. Solid State Circuits 41(1): 113-121 (2006)
[c2]
- view
  authority control:
- export record
  dblp key:
  - conf/isscc/TakedaIHNK06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/TakedaIHNK06
Koichi Takeda, Hidetoshi Ikeda, Yasuhiko Hagihara, Masahiro Nomura, Hiroyuki Kobatake:
Redefinition of Write Margin for Next-Generation SRAM and Write-Margin Monitoring Circuit. ISSCC 2006: 2602-2611

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.