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Adoración Rueda

◀ ▶ joint publications with Esther Rodríguez-Villegas

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Publications

2005
[j15]
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Alberto Yufera, Adoración Rueda, José Maria Muñoz, Ricardo Doldán, Gildas Léger, Esther Rodríguez-Villegas:
A tissue impedance measurement chip for myocardial ischemia detection. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(12): 2620-2628 (2005)
2004
[j14]
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  - journals/jssc/Rodriguez-Villegas04
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Esther Rodríguez-Villegas, Alberto Yúfera, Adoración Rueda:
A 1.25-V micropower Gm-C filter based on FGMOS transistors operating in weak inversion. IEEE J. Solid State Circuits 39(1): 100-111 (2004)
[j13]
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Esther Rodríguez-Villegas, Alberto Yúfera, Adoración Rueda:
A 1-V micropower log-domain integrator based on FGMOS transistors operating in weak inversion. IEEE J. Solid State Circuits 39(1): 256-259 (2004)
2003
[c46]
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  - conf/sbcci/Rodriguez-VillegasYR03
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Esther Rodríguez-Villegas, Alberto Yufera, Adoración Rueda:
A Charge Correction Cell for FGMOS-Based Circuits. SBCCI 2003: 191-
2002
[c41]
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  - conf/icecsys/QuintanaARR02
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José M. Quintana, Maria J. Avedillo, Esther Rodríguez-Villegas, Adoración Rueda:
Threshold-logic-based design of compressors. ICECS 2002: 661-664
[c40]
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  - conf/iscas/Rodriguez-VillegasRY02
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Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera:
A micropower log domain FGMOS filter. ISCAS (3) 2002: 317-320
[c39]
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  - conf/iscas/Rodriguez-VillegasQAR02
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Esther Rodríguez-Villegas, José M. Quintana, Maria J. Avedillo, Adoración Rueda:
High-speed low-power logic gates using floating gates. ISCAS (5) 2002: 389-392
2001
[j7]
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  - journals/vlsi/Rodriguez-Villegas01
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Esther Rodríguez-Villegas, Alberto Yufera, Adoración Rueda:
A Low-Voltage Floating-Gate MOS Biquad. VLSI Design 12(3): 407-414 (2001)
[c33]
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Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yúfera:
A 1.5 V 23 MHz low power FGMOS filter. ICECS 2001: 337-340
[c31]
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Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera:
A 1.25 V FGMOS filter using translinear circuits. ISCAS (1) 2001: 61-64
2000
[j6]
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  - journals/vlsi/Rodriguez-Villegas00
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Esther Rodríguez-Villegas, Maria J. Avedillo, José M. Quintana, Gloria Huertas, Adoración Rueda:
νMOS-based Sorter for Arithmetic Applications. VLSI Design 11(2): 129-136 (2000)
[c21]
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  - conf/sbcci/QuintanaARR00
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José M. Quintana, Maria J. Avedillo, Esther Rodríguez-Villegas, Adoración Rueda:
Efficient νMOS Realization of Threshold Voters for Self-Purging Redundancy. SBCCI 2000: 321-326
1999
[c18]
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  - conf/iscas/Rodriguez-VillegasAQHR99
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Esther Rodríguez-Villegas, Maria J. Avedillo, José M. Quintana, Gloria Huertas, Adoración Rueda:
vMOS-based sorters for multiplier implementations. ISCAS (1) 1999: 338-341

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