Jae Cheol Son

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Jungyul Pyo

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Publications

2018
[c5]
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Min-Su Kim, Ah-Reum Kim, Yong-geol Kim, Chunghee Kim, Dong-Yeop Kim, Jong-Woo Kim, Daeseong Lee, Hyun Lee, Jungyul Pyo, Youngmin Shin, Jae Cheol Son:
Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for Wide Voltage Scaling. ISCAS 2018: 1-5
2016
[c4]
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  - conf/socc/KimKKKKKLCSPSS16
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Min-Su Kim, Chunghee Kim, Yong-geol Kim, Ah-Reum Kim, Jikyum Kim, Juhyun Kang, Daeseong Lee, Changjun Choi, Ilsuk Suh, Jungyul Pyo, Youngmin Shin, Jae Cheol Son:
Single-ended D flip-flop with implicit scan mux for high performance mobile AP. SoCC 2016: 91-95
2015
[c3]
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  - conf/isscc/PyoSLBKKSKOLLLH15
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Jungyul Pyo, Youngmin Shin, Hoi-Jin Lee, Sung-il Bae, Min-Su Kim, Kwangil Kim, Ken Shin, Yohan Kwon, Heungchul Oh, Jaeyoung Lim, Dong-Wook Lee, Jongho Lee, Inpyo Hong, Kyungkuk Chae, Heon-Hee Lee, Sung-Wook Lee, Seongho Song, Chunghee Kim, Jin-Soo Park, Heesoo Kim, Sunghee Yun, Ukrae Cho, Jae Cheol Son, Sungho Park:
23.1 20nm high-K metal-gate heterogeneous 64b quad-core CPUs and hexa-core GPU for high-performance and energy-efficient mobile application processor. ISSCC 2015: 1-3
2013
[j8]
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  - journals/cm/YangPSS13
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Se-Hyun Yang, Jungyul Pyo, Youngmin Shin, Jae Cheol Son:
A 1.6 GHz quad-core application processor manufactured in 32 nm high-k metal gate process for smart mobile devices. IEEE Commun. Mag. 51(4): 94-98 (2013)

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