Karam S. Chatha

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Krishnan Srinivasan

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Publications

2009
[j9]
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Glenn Leary, Krishnan Srinivasan, Krishna Mehta, Karam S. Chatha:
Design of Network-on-Chip Architectures With a Genetic Algorithm-Based Technique. IEEE Trans. Very Large Scale Integr. Syst. 17(5): 674-687 (2009)
2008
[j8]
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  - journals/tcad/ChathakSK08
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Karam S. Chatha, Krishnan Srinivasan, Goran Konjevod:
Automated Techniques for Synthesis of Application-Specific Network-on-Chip Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(8): 1425-1438 (2008)
2007
[j7]
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  - journals/integration/SrinivasanC07
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Krishnan Srinivasan, Karam S. Chatha:
Integer linear programming and heuristic techniques for system-level low power scheduling on multiprocessor architectures under throughput constraints. Integr. 40(3): 326-354 (2007)
[j5]
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  - journals/todaes/OstlerCRS07
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Christopher Ostler, Karam S. Chatha, Vijay Ramamurthi, Krishnan Srinivasan:
ILP and heuristic techniques for system-level design on network processor architectures. ACM Trans. Design Autom. Electr. Syst. 12(4): 48 (2007)
[c33]
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  - conf/aspdac/SrinivasanCK07
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Krishnan Srinivasan, Karam S. Chatha, Goran Konjevod:
Application Specific Network-on-Chip Design with Guaranteed Quality Approximation Algorithms. ASP-DAC 2007: 184-190
2006
[j4]
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Krishnan Srinivasan, Karam S. Chatha, Goran Konjevod:
Linear-programming-based techniques for synthesis of network-on-chip architectures. IEEE Trans. Very Large Scale Integr. Syst. 14(4): 407-420 (2006)
[c24]
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  - conf/codes/SrinivasanC06
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Krishnan Srinivasan, Karam S. Chatha:
Layout aware design of mesh based NoC architectures. CODES+ISSS 2006: 136-141
[c23]
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  - conf/date/SrinivasanC06
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Krishnan Srinivasan, Karam S. Chatha:
A low complexity heuristic for design of custom network-on-chip architectures. DATE 2006: 130-135
[c22]
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  - conf/isqed/SrinivasanC06
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Krishnan Srinivasan, Karam S. Chatha:
A Methodology for Layout Aware Design and Optimization of Custom Network-on-Chip Architectures. ISQED 2006: 352-357
2005
[c21]
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Krishnan Srinivasan, Karam S. Chatha:
SAGA: synthesis technique for guaranteed throughput NoC architectures. ASP-DAC 2005: 489-494
[c20]
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Krishnan Srinivasan, Karam S. Chatha, Goran Konjevod:
An automated technique for topology and route generation of application specific on-chip interconnection networks. ICCAD 2005: 231-237
[c19]
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Krishnan Srinivasan, Karam S. Chatha:
A technique for low energy mapping and routing in network-on-chip architectures. ISLPED 2005: 387-392
[c15]
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Krishnan Srinivasan, Karam S. Chatha:
ISIS: A Genetic Algorithm Based Technique for Custom On-Chip Interconnection Network Synthesis. VLSI Design 2005: 623-628
2004
[c12]
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  - conf/iccd/SrinivasanCK04
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Krishnan Srinivasan, Karam S. Chatha, Goran Konjevod:
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures. ICCD 2004: 422-429
[c11]
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Krishnan Srinivasan, Nagender Telkar, Vijay Ramamurthi, Karam S. Chatha:
System-Level Design Techniques for Throughput and Power Optimization of Multiprocessor SoC Architectures. ISVLSI 2004: 39-45
[c10]
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  - conf/isvlsi/SrinivasanRC04
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Krishnan Srinivasan, Vijay Ramamurthi, Karam S. Chatha:
A Technique for Energy versus Quality of Service Trade-Off for MPEG-2 Decoder. ISVLSI 2004: 313-316
[c7]
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Krishnan Srinivasan, Karam S. Chatha:
An ILP Formulation for System Level Throughput and Power Optimization in Multiprocessor SoC Architectures. VLSI Design 2004: 255-260

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