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Masahiko Takenaka

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Naoya Torii

> Home > Persons > Masahiko Takenaka

Publications

2016
[j12]
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  dblp key:
  - journals/ejisec/ToriiKYITM16
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  - https://dblp.org/rec/journals/ejisec/ToriiKYITM16
Naoya Torii, Hirotaka Kokubo, Dai Yamamoto, Kouichi Itoh, Masahiko Takenaka, Tsutomu Matsumoto:
ASIC implementation of random number generators using SR latches and its evaluation. EURASIP J. Inf. Secur. 2016: 10 (2016)
[j11]
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  - journals/ieicet/ToriiYTM16
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  - https://dblp.org/rec/journals/ieicet/ToriiYTM16
Naoya Torii, Dai Yamamoto, Masahiko Takenaka, Tsutomu Matsumoto:
Experimental Evaluation on the Resistance of Latch PUFs Implemented on ASIC against FIB-Based Invasive Attacks. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(1): 118-129 (2016)
2015
[j9]
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  - journals/jce/YamamotoSIOTIT15
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  - https://dblp.org/rec/journals/jce/YamamotoSIOTIT15
Dai Yamamoto, Kazuo Sakiyama, Mitsugu Iwamoto, Kazuo Ohta, Masahiko Takenaka, Kouichi Itoh, Naoya Torii:
A new method for enhancing variety and maintaining reliability of PUF responses and its evaluation on ASICs. J. Cryptogr. Eng. 5(3): 187-199 (2015)
2014
[c36]
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  dblp key:
  - conf/aina/IzuSTT14
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  - https://dblp.org/rec/conf/aina/IzuSTT14
Tetsuya Izu, Yumi Sakemi, Masahiko Takenaka, Naoya Torii:
A Spoofing Attack against a Cancelable Biometric Authentication Scheme. AINA 2014: 234-239
[c35]
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  - conf/fedcsis/YamamotoTST14
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  - https://dblp.org/rec/conf/fedcsis/YamamotoTST14
Dai Yamamoto, Masahiko Takenaka, Kazuo Sakiyama, Naoya Torii:
Security Evaluation of Bistable Ring PUFs on FPGAs using Differential and Linear Analysis. FedCSIS 2014: 911-918
[c33]
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  - conf/iwsec/YamamotoTST14
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Dai Yamamoto, Masahiko Takenaka, Kazuo Sakiyama, Naoya Torii:
A Technique Using PUFs for Protecting Circuit Layout Designs against Reverse Engineering. IWSEC 2014: 158-173
[i2]
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  - journals/iacr/ToriiYTM14
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Naoya Torii, Dai Yamamoto, Masahiko Takenaka, Tsutomu Matsumoto:
Dynamic Behavior of RS latches using FIB processing and probe connection. IACR Cryptol. ePrint Arch. 2014: 870 (2014)
2013
[c32]
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  dblp key:
  - conf/cardis/KokuboYTIT13
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Hirotaka Kokubo, Dai Yamamoto, Masahiko Takenaka, Kouichi Itoh, Naoya Torii:
Evaluation of ASIC Implementation of Physical Random Number Generators Using RS Latches. CARDIS 2013: 3-15
2005
[j2]
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  - journals/ieicet/MasuiMTT05
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Shoichi Masui, Kenji Mukaida, Masahiko Takenaka, Naoya Torii:
Design Optimization of a High-Speed, Area-Efficient and Low-Power Montgomery Modular Multiplier for RSA Algorithm. IEICE Trans. Electron. 88-C(4): 576-581 (2005)
2002
[c6]
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  dblp key:
  - conf/ches/ItohYTT02
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  - https://dblp.org/rec/conf/ches/ItohYTT02
Kouichi Itoh, Jun Yajima, Masahiko Takenaka, Naoya Torii:
DPA Countermeasures by Improving the Window Method. CHES 2002: 303-317
2001
[c4]
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  dblp key:
  - conf/fse/ShimoyamaYYTIYTT01
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  - https://dblp.org/rec/conf/fse/ShimoyamaYYTIYTT01
Takeshi Shimoyama, Hitoshi Yanami, Kazuhiro Yokoyama, Masahiko Takenaka, Kouichi Itoh, Jun Yajima, Naoya Torii, Hidema Tanaka:
The Block Cipher SC2000. FSE 2001: 312-327
[c3]
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  dblp key:
  - conf/icisc/ItohTT01
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Kouichi Itoh, Masahiko Takenaka, Naoya Torii:
DPA Countermeasure Based on the "Masking Method". ICISC 2001: 440-456
2000
[c2]
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  dblp key:
  - conf/ches/OkadaTIT00
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  - https://dblp.org/rec/conf/ches/OkadaTIT00
Souichi Okada, Naoya Torii, Kouichi Itoh, Masahiko Takenaka:
Implementation of Elliptic Curve Cryptographic Coprocessor over GF(2^m) on an FPGA. CHES 2000: 25-40
1999
[c1]
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  dblp key:
  - conf/ches/ItohTTTK99
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Kouichi Itoh, Masahiko Takenaka, Naoya Torii, Syouji Temma, Yasushi Kurihara:
Fast Implementation of Public-Key Cryptography ona DSP TMS320C6201. CHES 1999: 61-72

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