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Ali Emre Pusane
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Publications
- 2020
- [c74]Muhammed Yaser Yagan, Rifat Kisacik, Tufan Erkinaci, Ali Emre Pusane, Murat Uysal, Tunçer Baykas, Günhan Dündar, Arda Deniz Yalçinkaya:
Experimental Validation of a Novel RLL Code for Visible Light Communication. TSP 2020: 297-300 - 2019
- [j31]Engin Afacan, Günhan Dündar, I. Faik Baskaya, Ali Emre Pusane, Mustafa Berke Yelten:
On Chip Reconfigurable CMOS Analog Circuit Design and Automation Against Aging Phenomena: Sense and React. ACM Trans. Design Autom. Electr. Syst. 24(4): 44:1-44:22 (2019) - [c66]Rifat Kisacik, Baris C. Efe, Ali Emre Pusane, Murat Uysal, Tuncer Baykas, Günhan Dündar, Arda D. Yalcinkaya:
Distance and Power based Experimental Verification of Channel Model in Visible Light Communication. SIU 2019: 1-4 - 2018
- [c62]Izel Cagin Odabasi, Mustafa Berke Yelten, Engin Afacan, I. Faik Baskaya, Ali Emre Pusane, Günhan Dündar:
A Rare Event Based Yield Estimation Methodology for Analog Circuits. DDECS 2018: 33-38 - 2017
- [j21]Engin Afacan, Günhan Dündar, Ali Emre Pusane, Mustafa Berke Yelten, I. Faik Baskaya:
Aging signature properties and an efficient signature determination tool for online monitoring. Integr. 58: 496-503 (2017) - [j20]Ihsan Çiçek, Ali Emre Pusane, Günhan Dündar:
An Integrated Dual Entropy Core True Random Number Generator. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 329-333 (2017) - 2016
- [j18]Giray Kömürcü, Ali Emre Pusane, Günhan Dündar:
Effects of aging and compensation mechanisms in ordering based RO-PUFs. Integr. 52: 71-76 (2016) - [j17]Engin Afacan, Gönenç Berkol, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya:
A lifetime-aware analog circuit sizing tool. Integr. 55: 349-356 (2016) - [j15]Engin Afacan, Gönenç Berkol, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya:
An analog circuit synthesis tool based on efficient and reliable yield estimation. Microelectron. J. 54: 14-22 (2016) - [c43]Engin Afacan, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya:
Semi-empirical aging model development via accelerated aging test. SMACD 2016: 1-4 - [c42]Engin Afacan, Günhan Dündar, Ali Emre Pusane, Faik Piaskaya, Mustafa Berke Yelten:
Efficient signature selection tool for sense & react systems. SMACD 2016: 1-4 - 2015
- [j13]Giray Kömürcü, Ali Emre Pusane, Günhan Dündar:
An efficient grouping method and error probability analysis for RO-PUFs. Comput. Secur. 49: 123-131 (2015) - [j11]Giray Kömürcü, Ali Emre Pusane, Günhan Dündar:
Enhanced challenge-response set and secure usage scenarios for ordering-based ring oscillator-physical unclonable functions. IET Circuits Devices Syst. 9(2): 87-95 (2015) - [c40]Engin Afacan, Gönenç Berkol, Ali Emre Pusane, Günhan Dündar, I. Faik Baskaya:
A hybrid Quasi Monte Carlo method for yield aware analog circuit sizing tool. DATE 2015: 1225-1228 - [c39]Gönenç Berkol, Engin Afacan, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya:
A novel yield aware multi-objective analog circuit optimization tool. ISCAS 2015: 2652-2655 - [c36]Gönenç Berkol, Ahmet Unutulmaz, Engin Afacan, Günhan Dündar, Francisco V. Fernández, Ali Emre Pusane, I. Faik Baskaya:
A two-step layout-in-the-loop design automation tool. NEWCAS 2015: 1-4 - 2014
- [j8]Ihsan Çiçek, Ali Emre Pusane, Günhan Dündar:
A novel design method for discrete time chaos based true random number generators. Integr. 47(1): 38-47 (2014) - 2013
- [c22]Ihsan Çiçek, Ali Emre Pusane, Günhan Dündar:
Field programmable analog array implementation of logistic map. SIU 2013: 1-4 - [c21]Ihsan Çiçek, Ali Emre Pusane, Günhan Dündar:
Random number generation using field programmable analog array implementation of logistic map. SIU 2013: 1-4 - [c19]Giray Kömürcü, Ali Emre Pusane, Günhan Dündar:
Analysis of Ring Oscillator structures to develop a design methodology for RO-PUF circuits. VLSI-SoC 2013: 332-335 - 2012
- [c14]Ihsan Çiçek, Ali Emre Pusane, Günhan Dündar:
A feasibility study of a 1D chaotic map for True Random Number Generation. SIU 2012: 1-4
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