Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

José Luis Ayala

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Ignacio Arnaldo

> Home > Persons > José Luis Ayala

Publications

2023
[i6]
- view
  - electronic edition via DOI (open access)
  - references & citations
  authority control:
- export record
  dblp key:
  - journals/corr/abs-2303-03779
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-2303-03779
Ignacio Arnaldo, Alfredo Cuesta-Infante, J. Manuel Colmenar, José L. Risco-Martín, José L. Ayala:
Boosting the 3D thermal-aware floorplanning problem through a master-worker parallel MOEA. CoRR abs/2303.03779 (2023)
2013
[j18]
- view
  authority control:
- export record
  dblp key:
  - journals/concurrency/ArnaldoCCRA13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/concurrency/ArnaldoCCRA13
Ignacio Arnaldo, Alfredo Cuesta-Infante, J. Manuel Colmenar, José L. Risco-Martín, José L. Ayala:
Boosting the 3D thermal-aware floorplanning problem through a master-worker parallel MOEA. Concurr. Comput. Pract. Exp. 25(8): 1089-1103 (2013)
2012
[j13]
- view
  authority control:
- export record
  dblp key:
  - journals/iet-cds/ArnaldoRAH12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/iet-cds/ArnaldoRAH12
Ignacio Arnaldo, José Luis Risco-Martín, José Luis Ayala, José Ignacio Hidalgo:
Power profiling-guided floorplanner for 3D multi-processor systems-on-chip. IET Circuits Devices Syst. 6(5): 322-329 (2012)
[c26]
- view
  authority control:
- export record
  dblp key:
  - conf/latw/ArnaldoVARHRA12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/latw/ArnaldoVARHRA12
Ignacio Arnaldo, Alessandro Vincenzi, José Luis Ayala, José Luis Risco-Martín, José Ignacio Hidalgo, Martino Ruggiero, David Atienza:
Fast and scalable temperature-driven floorplan design in 3D MPSoCs. LATW 2012: 1-6
2011
[c21]
- view
  authority control:
- export record
  dblp key:
  - conf/patmos/ArnaldoRAH11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/patmos/ArnaldoRAH11
Ignacio Arnaldo, José L. Risco-Martín, José L. Ayala, José Ignacio Hidalgo:
Power Profiling-Guided Floorplanner for Thermal Optimization in 3D Multiprocessor Architectures. PATMOS 2011: 11-21

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.