Xincun Ji

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Zixuan Wang

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Publications

2018
[j21]
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  - journals/ieiceee/WangDXZHJXC18
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Zixuan Wang, Hao Ding, Hao Xu, Cong Zhang, Shanwen Hu, Xincun Ji, Xiaojuan Xia, Zhikuang Cai:
An all-digital phase-locked loop with a PGTA-based TDC and a 0.6-V DCO. IEICE Electron. Express 15(22): 20180889 (2018)
2017
[j20]
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  - journals/ieiceee/WangHCZJWG17
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Zixuan Wang, Shanwen Hu, Zhikuang Cai, Bo Zhou, Xincun Ji, Rong Wang, Yufeng Guo:
A 2.4-GHz all-digital phase-locked loop with a pipeline-ΔΣ time-to-digital converter. IEICE Electron. Express 14(6): 20170095 (2017)
[j19]
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Xincun Ji, Xiaojuan Xia, Zixuan Wang, Leisheng Jin:
A 2.4 GHz fractional-N PLL with a low-power true single-phase clock prescaler. IEICE Electron. Express 14(8): 20170065 (2017)
2013
[j12]
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  - journals/ieiceee/WuWJH13
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Jianhui Wu, Zixuan Wang, Xincun Ji, Cheng Huang:
A low-power high-speed true single phase clock divide-by-2/3 prescaler. IEICE Electron. Express 10(2): 20120913 (2013)
[j11]
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Zixuan Wang, Jianhui Wu, Xincun Ji:
A high-resolution stochastic time-to-digital converter with edge-interchange scheme. IEICE Electron. Express 10(9): 20130211 (2013)
[j8]
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Zixuan Wang, Jianhui Wu, Qing Chen, Xincun Ji:
A MASH 1-1-1 ΔΣ time-to-digital converter based on two-stage time quantization. IEICE Electron. Express 10(24): 20130729 (2013)
2011
[j5]
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  - journals/ieiceee/HuangWJWZ11
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Fuqing Huang, Jianhui Wu, Xincun Ji, Zixuan Wang, Meng Zhang:
A CMOS voltage controlled oscillator topology for suppression of flicker noise up-conversion. IEICE Electron. Express 8(13): 1056-1063 (2011)

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