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ORCIDKosuke Mizuno
- > Home > Persons > Kosuke Mizuno
Publications
- 2013
[j3]Kosuke Mizuno, Kenta Takagi
, Yosuke Terachi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A Sub-100 mW Dual-Core HOG Accelerator VLSI for Parallel Feature Extraction Processing for HDTV Resolution Video. IEICE Trans. Electron. 96-C(4): 433-443 (2013)- [j2]Kosuke Mizuno, Yosuke Terachi, Kenta Takagi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
An FPGA Implementation of a HOG-based Object Detection Processor. IPSJ Trans. Syst. LSI Des. Methodol. 6: 42-51 (2013) - [c6]Kenta Takagi, Kosuke Mizuno, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A sub-100-milliwatt dual-core HOG accelerator VLSI for real-time multiple object detection. ICASSP 2013: 2533-2537 - 2012
- [c4]Kosuke Mizuno, Yosuke Terachi, Kenta Takagi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Architectural Study of HOG Feature Extraction Processor for Real-Time Object Detection. SiPS 2012: 197-202 - 2011
- [j1]Kosuke Mizuno, Hiroki Noguchi, Guangji He, Yosuke Terachi, Tetsuya Kamino, Tsuyoshi Fujinaga, Shintaro Izumi, Yasuo Ariki, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A Low-Power Real-Time SIFT Descriptor Generation Engine for Full-HDTV Video Recognition. IEICE Trans. Electron. 94-C(4): 448-457 (2011) - 2010
- [c3]Kosuke Mizuno, Hiroki Noguchi, Guangji He, Yosuke Terachi, Tetsuya Kamino, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Fast and Low-Memory-Bandwidth Architecture of SIFT Descriptor Generation with Scalability on Speed and Accuracy for VGA Video. FPL 2010: 608-611 - 2008
- [c2]Kosuke Mizuno, Junichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi, Masahiko Yoshimoto:
An H.264/AVC MP@L4.1 quarter-pel motion estimation processor VLSI for real-time MBAFF encoding. ICECS 2008: 1179-1182 - [c1]Yuichiro Murachi, Kosuke Mizuno, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Tetsuya Kamino, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A sub 100 mW H.264/AVC MP@L4.1 integer-pel motion estimation processor VLSI for MBAFF encoding. ISCAS 2008: 848-851
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