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ORCIDSarita V. Adve
- > Home > Persons > Sarita V. Adve
Publications
- 2002
[j9]Christopher J. Hughes, Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve:
RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors. Computer 35(2): 40-49 (2002)- 2001
- [c22]Vijay S. Pai, Sarita V. Adve:
Comparing and Combining Read Miss Clustering and Software Prefetching. IEEE PACT 2001: 292-303 - 2000
- [j8]Vijay S. Pai, Sarita V. Adve:
Code Transformations to Improve Memory Parallelism. J. Instr. Level Parallelism 2 (2000) - 1999
- [j7]Sarita V. Adve, Vijay S. Pai, Parthasarathy Ranganathan:
Recent advances in memory consistency models for hardware shared memory systems. Proc. IEEE 87(3): 445-455 (1999) - [j6]Vijay S. Pai, Parthasarathy Ranganathan, Hazim Abdel-Shafi, Sarita V. Adve:
The Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors. IEEE Trans. Computers 48(2): 218-226 (1999) - [c18]Murthy Durbhakula, Vijay S. Pai, Sarita V. Adve:
Improving the Accuracy vs. Speed Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors. HPCA 1999: 23-32 - [c16]Vijay S. Pai, Sarita V. Adve:
Code Transformations to Improve Memory Parallelism. MICRO 1999: 147-155 - 1998
- [c12]Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mary K. Vernon, David A. Wood:
Analytic Evaluation of Shared-memory Systems with ILP Processors. ISCA 1998: 380-391 - 1997
- [j4]Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve:
RSIM: Rice simulator for ILP multiprocessors. SIGARCH Comput. Archit. News 25(5): 1 (1997) - [c11]Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve:
The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology. HPCA 1997: 72-83 - [c9]Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abdel-Shafi, Sarita V. Adve:
The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems. ISCA 1997: 144-156 - [c8]Parthasarathy Ranganathan, Vijay S. Pai, Sarita V. Adve:
Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap Between Memory Consistency Models. SPAA 1997: 199-210 - [c7]Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve:
RSIM: a simulator for shared-memory multiprocessor and uniprocessor systems that exploit ILP. WCAE@HPCA 1997: 6 - 1996
- [c6]Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve, Tracy Harton:
An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors. ASPLOS 1996: 12-23
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