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Sayak Ray
Publications
- 2024
- [c20]Debayan Das, Majid Sabbagh, Rana Elnaggar, Guang Chen, Sayak Ray, Jason M. Fung:
Optimal Placement of TDC Sensor for Enhanced Power Side-Channel Assessment on FPGAS. VLSID 2024: 443-448 - 2023
- [j2]Mohammad Rahmani Fadiheh, Alex Wezel, Johannes Müller, Jörg Bormann, Sayak Ray, Jason M. Fung, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz:
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors. IEEE Trans. Computers 72(1): 222-235 (2023) - [c19]Anupam Golder, Debayan Das, Santosh Ghosh, Avinash Varna, Majid Sabbagh, Sayak Ray, Rana Elnaggar, Joseph Friel, Daniel Dinu, Jason M. Fung:
Power Side-Channel Vulnerability Assessment of Lightweight Cryptographic Scheme, XOODYAK. DAC 2023: 1-6 - [c18]Tobias Jauch, Alex Wezel, Mohammad Rahmani Fadiheh, Philipp Schmitz, Sayak Ray, Jason M. Fung, Christopher W. Fletcher, Dominik Stoffel, Wolfgang Kunz:
Secure-by-Construction Design Methodology for CPUs: Implementing Secure Speculation on the RTL. ICCAD 2023: 1-9 - 2022
- [c17]Ryan Kastner, Francesco Restuccia, Andres Meza, Sayak Ray, Jason M. Fung, Cynthia Sturton:
Automating hardware security property generation: invited. DAC 2022: 1384-1387 - 2021
- [i2]Mohammad Rahmani Fadiheh, Alex Wezel, Johannes Müller, Jörg Bormann, Sayak Ray, Jason M. Fung, Subhasish Mitra, Dominik Stoffel, Wolfgang Kunz:
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors. CoRR abs/2108.01979 (2021) - 2019
- [c16]Sayak Ray, Nishant Ghosh, Ramya Jayaram Masti, Arun K. Kanuparthi, Jason M. Fung:
Formal Verification of Security Critical Hardware-Firmware Interactions in Commercial SoCs. DAC 2019: 43 - 2018
- [c14]Bo-Yuan Huang, Sayak Ray, Aarti Gupta, Jason M. Fung, Sharad Malik:
Formal security verification of concurrent firmware in SoCs using instruction-level abstraction for hardware. DAC 2018: 91:1-91:6
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last updated on 2024-04-21 17:50 CEST by the dblp team
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