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ORCIDGiuseppe Scotti
- > Home > Persons > Giuseppe Scotti
Publications
- 2024
[j75]Riccardo Della Sala
, Francesco Centurelli, Giuseppe Scotti, Gaetano Palumbo:
Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications. IEEE Access 12: 4642-4659 (2024)- [j74]Riccardo Della Sala, Francesco Centurelli, Giuseppe Scotti:
A Novel High Performance Standard-Cell Based ULV OTA Exploiting an Improved Basic Amplifier. IEEE Access 12: 17513-17521 (2024) - 2023
- [j73]Riccardo Della Sala, Francesco Centurelli, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti:
A 0.3V Rail-to-Rail Three-Stage OTA With High DC Gain and Improved Robustness to PVT Variations. IEEE Access 11: 19635-19644 (2023) - [j72]Riccardo Della Sala, Giuseppe Scotti:
Exploiting the DD-Cell as an Ultra-Compact Entropy Source for an FPGA-Based Re-Configurable PUF-TRNG Architecture. IEEE Access 11: 86178-86195 (2023) - [j71]Riccardo Della Sala, Giuseppe Scotti:
A Novel FPGA Implementation of the NAND-PUF with Minimal Resource Usage and High Reliability. Cryptogr. 7(2): 18 (2023) - [j70]Riccardo Della Sala, Francesco Centurelli, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti:
A body-driven rail-to-rail 0.3 V operational transconductance amplifier exploiting current gain stages. Int. J. Circuit Theory Appl. 51(5): 1971-1987 (2023) - [c62]Riccardo Della Sala, Giuseppe Scotti:
On Enhancing the Throughput of the Latched Ring Oscillator TRNG on FPGA. ApplePies 2023: 277-283 - 2022
- [j66]Riccardo Della Sala, Francesco Centurelli, Giuseppe Scotti:
A Novel Differential to Single-Ended Converter for Ultra-Low-Voltage Inverter-Based OTAs. IEEE Access 10: 98179-98190 (2022) - [j63]Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti:
High-Throughput FPGA-Compatible TRNG Architecture Exploiting Multistimuli Metastable Cells. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 4886-4897 (2022) - [j62]Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti:
A Novel Ultra-Compact FPGA-Compatible TRNG Architecture Exploiting Latched Ring Oscillators. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 1672-1676 (2022) - [j61]Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti:
A Lightweight FPGA Compatible Weak-PUF Primitive Based on XOR Gates. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2972-2976 (2022) - [j60]Riccardo Della Sala, Francesco Centurelli, Giuseppe Scotti:
Enabling ULV Fully Synthesizable Analog Circuits: The BA Cell, a Standard-Cell-Based Building Block for Analog Design. IEEE Trans. Circuits Syst. II Express Briefs 69(12): 4689-4693 (2022) - [c60]Riccardo Della Sala, Francesco Centurelli, Pietro Monsurrò, Giuseppe Scotti:
High-efficiency 0.3V OTA in CMOS 130nm technology using current mirrors with gain. PRIME 2022: 69-72 - [c59]Riccardo Della Sala, Francesco Centurelli, Pietro Monsurrò, Giuseppe Scotti:
Sub-μW Front-End Low Noise Amplifier for Neural Recording Applications. PRIME 2022: 305-308 - [c58]Riccardo Della Sala, Giuseppe Scotti:
The DD-Cell: a Double Side Entropic Source exploitable as PUF and TRNG. PRIME 2022: 353-356 - 2021
- [j59]Davide Bellizia, Riccardo Della Sala, Giuseppe Scotti:
SC-DDPL as a Countermeasure against Static Power Side-Channel Attacks. Cryptogr. 5(3): 16 (2021) - [j58]Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti:
A Novel Ultra-Compact FPGA PUF: The DD-PUF. Cryptogr. 5(3): 23 (2021) - 2019
- [c56]Riccardo Della Sala, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti:
Area-Efficient Low-Power Bandpass Gm-C Filter for Epileptic Seizure Detection in 130nm CMOS. ICECS 2019: 298-301
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