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Eugenio Villar

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Pablo Sánchez

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Publications

2011
[j12]
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  - journals/jolpe/CalvoGDPSVAM11
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  - https://dblp.org/rec/journals/jolpe/CalvoGDPSVAM11
Daniel Calvo, Pablo González, Luis Diaz, Hector Posadas, Pablo Sánchez, Eugenio Villar, Andrea Acquaviva, Enrico Macii:
A Multi-Processing Systems-on-Chip Native Simulation Framework for Power and Thermal-Aware Design. J. Low Power Electron. 7(1): 2-16 (2011)
2006
[c12]
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  - conf/aspdac/PosadasASVB06
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  - https://dblp.org/rec/conf/aspdac/PosadasASVB06
Hector Posadas, Jesús Ádamez, Pablo Sánchez, Eugenio Villar, Francisco Blasco:
POSIX modeling in SystemC. ASP-DAC 2006: 485-490
2004
[j6]
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  - journals/dafes/PosadasHFSVB04
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  - https://dblp.org/rec/journals/dafes/PosadasHFSVB04
Hector Posadas, Fernando Herrera, Víctor Fernández, Pablo Sánchez, Eugenio Villar, Francisco Blasco:
Single Source Design Environment for Embedded Systems Based on SystemC. Des. Autom. Embed. Syst. 9(4): 293-312 (2004)
[c8]
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  - conf/date/PosadasHSVB04
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Hector Posadas, Fernando Herrera, Pablo Sánchez, Eugenio Villar, Francisco Blasco:
System-Level Performance Analysis in SystemC. DATE 2004: 378-383
[c7]
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  - electronic edition @ ecsi-association.org (archived)
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  dblp key:
  - conf/fdl/HerreraSV04
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  - https://dblp.org/rec/conf/fdl/HerreraSV04
Fernando Herrera, Pablo Sánchez, Eugenio Villar:
Heterogeneous System-Level Specification in SystemC. FDL 2004: 404-416
2003
[c6]
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  - conf/date/HerreraPSV03
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Fernando Herrera, Hector Posadas, Pablo Sánchez, Eugenio Villar:
Systemic Embedded Software Generation from SystemC. DATE 2003: 10142-10149
[c5]
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  - conf/fdl/HerreraSV03
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Fernando Herrera, Pablo Sánchez, Eugenio Villar:
Modeling of CSP, KPN and SR Systems with SystemC. FDL 2003: 572-583
[p1]
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  - books/sp/03/HerreraPSV03
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Fernando Herrera, Héctor Posadas, Pablo Sánchez, Eugenio Villar:
Systematic Embedded Software Generation from Systemc. Embedded Software for SoC 2003: 83-93
1998
[j4]
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  - journals/jsa/TabuencaSV98
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Pedro Tabuenca, Pablo Sánchez, Eugenio Villar:
An algorithm for clock cycle selection in behavioral synthesis. J. Syst. Archit. 44(9-10): 773-786 (1998)

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