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Injun Choi
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Publications
- 2024
- [c16]Jaeyoon Sim, Sooyeon Jeon, Injun Choi, Guorong Wu, Won Hwa Kim:
Learning to Approximate Adaptive Kernel Convolution on Graphs. AAAI 2024: 4882-4890 - [c15]Hyuna Cho, Injun Choi, Suha Kwak, Won Hwa Kim:
Interactive Network Perturbation between Teacher and Students for Semi-Supervised Semantic Segmentation. WACV 2024: 615-624 - [i1]Jaeyoon Sim, Sooyeon Jeon, Injun Choi, Guorong Wu, Won Hwa Kim:
Learning to Approximate Adaptive Kernel Convolution on Graphs. CoRR abs/2401.11840 (2024) - 2023
- [j28]Chongsoo Jung, Hoyong Seong, Injun Choi, Sohmyung Ha, Minkyu Je:
A Process-Scalable Ultra-Low-Voltage Sleep Timer With a Time-Domain Amplifier and a Switch-Less Resistance Multiplier. IEEE J. Solid State Circuits 58(10): 2675-2684 (2023) - [j27]Kyeongwon Jeong, Gichan Yun, Jaesuk Choi, Injun Choi, Jeehoon Son, Jae Youn Hwang, Sohmyung Ha, Minkyu Je:
A Wide-Bandwidth Ultrasound Receiver and On-Chip Ultrasound Transmitter for Ultrasound Capsule Endoscopy. IEEE J. Solid State Circuits 58(10): 2778-2789 (2023) - [c14]Edward Jongyoon Choi, Injun Choi, Vincent Lukito, Dong-Hwi Choi, Donghyeon Yi, Ik-Joon Chang, Sohmyung Ha, Minkyu Je:
A 333TOPS/W Logic-Compatible Multi-Level Embedded Flash Compute-In-Memory Macro with Dual-Slope Computation. CICC 2023: 1-2 - [c13]Hoyong Seong, Donghyun Youn, Injun Choi, Junghyup Lee, Sohmyung Ha, Minkyu Je:
A 0.9V 2MHz 6.4x-Slope-Boosted Quadrature-Phase Relaxation Oscillator with 164.2dBc/Hz FoM and 62.5ppm Period Jitter in 0.18μm CMOS. CICC 2023: 1-2 - [c12]Seunghun Baek, Injun Choi, Mustafa Dere, Minjeong Kim, Guorong Wu, Won Hwa Kim:
Learning Covariance-Based Multi-Scale Representation of Neuroimaging Measures for Alzheimer Classification. ISBI 2023: 1-5 - 2022
- [j25]Injun Choi, Edward Jongyoon Choi, Donghyeon Yi, Yoontae Jung, Hoyong Seong, Hyuntak Jeon, Soon-Jae Kweon, Ik-Joon Chang, Sohmyung Ha, Minkyu Je:
An SRAM-Based Hybrid Computation-in-Memory Macro Using Current-Reused Differential CCO. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 536-546 (2022) - [j24]Yoontae Jung, Soon-Jae Kweon, Hyuntak Jeon, Injun Choi, Jimin Koo, Mi Kyung Kim, Hyunjoo Jenny Lee, Sohmyung Ha, Minkyu Je:
A Wide-Dynamic-Range Neural-Recording IC With Automatic-Gain-Controlled AFE and CT Dynamic-Zoom ΔΣ ADC for Saturation-Free Closed-Loop Neural Interfaces. IEEE J. Solid State Circuits 57(10): 3071-3082 (2022) - [c11]Edward Jongyoon Choi, Injun Choi, Chanhee Jeon, Gichan Yun, Donghyeon Yi, Sohmyung Ha, Ik-Joon Chang, Minkyu Je:
A 133.6TOPS/W Compute-In-Memory SRAM Macro with Fully Parallel One-Step Multi-Bit Computation. CICC 2022: 1-2 - [c10]Injun Choi, Guorong Wu, Won Hwa Kim:
How Much to Aggregate: Learning Adaptive Node-Wise Scales on Graphs for Brain Networks. MICCAI (1) 2022: 376-385 - 2021
- [c9]Yoontae Jung, Soon-Jae Kweon, Hyuntak Jeon, Taeju Lee, Injun Choi, Kyeongwon Jeong, Mi Kyung Kim, Hyunjoo Jenny Lee, Sohmyung Ha, Minkyu Je:
A 99.5dB-DR 5kHz-BW Closed-Loop Neural-Recording IC based on Continuous-Time Dynamic-Zoom ΔΣ ADC with Automatic AFE-Gain Control. A-SSCC 2021: 1-3 - [c8]Hyuntak Jeon, Injun Choi, Young-Han Kim, Se-Un Shin, Minkyu Je:
A SiPM Readout IC Embedded in a Boost Converter for Mobile Dosimeters. VLSI Circuits 2021: 1-2 - [c7]Soon-Jae Kweon, Joonho Gil, Chulhyun Park, Sein Oh, Yoontae Jung, Injun Choi, Song-I Cheon, Hung Phan Dang, Ja-Hyuck Koo, Geunhoe Kim, Sohmyung Ha, Minkyu Je:
An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC. VLSI Circuits 2021: 1-2 - 2020
- [j22]Hyuntak Jeon, Injun Choi, Soon-Jae Kweon, Minkyu Je:
A Power-Efficient Radiation Sensor Interface with a Peak-Triggered Sampling Scheme for Mobile Dosimeters. Sensors 20(11): 3255 (2020) - 2019
- [j21]Hyuntak Jeon, Jun-Suk Bang, Yoontae Jung, Injun Choi, Minkyu Je:
A High DR, DC-Coupled, Time-Based Neural-Recording IC With Degeneration R-DAC for Bidirectional Neural Interface. IEEE J. Solid State Circuits 54(10): 2658-2670 (2019) - 2018
- [j20]Injun Choi, Ji-Hoon Kim:
Memory-Reduced Non-Binary LDPC Decoding With Accumulative Bubble Check. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1619-1623 (2018) - [c6]Injun Choi, Ji-Hoon Kim:
A 2.22 Gbps high-throughput NB-LDPC decoder in 65nm CMOS with aggressive overlap scheduling. ASP-DAC 2018: 315-316 - 2017
- [j19]Injun Choi, Ji-Hoon Kim:
High-Throughput Non-Binary LDPC Decoder Based on Aggressive Overlap Scheduling. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(7): 1937-1948 (2017) - 2015
- [j18]Hyeji Kim, Injun Choi, Wooseok Byun, Jong-Yeol Lee, Ji-Hoon Kim:
Distributed CRC Architecture for High-Radix Parallel Turbo Decoding in LTE-Advanced Systems. IEEE Trans. Circuits Syst. II Express Briefs 62-II(9): 906-910 (2015)
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