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Bruce L. Jacob
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- affiliation: University of Maryland, College Park, USA
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2020 – today
- 2022
- [e5]Bruce L. Jacob:
Proceedings of the 2022 International Symposium on Memory Systems, MEMSYS 2022, Washington, DC, USA, October 3-6, 2022. ACM 2022, ISBN 978-1-4503-9800-8 [contents] - [i2]Yuqi Xue, Luyi Kang, Weiwei Jia, Xiaohao Wang, Jongryool Kim, Changhwan Youn, Myeong Joon Kang, Hyung Jin Lim, Bruce L. Jacob, Jian Huang:
Building A Trusted Execution Environment for In-Storage Computing. CoRR abs/2205.06361 (2022) - 2021
- [j24]Candace Walden, Devesh Singh, Meenatchi Jagasivamani, Shang Li, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache. ACM Trans. Archit. Code Optim. 18(4): 48:1-48:26 (2021) - [c49]Luyi Kang, Bruce L. Jacob:
Zoned FTL: Achieve Resource Isolation via Hardware Virtualization. MEMSYS 2021: 7:1-7:8 - [c48]Luyi Kang, Yuqi Xue, Weiwei Jia, Xiaohao Wang, Jongryool Kim, Changhwan Youn, Myeong Joon Kang, Hyung Jin Lim, Bruce L. Jacob, Jian Huang:
IceClave: A Trusted Execution Environment for In-Storage Computing. MICRO 2021: 199-211 - [i1]Luyi Kang, Yuqi Xue, Weiwei Jia, Xiaohao Wang, Jongryool Kim, Changhwan Youn, Myeong Joon Kang, Hyung Jin Lim, Bruce L. Jacob, Jian Huang:
IceClave: A Trusted Execution Environment for In-Storage Computing. CoRR abs/2109.03373 (2021) - 2020
- [j23]Shang Li, Zhiyuan Yang, Dhiraj Reddy, Ankur Srivastava, Bruce L. Jacob:
DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator. IEEE Comput. Archit. Lett. 19(2): 110-113 (2020) - [c47]Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Tileable Monolithic ReRAM Memory Design. COOL CHIPS 2020: 1-3
2010 – 2019
- 2019
- [j22]Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Analyzing the Monolithic Integration of a ReRAM-Based Main Memory Into a CPU's Die. IEEE Micro 39(6): 64-72 (2019) - [j21]Milan Radulovic, Rommel Sánchez Verdejo, Paul M. Carpenter, Petar Radojkovic, Bruce L. Jacob, Eduard Ayguadé:
PROFET: Modeling System Performance and Energy Without Simulating the CPU. Proc. ACM Meas. Anal. Comput. Syst. 3(2): 34:1-34:33 (2019) - [c46]Shang Li, Rommel Sánchez Verdejo, Petar Radojkovic, Bruce L. Jacob:
Rethinking cycle accurate DRAM simulation. MEMSYS 2019: 184-191 - [c45]Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Donald Yeung, Bruce L. Jacob:
Design for ReRAM-based main-memory architectures. MEMSYS 2019: 342-350 - [c44]Shang Li, Bruce L. Jacob:
Statistical DRAM modeling. MEMSYS 2019: 521-530 - [c43]Milan Radulovic, Rommel Sánchez Verdejo, Paul M. Carpenter, Petar Radojkovic, Bruce L. Jacob, Eduard Ayguadé:
PROFET: Modeling System Performance and Energy Without Simulating the CPU. SIGMETRICS (Abstracts) 2019: 71-72 - 2018
- [c42]Shang Li, Po-Chun Huang, Bruce L. Jacob:
Exascale Interconnect Topology Characterization and Parameter Exploration. HPCC/SmartCity/DSS 2018: 810-819 - [c41]Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Memory-systems challenges in realizing monolithic computers. MEMSYS 2018: 98-104 - [c40]Rommel Sánchez Verdejo, Kazi Asifuzzaman, Milan Radulovic, Petar Radojkovic, Eduard Ayguadé, Bruce L. Jacob:
Main memory latency simulation: the missing link. MEMSYS 2018: 107-116 - [c39]Shang Li, Dhiraj Reddy, Bruce L. Jacob:
A performance & power comparison of modern high-speed DRAM architectures. MEMSYS 2018: 341-353 - [e4]Bruce L. Jacob:
Proceedings of the International Symposium on Memory Systems, MEMSYS 2018, Old Town Alexandria, VA, USA, October 01-04, 2018. ACM 2018, ISBN 978-1-4503-6475-1 [contents] - 2017
- [c38]Deepak M. Mathew, Éder F. Zulian, Matthias Jung, Kira Kraft, Christian Weis, Bruce L. Jacob, Norbert Wehn:
Using run-time reverse-engineering to optimize DRAM refresh. MEMSYS 2017: 115-124 - [e3]Bruce L. Jacob:
Proceedings of the International Symposium on Memory Systems, MEMSYS 2017, Alexandria, VA, USA, October 02 - 05, 2017. ACM 2017, ISBN 978-1-4503-5335-9 [contents] - 2016
- [j20]Bruce L. Jacob:
The Case for VLIW-CMP as a Building Block for Exascale. IEEE Comput. Archit. Lett. 15(1): 54-57 (2016) - [j19]Bruce L. Jacob:
The 2 PetaFLOP, 3 Petabyte, 9 TB/s, 90 kW Cabinet: A System Architecture for Exascale and Big Data. IEEE Comput. Archit. Lett. 15(2): 125-128 (2016) - [j18]Ishwar Bhati, Mu-Tien Chang, Zeshan Chishti, Shih-Lien Lu, Bruce L. Jacob:
DRAM Refresh Mechanisms, Penalties, and Trade-Offs. IEEE Trans. Computers 65(1): 108-121 (2016) - [c37]Shang Li, Po-Chun Huang, David Banks, Max DePalma, Ahmed Elshaarany, K. Scott Hemmert, Arun Rodrigues, Emily Ruppel, Yitian Wang, Jim Ang, Bruce L. Jacob:
Low Latency, High Bisection-Bandwidth Networks for Exascale Memory Systems. MEMSYS 2016: 62-73 - [c36]Jim Stevens, Paul Tschirhart, Bruce L. Jacob:
Fast full system memory checkpointing with SSD-aware memory controller. MEMSYS 2016: 96-98 - [c35]Paul Tschirhart, Jim Stevens, Zeshan Chishti, Bruce L. Jacob:
The Case for Associative DRAM Caches. MEMSYS 2016: 211-219 - [e2]Bruce L. Jacob:
Proceedings of the Second International Symposium on Memory Systems, MEMSYS 2016, Alexandria, VA, USA, October 3-6, 2016. ACM 2016, ISBN 978-1-4503-4305-3 [contents] - 2015
- [c34]Ishwar Bhati, Zeshan Chishti, Shih-Lien Lu, Bruce L. Jacob:
Flexible auto-refresh: enabling scalable and energy-efficient DRAM refresh reductions. ISCA 2015: 235-246 - [c33]Jim Stevens, Paul Tschirhart, Bruce L. Jacob:
The Semantic Gap Between Software and the Memory System. MEMSYS 2015: 43-46 - [c32]Paul Tschirhart, Jim Stevens, Zeshan Chishti, Shih-Lien Lu, Bruce L. Jacob:
Bringing Modern Hierarchical Memory Systems Into Focus: A study of architecture and workload factors on system performance. MEMSYS 2015: 179-190 - [e1]Bruce L. Jacob:
Proceedings of the 2015 International Symposium on Memory Systems, MEMSYS 2015, Washington DC, DC, USA, October 5-8, 2015. ACM 2015, ISBN 978-1-4503-3604-8 [contents] - 2014
- [c31]Bruce L. Jacob:
High-bandwidth, high-capacity, low-power memory systems. ICSAMOS 2014: ii - 2013
- [c30]Mu-Tien Chang, Paul Rosenfeld, Shih-Lien Lu, Bruce L. Jacob:
Technology comparison for large last-level caches (L3Cs): Low-leakage SRAM, low write-energy STT-RAM, and refresh-optimized eDRAM. HPCA 2013: 143-154 - [c29]Ishwar Bhati, Zeshan Chishti, Bruce L. Jacob:
Coordinated refresh: Energy efficient techniques for DRAM refresh scheduling. ISLPED 2013: 205-210 - 2012
- [c28]Elliott Cooper-Balis, Paul Rosenfeld, Bruce L. Jacob:
Buffer-on-board memory systems. ISCA 2012: 392-403 - [c27]Mu-Tien Chang, Joe Gross, Bruce L. Jacob:
Energy-Efficient Cached DIMM Architecture. MASCOTS 2012: 501-503 - 2011
- [j17]Paul Rosenfeld, Elliott Cooper-Balis, Bruce L. Jacob:
DRAMSim2: A Cycle Accurate Memory System Simulator. IEEE Comput. Archit. Lett. 10(1): 16-19 (2011) - [j16]Arun F. Rodrigues, K. Scott Hemmert, Brian W. Barrett, Chad D. Kersey, Ron A. Oldfield, M. Weston, R. Risen, J. Cook, Paul Rosenfeld, E. CooperBalls, Bruce L. Jacob:
The structural simulation toolkit. SIGMETRICS Perform. Evaluation Rev. 38(4): 37-42 (2011) - [c26]Keren Bergman, Gilbert Hendry, Paul Hargrove, John Shalf, Bruce L. Jacob, K. Scott Hemmert, Arun Rodrigues, David R. Resnick:
Let there be light!: the future of memory systems is photonics and 3D stacking. MSPC 2011: 43-48 - [c25]Mu-Tien Chang, Bruce L. Jacob:
An analytical model to estimate PCM failure probability due to process variations. SoCC 2011: 174-177 - 2010
- [j15]Elliott Cooper-Balis, Bruce L. Jacob:
Fine-Grained Activation for Power Reduction in DRAM. IEEE Micro 30(3): 34-47 (2010)
2000 – 2009
- 2009
- [b3]Bruce L. Jacob:
The Memory System: You Can't Avoid It, You Can't Ignore It, You Can't Fake It. Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers 2009, ISBN 978-3-031-00596-1 - [c24]Cagdas Dirik, Bruce L. Jacob:
The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization. ISCA 2009: 279-289 - 2008
- [b2]Bruce L. Jacob, Spencer W. Ng, David T. Wang:
Memory Systems: Cache, DRAM, Disk. Morgan Kaufmann 2008, ISBN 978-0-12-379751-3 - [j14]Ankush Varma, Eric Debes, Igor Kozintsev, Paul Klein, Bruce L. Jacob:
Accurate and fast system-level power modeling: An XScale-based case study. ACM Trans. Embed. Comput. Syst. 7(3): 25:1-25:20 (2008) - 2007
- [j13]Ankush Varma, Bruce L. Jacob, Eric Debes, Igor Kozintsev, Paul Klein:
Accurate and fast system-level power modeling: An XScale-based case study. ACM Trans. Embed. Comput. Syst. 6(4): 26 (2007) - [c23]Brinda Ganesh, Aamer Jaleel, David Wang, Bruce L. Jacob:
Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling. HPCA 2007: 109-120 - 2006
- [j12]Aamer Jaleel, Bruce L. Jacob:
In-Line Interrupt Handling and Lock-Up Free Translation Lookaside Buffers (TLBs). IEEE Trans. Computers 55(5): 559-574 (2006) - [c22]Ankush Varma, Muhammad Yaqub Afridi, Akin Akturk, Paul Klein, Allen R. Hefner, Bruce L. Jacob:
Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study. CASES 2006: 54-64 - [c21]Aamer Jaleel, Matthew Mattina, Bruce L. Jacob:
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads. HPCA 2006: 88-98 - [c20]Samuel Rodríguez, Bruce L. Jacob:
Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm). ISLPED 2006: 25-30 - 2005
- [j11]David Wang, Brinda Ganesh, Nuengwong Tuaycharoen, Kathleen Baynes, Aamer Jaleel, Bruce L. Jacob:
DRAMsim: a memory system simulator. SIGARCH Comput. Archit. News 33(4): 100-107 (2005) - [c19]Justin Teller, Charles B. Silio Jr., Bruce L. Jacob:
Performance characteristics of MAUI: an intelligent memory system architecture. Memory System Performance 2005: 44-53 - [c18]Hongxia Wang, Samuel Rodríguez, Cagdas Dirik, Amol Gole, Vincent Chan, Bruce L. Jacob:
TERPS: the embedded reliable processing system. ASP-DAC 2005: 1-2 - [c17]Aamer Jaleel, Bruce L. Jacob:
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions. HPCA 2005: 191-200 - [c16]Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce L. Jacob, Chau-Wen Tseng, Donald Yeung:
BioBench: A Benchmark Suite of Bioinformatics Applications. ISPASS 2005: 2-9 - 2004
- [c15]Bharath Iyer, Sadagopan Srinivasan, Bruce L. Jacob:
Extended Split-Issue: Enabling Flexibility in the Hardware Implementation of NUAL VLIW DSPs. ISCA 2004: 364-375 - 2003
- [j10]Bruce L. Jacob:
A Case for Studying DRAM Issues at the System Level. IEEE Micro 23(4): 44-56 (2003) - [j9]Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob:
The Performance and Energy Consumption of Embedded Real-Time Operating Systems. IEEE Trans. Computers 52(11): 1454-1469 (2003) - [j8]Bruce L. Jacob, Shuvra S. Bhattacharyya:
Introduction to the two special issues on memory. ACM Trans. Embed. Comput. Syst. 2(1): 1-4 (2003) - [c14]Ankush Varma, Brinda Ganesh, Mainak Sen, Suchismita Roy Choudhury, Lakshmi Srinivasan, Bruce L. Jacob:
A control-theoretic approach to dynamic voltage scheduling. CASES 2003: 255-266 - [c13]Paul Kohout, Brinda Ganesh, Bruce L. Jacob:
Hardware support for real-time operating systems. CODES+ISSS 2003: 45-51 - 2002
- [j7]Bruce L. Jacob, Shuvra S. Bhattacharyya:
Introduction to the two special issues on memory. ACM Trans. Embed. Comput. Syst. 1(1): 2-5 (2002) - 2001
- [j6]Bruce L. Jacob, Trevor N. Mudge:
Uniprocessor Virtual Memory without TLBs. IEEE Trans. Computers 50(5): 482-499 (2001) - [j5]Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor N. Mudge:
High-Performance DRAMs in Workstation Environments. IEEE Trans. Computers 50(11): 1133-1153 (2001) - [c12]Sadagopan Srinivasan, Vinodh Cuppu, Bruce L. Jacob:
Transparent data-memory organizations for digital signal processors. CASES 2001: 44-48 - [c11]Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob:
The performance and energy consumption of three embedded real-time operating systems. CASES 2001: 203-210 - [c10]Aamer Jaleel, Bruce L. Jacob:
Improving the Precise Interrupt Mechanism of Software-Managed TLB Miss Handlers. HiPC 2001: 282-293 - [c9]Aamer Jaleel, Bruce L. Jacob:
In-Line Interrupt Handling for Software-Managed TLBs. ICCD 2001: 62-67 - [c8]Vinodh Cuppu, Bruce L. Jacob:
Concurrency, latency, or system overhead: which has the largest impact on uniprocessor DRAM-system performance?. ISCA 2001: 62-71 - 2000
- [c7]Brian Davis, Bruce L. Jacob, Trevor N. Mudge:
The New DRAM Interfaces: SDRAM, RDRAM and Variants. ISHPC 2000: 26-31
1990 – 1999
- 1999
- [c6]David R. Kaeli, Bruce L. Jacob:
Fifth Annual Workshop on Computer Education. HPCA 1999: 320 - [c5]Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor N. Mudge:
A Performance Comparison of Contemporary DRAM Architectures. ISCA 1999: 222-233 - 1998
- [j4]Bruce L. Jacob, Trevor N. Mudge:
Virtual Memory: Issues of Implementation. Computer 31(6): 33-43 (1998) - [j3]Bruce L. Jacob, Trevor N. Mudge:
Virtual memory in contemporary microprocessors. IEEE Micro 18(4): 60-75 (1998) - [c4]Bruce L. Jacob, Trevor N. Mudge:
A Look at Several Memory Management Units, TLB-Refill Mechanisms, and Page Table Organizations. ASPLOS 1998: 295-306 - 1997
- [b1]Bruce L. Jacob:
Software-oriented memory-management design. University of Michigan, USA, 1997 - [j2]Bruce L. Jacob, Peter M. Chen, Seth R. Silverman, Trevor N. Mudge:
A Comment on "An Analytical Model for Designing Memory Hierarchies". IEEE Trans. Computers 46(10): 1151 (1997) - [c3]Bruce L. Jacob, Trevor N. Mudge:
Software-Managed Address Translation. HPCA 1997: 156-167 - 1996
- [j1]Bruce L. Jacob, Peter M. Chen, Seth R. Silverman, Trevor N. Mudge:
An Analytical Model for Designing Memory Hierarchies. IEEE Trans. Computers 45(10): 1180-1194 (1996) - [c2]Bruce L. Jacob, Trevor N. Mudge:
The trading function in action. ACM SIGOPS European Workshop 1996: 241-247 - 1995
- [c1]Bruce L. Jacob:
Composing with Genetic Algorithms. ICMC 1995
Coauthor Index
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last updated on 2023-10-20 19:40 CEST by the dblp team
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