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ORCIDJing Guo 0004
Person information
- affiliation: North University of China, Science and Technology on Electronic Test and Measurement Laboratory, Taiyuan, China
- affiliation (PhD 2015): Harbin Institute of Technology, Microelectronics Center, China
Other persons with the same name
- Jing Guo — disambiguation page
- Jing Guo 0001 — Paul Sabatier University, Toulouse, France
- Jing Guo 0002 — University of Hertfordshire, UK
- Jing Guo 0003
![[0000-0001-6752-6064]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0001-6752-6064")
— Australian National University, College of Engineering and Computer Science, Canberra, ACT, Australia - Jing Guo 0005 — Wuhan University, GNSS Research Center, China (and 1 more)
- Jing Guo 0006 — Chinese Academy of Sciences, Institute of Remote Sensing and Digital Earth, Beijing, China (and 1 more)
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2020 – today
- 2022
[c3]Shanshan Liu, Jing Guo, Xiaochen Tang, Pedro Reviriego, Fabrizio Lombardi:
A Polarity-Driven Radiation-Hardened Latch design for Single Event Upset Tolerance. DFT 2022: 1-6- 2021
- [j15]Jing Guo, Shanshan Liu, Xiaohui Su, Chunhua Qi, Fabrizio Lombardi:
High-Performance CMOS Latch Designs for Recovering All Single and Double Node Upsets. IEEE Trans. Aerosp. Electron. Syst. 57(6): 4401-4415 (2021) - [j14]Aibin Yan, Chaoping Lai, Yinlei Zhang, Jie Cui, Zhengfeng Huang, Jie Song, Jing Guo, Xiaoqing Wen:
Novel Low Cost, Double-and-Triple-Node-Upset-Tolerant Latch Designs for Nano-scale CMOS. IEEE Trans. Emerg. Top. Comput. 9(1): 520-533 (2021) - [j13]Shanshan Liu, Pedro Reviriego, Jing Guo, Jie Han, Fabrizio Lombardi:
Exploiting Asymmetry in eDRAM Errors for Redundancy-Free Error-Tolerant Design. IEEE Trans. Emerg. Top. Comput. 9(4): 2064-2075 (2021) - 2020
- [j12]Nan Zhang, Xiaohui Su, Jing Guo:
Design of Robust Latch for Multiple-Node Upset (MNU) Mitigation in Nanoscale CMOS Technology. IEEE Access 8: 126582-126590 (2020) - [j11]Qiang Li, Xiaohui Su, Jing Guo, Chunhua Qi:
Self-Recovery Tolerance Latch Design Based on the Radiation Mechanism. IEEE Access 8: 220152-220164 (2020) - [j10]Jing Guo, Shanshan Liu, Lei Zhu, Fabrizio Lombardi:
Design and Evaluation of Low-Complexity Radiation Hardened CMOS Latch for Double-Node Upset Tolerance. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(6): 1925-1935 (2020)
2010 – 2019
- 2019
- [j9]Jing Guo, Shanshan Liu, Lei Zhu, Fabrizio Lombardi:
A CMOS Majority Logic Gate and its Application to One-Step ML Decodable Codes. IEEE Trans. Very Large Scale Integr. Syst. 27(11): 2620-2628 (2019) - 2018
- [j8]Jing Guo, Lei Zhu, Yu Sun, Huiliang Cao, Hai Huang, Tianqi Wang, Chunhua Qi, Rongsheng Zhang, Xuebing Cao, Liyi Xiao, Zhigang Mao:
Design of Area-Efficient and Highly Reliable RHBD 10T Memory Cell for Aerospace Applications. IEEE Trans. Very Large Scale Integr. Syst. 26(5): 991-994 (2018) - 2017
- [j7]Yingzi Zhang, Yulong Hou, Wenyi Liu, Huixin Zhang, Yanjun Zhang, Zhidong Zhang, Jing Guo, Jia Liu, Liang Zhang, Qiu-lin Tan:
A Cost-Effective Relative Humidity Sensor Based on Side Coupling Induction Technology. Sensors 17(5): 944 (2017) - [j6]Jing Guo, Lei Zhu, Wenyi Liu, Hai Huang, Shanshan Liu, Tianqi Wang, Liyi Xiao, Zhigang Mao:
Novel Radiation-Hardened-by-Design (RHBD) 12T Memory Cell for Aerospace Applications in Nanoscale CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 25(5): 1593-1600 (2017) - 2015
- [j5]Chunhua Qi, Liyi Xiao, Jing Guo, Tianqi Wang:
Low cost and highly reliable radiation hardened latch design in 65 nm CMOS technology. Microelectron. Reliab. 55(6): 863-872 (2015) - [j4]Jing Guo, Liyi Xiao, Tianqi Wang, Shanshan Liu, Xu Wang, Zhigang Mao:
Soft Error Hardened Memory Design for Nanoscale Complementary Metal Oxide Semiconductor Technology. IEEE Trans. Reliab. 64(2): 596-602 (2015) - [c2]Shanshan Liu, Liyi Xiao, Jing Guo, Zhigang Mao:
Fault Secure Encoder and Decoder Designs for Matrix Codes. CAD/Graphics 2015: 181-185 - [c1]Liyi Xiao, Jiaqiang Li, Jie Li, Jing Guo:
Hardened design based on advanced orthogonal Latin code against two adjacent multiple bit upsets (MBUs) in memories. ISQED 2015: 485-489 - 2014
- [j3]Jing Guo, Liyi Xiao, Zhigang Mao:
Novel Low-Power and Highly Reliable Radiation Hardened Memory Cell for 65 nm CMOS Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(7): 1994-2001 (2014) - [j2]Jing Guo, Liyi Xiao, Zhigang Mao, Qiang Zhao:
Enhanced Memory Reliability Against Multiple Cell Upsets Using Decimal Matrix Code. IEEE Trans. Very Large Scale Integr. Syst. 22(1): 127-135 (2014) - 2013
- [j1]Jing Guo, Liyi Xiao, Zhigang Mao, Qiang Zhao:
Novel Mixed Codes for Multiple-Cell Upsets Mitigation in Static RAMs. IEEE Micro 33(6): 66-74 (2013)
Coauthor Index
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