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Michael Eisenring
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2000 – 2009
- 2002
- [b2]Michael Eisenring:
Communication channel synthesis for heterogeneous embedded systems. TIK-Schriftenreihe 45, vdf 2002, ISBN 978-3-7281-2867-6, pp. 1-174 - [b1]Michael Eisenring:
Communication channel synthesis for heterogeneous embedded systems. ETH Zurich, Zürich, Switzerland, 2002 - [j2]Michael Eisenring, Marco Platzner:
A Framework for Run-time Reconfigurable Systems. J. Supercomput. 21(2): 145-159 (2002) - 2000
- [j1]Michael Eisenring, Lothar Thiele, Eckart Zitzler:
Conflicting Criteria in Embedded System Design. IEEE Des. Test Comput. 17(2): 51-59 (2000) - [c6]Michael Eisenring, Marco Platzner:
Optimization of Run-Time Reconfigurable Embedded Systems. FPL 2000: 565-574 - [c5]Michael Eisenring, Marco Platzner:
An Implementation Framework for Run-time Reconfigurable Systems. PDPTA 2000
1990 – 1999
- 1999
- [c4]Michael Eisenring, Marco Platzner, Lothar Thiele:
Communication Synthesis for Reconfigurable Embedded Systems. FPL 1999: 205-214 - 1998
- [c3]Michael Eisenring, Jürgen Teich:
Domain-specific interface generation from dataflow specifications. CODES 1998: 43-47 - [c2]Michael Eisenring, Jürgen Teich:
Interfacing Hardware and Software. FPL 1998: 520-524 - [c1]Michael Eisenring, Jürgen Teich, Lothar Thiele:
Rapid Prototyping of Dataflow Programs on Hardware/Software Architectures. HICSS (7) 1998: 187-196
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