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BibTeX records: A. Venkatareddy
@inproceedings{DBLP:conf/vlsid/VenkatareddySNV16, author = {A. Venkatareddy and Sithara Raveendran and Kumar Y. B. Nithin and M. H. Vasantha}, title = {Characterization of a Novel Low Leakage Power and Area Efficient 7T {SRAM} Cell}, booktitle = {29th International Conference on {VLSI} Design and 15th International Conference on Embedded Systems, {VLSID} 2016, Kolkata, India, January 4-8, 2016}, pages = {202--206}, publisher = {{IEEE} Computer Society}, year = {2016}, url = {https://doi.org/10.1109/VLSID.2016.28}, doi = {10.1109/VLSID.2016.28}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/VenkatareddySNV16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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