default search action
BibTeX records: Milan Stanic
@article{DBLP:journals/tvlsi/RatkovicPSUCV18, author = {Ivan Ratkovic and Oscar Palomar and Milan Stanic and Osman Sabri Unsal and Adri{\'{a}}n Cristal and Mateo Valero}, title = {Vector Processing-Aware Advanced Clock-Gating Techniques for Low-Power Fused Multiply-Add}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {26}, number = {4}, pages = {639--652}, year = {2018}, url = {https://doi.org/10.1109/TVLSI.2017.2784807}, doi = {10.1109/TVLSI.2017.2784807}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tvlsi/RatkovicPSUCV18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@phdthesis{DBLP:phd/es/Stanic17, author = {Milan Stanic}, title = {Design of energy-efficient vector units for in-order cores}, school = {Polytechnic University of Catalonia, Spain}, year = {2017}, url = {http://hdl.handle.net/10803/405647}, timestamp = {Wed, 16 Nov 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/phd/es/Stanic17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/taco/StanicPHRCUV17, author = {Milan Stanic and Oscar Palomar and Timothy Hayes and Ivan Ratkovic and Adri{\'{a}}n Cristal and Osman S. Unsal and Mateo Valero}, title = {An Integrated Vector-Scalar Design on an In-Order {ARM} Core}, journal = {{ACM} Trans. Archit. Code Optim.}, volume = {14}, number = {2}, pages = {17:1--17:26}, year = {2017}, url = {https://doi.org/10.1145/3075618}, doi = {10.1145/3075618}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/taco/StanicPHRCUV17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/IEEEpact/StanicP0RUCV16, author = {Milan Stanic and Oscar Palomar and Timothy Hayes and Ivan Ratkovic and Osman S. Unsal and Adri{\'{a}}n Cristal and Mateo Valero}, editor = {Ayal Zaks and Bilha Mendelson and Lawrence Rauchwerger and Wen{-}mei W. Hwu}, title = {{POSTER:} An Integrated Vector-Scalar Design on an In-order {ARM} Core}, booktitle = {Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, {PACT} 2016, Haifa, Israel, September 11-15, 2016}, pages = {447--448}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2967938.2974057}, doi = {10.1145/2967938.2974057}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/IEEEpact/StanicP0RUCV16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cd/StanicP0RUC16, author = {Milan Stanic and Oscar Palomar and Timothy Hayes and Ivan Ratkovic and Osman S. Unsal and Adri{\'{a}}n Cristal}, editor = {Gianluca Palermo and John Feo}, title = {Towards low-power embedded vector processor}, booktitle = {Proceedings of the {ACM} International Conference on Computing Frontiers, CF'16, Como, Italy, May 16-19, 2016}, pages = {339--342}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2903150.2903485}, doi = {10.1145/2903150.2903485}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cd/StanicP0RUC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/islped/RatkovicPSUCV16, author = {Ivan Ratkovic and Oscar Palomar and Milan Stanic and Osman S. Unsal and Adri{\'{a}}n Cristal and Mateo Valero}, title = {A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques}, booktitle = {Proceedings of the 2016 International Symposium on Low Power Electronics and Design, {ISLPED} 2016, San Francisco Airport, CA, USA, August 08 - 10, 2016}, pages = {362--367}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2934583.2934587}, doi = {10.1145/2934583.2934587}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/islped/RatkovicPSUCV16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/RatkovicPSDPUCV15, author = {Ivan Ratkovic and Oscar Palomar and Milan Stanic and Milovan Duric and Djordje Peic and Osman S. Unsal and Adri{\'{a}}n Cristal and Mateo Valero}, title = {Joint Circuit-System Design Space Exploration of Multiplier Unit Structure for Energy-Efficient Vector Processors}, booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015, Montpellier, France, July 8-10, 2015}, pages = {19--26}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/ISVLSI.2015.23}, doi = {10.1109/ISVLSI.2015.23}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/RatkovicPSDPUCV15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/DuricSRPUCVS15, author = {Milovan Duric and Milan Stanic and Ivan Ratkovic and Oscar Palomar and Osman S. Unsal and Adri{\'{a}}n Cristal and Mateo Valero and Aaron Smith}, editor = {Dimitrios Soudris and Luigi Carro}, title = {Imposing coarse-grained reconfiguration to general purpose processors}, booktitle = {2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2015, Samos, Greece, July 19-23, 2015}, pages = {42--51}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/SAMOS.2015.7363658}, doi = {10.1109/SAMOS.2015.7363658}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/samos/DuricSRPUCVS15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cf/StanicPRDUC14, author = {Milan Stanic and Oscar Palomar and Ivan Ratkovic and Milovan Duric and Osman S. Unsal and Adri{\'{a}}n Cristal}, editor = {Pedro Trancoso and Diana Franklin and Sally A. McKee}, title = {VALib and SimpleVector: tools for rapid initial research on vector architectures}, booktitle = {Computing Frontiers Conference, CF'14, Cagliari, Italy - May 20 - 22, 2014}, pages = {7:1--7:10}, publisher = {{ACM}}, year = {2014}, url = {https://doi.org/10.1145/2597917.2597919}, doi = {10.1145/2597917.2597919}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cf/StanicPRDUC14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpcs/StanicPRDUCV14, author = {Milan Stanic and Oscar Palomar and Ivan Ratkovic and Milovan Duric and Osman S. Unsal and Adri{\'{a}}n Cristal and Mateo Valero}, title = {Evaluation of vectorization potential of Graph500 on Intel's Xeon Phi}, booktitle = {International Conference on High Performance Computing {\&} Simulation, {HPCS} 2014, Bologna, Italy, 21-25 July, 2014}, pages = {47--54}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/HPCSim.2014.6903668}, doi = {10.1109/HPCSIM.2014.6903668}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/hpcs/StanicPRDUCV14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/RatkovicPSUCV14, author = {Ivan Ratkovic and Oscar Palomar and Milan Stanic and Osman S. Unsal and Adri{\'{a}}n Cristal and Mateo Valero}, title = {Physical vs. Physically-Aware Estimation Flow: Case Study of Design Space Exploration of Adders}, booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2014, Tampa, FL, USA, July 9-11, 2014}, pages = {118--123}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ISVLSI.2014.14}, doi = {10.1109/ISVLSI.2014.14}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/RatkovicPSUCV14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/DuricPSSUCVBV14, author = {Milovan Duric and Oscar Palomar and Aaron Smith and Milan Stanic and Osman S. Unsal and Adri{\'{a}}n Cristal and Mateo Valero and Doug Burger and Alexander V. Veidenbaum}, title = {Dynamic-vector execution on a general purpose {EDGE} chip multiprocessor}, booktitle = {XIVth International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2014, Agios Konstantinos, Samos, Greece, July 14-17, 2014}, pages = {18--25}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/SAMOS.2014.6893190}, doi = {10.1109/SAMOS.2014.6893190}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/samos/DuricPSSUCVBV14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/RatkovicPSUCV13, author = {Ivan Ratkovic and Oscar Palomar and Milan Stanic and Osman S. Unsal and Adri{\'{a}}n Cristal and Mateo Valero}, title = {On the selection of adder unit in energy efficient vector processing}, booktitle = {International Symposium on Quality Electronic Design, {ISQED} 2013, Santa Clara, CA, USA, March 4-6, 2013}, pages = {143--150}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/ISQED.2013.6523602}, doi = {10.1109/ISQED.2013.6523602}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isqed/RatkovicPSUCV13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.