BibTeX records: Jaewoong Sim

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@article{DBLP:journals/jpdc/NaiHXKSK19,
  author    = {Lifeng Nai and
               Ramyad Hadidi and
               He Xiao and
               Hyojong Kim and
               Jaewoong Sim and
               Hyesoon Kim},
  title     = {Thermal-aware processing-in-memory instruction offloading},
  journal   = {J. Parallel Distributed Comput.},
  volume    = {130},
  pages     = {193--207},
  year      = {2019},
  url       = {https://doi.org/10.1016/j.jpdc.2019.03.005},
  doi       = {10.1016/j.jpdc.2019.03.005},
  timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/jpdc/NaiHXKSK19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/NurvitadhiKJBST19,
  author    = {Eriko Nurvitadhi and
               Dongup Kwon and
               Ali Jafari and
               Andrew Boutros and
               Jaewoong Sim and
               Phillip Tomson and
               Huseyin Sumbul and
               Gregory K. Chen and
               Phil V. Knag and
               Raghavan Kumar and
               Ram Krishnamurthy and
               Sergey Gribok and
               Bogdan Pasca and
               Martin Langhammer and
               Debbie Marr and
               Aravind Dasu},
  title     = {Why Compete When You Can Work Together: {FPGA-ASIC} Integration for
               Persistent RNNs},
  booktitle = {27th {IEEE} Annual International Symposium on Field-Programmable Custom
               Computing Machines, {FCCM} 2019, San Diego, CA, USA, April 28 - May
               1, 2019},
  pages     = {199--207},
  publisher = {{IEEE}},
  year      = {2019},
  url       = {https://doi.org/10.1109/FCCM.2019.00035},
  doi       = {10.1109/FCCM.2019.00035},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/fccm/NurvitadhiKJBST19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/NurvitadhiKJBST19,
  author    = {Eriko Nurvitadhi and
               Dongup Kwon and
               Ali Jafari and
               Andrew Boutros and
               Jaewoong Sim and
               Phillip Tomson and
               Huseyin Sumbul and
               Gregory K. Chen and
               Phil V. Knag and
               Raghavan Kumar and
               Ram Krishnamurthy and
               Debbie Marr and
               Sergey Gribok and
               Bogdan Pasca and
               Martin Langhammer and
               Aravind Dasu},
  editor    = {Kia Bazargan and
               Stephen Neuendorffer},
  title     = {Evaluating and Enhancing Intel{\textregistered} Stratix{\textregistered}
               10 FPGAs for Persistent Real-Time {AI}},
  booktitle = {Proceedings of the 2019 {ACM/SIGDA} International Symposium on Field-Programmable
               Gate Arrays, {FPGA} 2019, Seaside, CA, USA, February 24-26, 2019},
  pages     = {119},
  publisher = {{ACM}},
  year      = {2019},
  url       = {https://doi.org/10.1145/3289602.3293943},
  doi       = {10.1145/3289602.3293943},
  timestamp = {Tue, 05 Mar 2019 07:04:43 +0100},
  biburl    = {https://dblp.org/rec/conf/fpga/NurvitadhiKJBST19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MaCH0NSPLSD19,
  author    = {Rui Ma and
               Derek Chiou and
               Jia{-}Ching Hsu and
               Tian Tan and
               Eriko Nurvitadhi and
               David Sheffield and
               Rob Pelt and
               Martin Langhammer and
               Jaewoong Sim and
               Aravind Dasu},
  editor    = {Ioannis Sourdis and
               Christos{-}Savvas Bouganis and
               Carlos {\'{A}}lvarez and
               Leonel Toledo and
               Pedro Valero{-}Lara and
               Xavier Martorell},
  title     = {Specializing {FGPU} for Persistent Deep Learning},
  booktitle = {29th International Conference on Field Programmable Logic and Applications,
               {FPL} 2019, Barcelona, Spain, September 8-12, 2019},
  pages     = {326--333},
  publisher = {{IEEE}},
  year      = {2019},
  url       = {https://doi.org/10.1109/FPL.2019.00059},
  doi       = {10.1109/FPL.2019.00059},
  timestamp = {Thu, 14 Nov 2019 09:41:06 +0100},
  biburl    = {https://dblp.org/rec/conf/fpl/MaCH0NSPLSD19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MossSNRJSMMSL18,
  author    = {Duncan J. M. Moss and
               Krishnan Srivatsan and
               Eriko Nurvitadhi and
               Piotr Ratuszniak and
               Chris Johnson and
               Jaewoong Sim and
               Asit K. Mishra and
               Debbie Marr and
               Suchit Subhaschandra and
               Philip Heng Wai Leong},
  editor    = {Jason Helge Anderson and
               Kia Bazargan},
  title     = {A Customizable Matrix Multiplication Framework for the Intel HARPv2
               Xeon+FPGA Platform: {A} Deep Learning Case Study},
  booktitle = {Proceedings of the 2018 {ACM/SIGDA} International Symposium on Field-Programmable
               Gate Arrays, {FPGA} 2018, Monterey, CA, USA, February 25-27, 2018},
  pages     = {107--116},
  publisher = {{ACM}},
  year      = {2018},
  url       = {https://doi.org/10.1145/3174243.3174258},
  doi       = {10.1145/3174243.3174258},
  timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
  biburl    = {https://dblp.org/rec/conf/fpga/MossSNRJSMMSL18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/NaiHXKSK18,
  author    = {Lifeng Nai and
               Ramyad Hadidi and
               He Xiao and
               Hyojong Kim and
               Jaewoong Sim and
               Hyesoon Kim},
  title     = {CoolPIM: Thermal-Aware Source Throttling for Efficient {PIM} Instruction
               Offloading},
  booktitle = {2018 {IEEE} International Parallel and Distributed Processing Symposium,
               {IPDPS} 2018, Vancouver, BC, Canada, May 21-25, 2018},
  pages     = {680--689},
  publisher = {{IEEE} Computer Society},
  year      = {2018},
  url       = {https://doi.org/10.1109/IPDPS.2018.00077},
  doi       = {10.1109/IPDPS.2018.00077},
  timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
  biburl    = {https://dblp.org/rec/conf/ipps/NaiHXKSK18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/NurvitadhiVSMHH17,
  author    = {Eriko Nurvitadhi and
               Ganesh Venkatesh and
               Jaewoong Sim and
               Debbie Marr and
               Randy Huang and
               Jason Ong Gee Hock and
               Yeong Tat Liew and
               Krishnan Srivatsan and
               Duncan J. M. Moss and
               Suchit Subhaschandra and
               Guy Boudoukh},
  editor    = {Jonathan W. Greene and
               Jason Helge Anderson},
  title     = {Can FPGAs Beat GPUs in Accelerating Next-Generation Deep Neural Networks?},
  booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
               Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
  pages     = {5--14},
  publisher = {{ACM}},
  year      = {2017},
  url       = {http://dl.acm.org/citation.cfm?id=3021740},
  timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
  biburl    = {https://dblp.org/rec/conf/fpga/NurvitadhiVSMHH17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MossNSMMSL17,
  author    = {Duncan J. M. Moss and
               Eriko Nurvitadhi and
               Jaewoong Sim and
               Asit K. Mishra and
               Debbie Marr and
               Suchit Subhaschandra and
               Philip Heng Wai Leong},
  editor    = {Marco D. Santambrogio and
               Diana G{\"{o}}hringer and
               Dirk Stroobandt and
               Nele Mentens and
               Jari Nurmi},
  title     = {High performance binary neural networks on the Xeon+FPGA{\texttrademark}
               platform},
  booktitle = {27th International Conference on Field Programmable Logic and Applications,
               {FPL} 2017, Ghent, Belgium, September 4-8, 2017},
  pages     = {1--4},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {https://doi.org/10.23919/FPL.2017.8056823},
  doi       = {10.23919/FPL.2017.8056823},
  timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl    = {https://dblp.org/rec/conf/fpl/MossNSMMSL17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/NaiHSKKK17,
  author    = {Lifeng Nai and
               Ramyad Hadidi and
               Jaewoong Sim and
               Hyojong Kim and
               Pranith Kumar and
               Hyesoon Kim},
  title     = {GraphPIM: Enabling Instruction-Level {PIM} Offloading in Graph Computing
               Frameworks},
  booktitle = {2017 {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2017, Austin, TX, USA, February 4-8, 2017},
  pages     = {457--468},
  publisher = {{IEEE} Computer Society},
  year      = {2017},
  url       = {https://doi.org/10.1109/HPCA.2017.54},
  doi       = {10.1109/HPCA.2017.54},
  timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl    = {https://dblp.org/rec/conf/hpca/NaiHSKKK17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NurvitadhiSSMKM16,
  author    = {Eriko Nurvitadhi and
               Jaewoong Sim and
               David Sheffield and
               Asit K. Mishra and
               Krishnan Srivatsan and
               Debbie Marr},
  editor    = {Paolo Ienne and
               Walid A. Najjar and
               Jason Helge Anderson and
               Philip Brisk and
               Walter Stechele},
  title     = {Accelerating recurrent neural networks in analytics servers: Comparison
               of FPGA, CPU, GPU, and {ASIC}},
  booktitle = {26th International Conference on Field Programmable Logic and Applications,
               {FPL} 2016, Lausanne, Switzerland, August 29 - September 2, 2016},
  pages     = {1--4},
  publisher = {{IEEE}},
  year      = {2016},
  url       = {https://doi.org/10.1109/FPL.2016.7577314},
  doi       = {10.1109/FPL.2016.7577314},
  timestamp = {Fri, 17 Jan 2020 17:11:15 +0100},
  biburl    = {https://dblp.org/rec/conf/fpl/NurvitadhiSSMKM16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/NurvitadhiSSMVM16,
  author    = {Eriko Nurvitadhi and
               David Sheffield and
               Jaewoong Sim and
               Asit K. Mishra and
               Ganesh Venkatesh and
               Debbie Marr},
  editor    = {Yuchen Song and
               Shaojun Wang and
               Brent Nelson and
               Junbao Li and
               Yu Peng},
  title     = {Accelerating Binarized Neural Networks: Comparison of FPGA, CPU, GPU,
               and {ASIC}},
  booktitle = {2016 International Conference on Field-Programmable Technology, {FPT}
               2016, Xi'an, China, December 7-9, 2016},
  pages     = {77--84},
  publisher = {{IEEE}},
  year      = {2016},
  url       = {https://doi.org/10.1109/FPT.2016.7929192},
  doi       = {10.1109/FPT.2016.7929192},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/fpt/NurvitadhiSSMVM16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/LeeSK15,
  author    = {Joo Hwan Lee and
               Jaewoong Sim and
               Hyesoon Kim},
  title     = {BSSync: Processing Near Memory for Machine Learning Workloads with
               Bounded Staleness Consistency Models},
  booktitle = {2015 International Conference on Parallel Architectures and Compilation,
               {PACT} 2015, San Francisco, CA, USA, October 18-21, 2015},
  pages     = {241--252},
  publisher = {{IEEE} Computer Society},
  year      = {2015},
  url       = {https://doi.org/10.1109/PACT.2015.42},
  doi       = {10.1109/PACT.2015.42},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/IEEEpact/LeeSK15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/SimLSO14,
  author    = {Jaewoong Sim and
               Gabriel H. Loh and
               Vilas Sridharan and
               Mike O'Connor},
  title     = {A Configurable and Strong {RAS} Solution for Die-Stacked {DRAM} Caches},
  journal   = {{IEEE} Micro},
  volume    = {34},
  number    = {3},
  pages     = {80--90},
  year      = {2014},
  url       = {https://doi.org/10.1109/MM.2014.13},
  doi       = {10.1109/MM.2014.13},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/micro/SimLSO14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SimACWK14,
  author    = {Jaewoong Sim and
               Alaa R. Alameldeen and
               Zeshan Chishti and
               Chris Wilkerson and
               Hyesoon Kim},
  title     = {Transparent Hardware Management of Stacked {DRAM} as Part of Memory},
  booktitle = {47th Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2014, Cambridge, United Kingdom, December 13-17, 2014},
  pages     = {13--24},
  publisher = {{IEEE} Computer Society},
  year      = {2014},
  url       = {https://doi.org/10.1109/MICRO.2014.56},
  doi       = {10.1109/MICRO.2014.56},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/micro/SimACWK14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SimLSO13,
  author    = {Jaewoong Sim and
               Gabriel H. Loh and
               Vilas Sridharan and
               Mike O'Connor},
  editor    = {Avi Mendelson},
  title     = {Resilient die-stacked {DRAM} caches},
  booktitle = {The 40th Annual International Symposium on Computer Architecture,
               ISCA'13, Tel-Aviv, Israel, June 23-27, 2013},
  pages     = {416--427},
  publisher = {{ACM}},
  year      = {2013},
  url       = {https://doi.org/10.1145/2485922.2485958},
  doi       = {10.1145/2485922.2485958},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/isca/SimLSO13.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SimLQK12,
  author    = {Jaewoong Sim and
               Jaekyu Lee and
               Moinuddin K. Qureshi and
               Hyesoon Kim},
  title     = {FLEXclusion: Balancing cache capacity and on-chip bandwidth via Flexible
               Exclusion},
  booktitle = {39th International Symposium on Computer Architecture {(ISCA} 2012),
               June 9-13, 2012, Portland, OR, {USA}},
  pages     = {321--332},
  publisher = {{IEEE} Computer Society},
  year      = {2012},
  url       = {https://doi.org/10.1109/ISCA.2012.6237028},
  doi       = {10.1109/ISCA.2012.6237028},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/isca/SimLQK12.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SimLKOT12,
  author    = {Jaewoong Sim and
               Gabriel H. Loh and
               Hyesoon Kim and
               Mike O'Connor and
               Mithuna Thottethodi},
  title     = {A Mostly-Clean {DRAM} Cache for Effective Hit Speculation and Self-Balancing
               Dispatch},
  booktitle = {45th Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2012, Vancouver, BC, Canada, December 1-5, 2012},
  pages     = {247--257},
  publisher = {{IEEE} Computer Society},
  year      = {2012},
  url       = {https://doi.org/10.1109/MICRO.2012.31},
  doi       = {10.1109/MICRO.2012.31},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/micro/SimLKOT12.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ppopp/SimDKV12,
  author    = {Jaewoong Sim and
               Aniruddha Dasgupta and
               Hyesoon Kim and
               Richard W. Vuduc},
  editor    = {J. Ramanujam and
               P. Sadayappan},
  title     = {A performance analysis framework for identifying potential benefits
               in {GPGPU} applications},
  booktitle = {Proceedings of the 17th {ACM} {SIGPLAN} Symposium on Principles and
               Practice of Parallel Programming, {PPOPP} 2012, New Orleans, LA, USA,
               February 25-29, 2012},
  pages     = {11--22},
  publisher = {{ACM}},
  year      = {2012},
  url       = {https://doi.org/10.1145/2145816.2145819},
  doi       = {10.1145/2145816.2145819},
  timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/ppopp/SimDKV12.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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