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ORCIDBibTeX records: Paul M. Rosinger
@article{DBLP:journals/tvlsi/EjlaliARMB10,
author = {Alireza Ejlali and
Bashir M. Al{-}Hashimi and
Paul M. Rosinger and
Seyed Ghassem Miremadi and
Luca Benini},
title = {Performability/Energy Tradeoff in Error-Control Schemes for On-Chip
Networks},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {1},
pages = {1--14},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2008.2000994},
doi = {10.1109/TVLSI.2008.2000994},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/EjlaliARMB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/HePERA08,
author = {Zhiyuan He and
Zebo Peng and
Petru Eles and
Paul M. Rosinger and
Bashir M. Al{-}Hashimi},
title = {Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving},
journal = {J. Electron. Test.},
volume = {24},
number = {1-3},
pages = {247--257},
year = {2008},
url = {https://doi.org/10.1007/s10836-007-5030-6},
doi = {10.1007/S10836-007-5030-6},
timestamp = {Tue, 09 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/HePERA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KhursheedIRAH08,
author = {S. Saqib Khursheed and
Urban Ingelsson and
Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Peter Harrod},
title = {Bridging Fault Test Method With Adaptive Power Management Awareness},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {27},
number = {6},
pages = {1117--1127},
year = {2008},
url = {https://doi.org/10.1109/TCAD.2008.923247},
doi = {10.1109/TCAD.2008.923247},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KhursheedIRAH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/ShafikRA08,
author = {Rishad A. Shafik and
Paul M. Rosinger and
Bashir M. Al{-}Hashimi},
editor = {Bernd Straube and
Milos Drutarovsk{\'{y}} and
Michel Renovell and
Peter Gramata and
M{\'{a}}ria Fischerov{\'{a}}},
title = {MPEG-based Performance Comparison between Network-on-Chip and {AMBA}
MPSoC},
booktitle = {Proceedings of the 11th {IEEE} Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems {(DDECS} 2008), Bratislava,
Slovakia, April 16-18, 2008},
pages = {98--103},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DDECS.2008.4538764},
doi = {10.1109/DDECS.2008.4538764},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/ShafikRA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/KhursheedRARH08,
author = {S. Saqib Khursheed and
Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Sudhakar M. Reddy and
Peter Harrod},
title = {Bridge Defect Diagnosis for Multiple-Voltage Design},
booktitle = {13th European Test Symposium, {ETS} 2008, Verbania, Italy, May 25-29,
2008},
pages = {99--104},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ETS.2008.14},
doi = {10.1109/ETS.2008.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/KhursheedRARH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/ShafikRA08,
author = {Rishad A. Shafik and
Paul M. Rosinger and
Bashir M. Al{-}Hashimi},
title = {SystemC-Based Minimum Intrusive Fault Injection Technique with Improved
Fault Representation},
booktitle = {14th {IEEE} International On-Line Testing Symposium {(IOLTS} 2008),
7-9 July 2008, Rhodes, Greece},
pages = {99--104},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/IOLTS.2008.25},
doi = {10.1109/IOLTS.2008.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/ShafikRA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/IngelssonRKAH07,
author = {Urban Ingelsson and
Paul M. Rosinger and
S. Saqib Khursheed and
Bashir M. Al{-}Hashimi and
Peter Harrod},
title = {Resistive Bridging Faults {DFT} with Adaptive Power Management Awareness},
booktitle = {16th Asian Test Symposium, {ATS} 2007, Beijing, China, October 8-11,
2007},
pages = {101--106},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ATS.2007.69},
doi = {10.1109/ATS.2007.69},
timestamp = {Wed, 09 Nov 2022 21:30:34 +0100},
biburl = {https://dblp.org/rec/conf/ats/IngelssonRKAH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/EjlaliARM07,
author = {Alireza Ejlali and
Bashir M. Al{-}Hashimi and
Paul M. Rosinger and
Seyed Ghassem Miremadi},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {Joint consideration of fault-tolerance, energy-efficiency and performance
in on-chip networks},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {1647--1652},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://dl.acm.org/citation.cfm?id=1266728},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/EjlaliARM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-0710-4797,
author = {Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Krishnendu Chakrabarty},
title = {Rapid Generation of Thermal-Safe Test Schedules},
journal = {CoRR},
volume = {abs/0710.4797},
year = {2007},
url = {http://arxiv.org/abs/0710.4797},
eprinttype = {arXiv},
eprint = {0710.4797},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-0710-4797.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/DililloRAG06,
author = {Luigi Dilillo and
Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Patrick Girard},
title = {Reducing Power Dissipation in {SRAM} during Test},
journal = {J. Low Power Electron.},
volume = {2},
number = {2},
pages = {271--280},
year = {2006},
url = {https://doi.org/10.1166/jolpe.2006.062},
doi = {10.1166/JOLPE.2006.062},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/DililloRAG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RosingerAC06,
author = {Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Krishnendu Chakrabarty},
title = {Thermal-Safe Test Scheduling for Core-Based System-on-Chip Integrated
Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {25},
number = {11},
pages = {2502--2512},
year = {2006},
url = {https://doi.org/10.1109/TCAD.2006.873898},
doi = {10.1109/TCAD.2006.873898},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/RosingerAC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/EjlaliASRM06,
author = {Alireza Ejlali and
Bashir M. Al{-}Hashimi and
Marcus T. Schmitz and
Paul M. Rosinger and
Seyed Ghassem Miremadi},
title = {Combined time and information redundancy for SEU-tolerance in energy-efficient
real-time systems},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {14},
number = {4},
pages = {323--335},
year = {2006},
url = {https://doi.org/10.1109/TVLSI.2006.874355},
doi = {10.1109/TVLSI.2006.874355},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/EjlaliASRM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DililloRAG06,
author = {Luigi Dilillo and
Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Patrick Girard},
editor = {Georges G. E. Gielen},
title = {Minimizing test power in {SRAM} through reduction of pre-charge activity},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {1159--1164},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.244016},
doi = {10.1109/DATE.2006.244016},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/DililloRAG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/HePERA06,
author = {Zhiyuan He and
Zebo Peng and
Petru Eles and
Paul M. Rosinger and
Bashir M. Al{-}Hashimi},
title = {Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving},
booktitle = {21th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2006), 4-6 October 2006, Arlington, Virginia,
{USA}},
pages = {477--485},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DFT.2006.65},
doi = {10.1109/DFT.2006.65},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/HePERA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RosingerAC05,
author = {Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Krishnendu Chakrabarty},
title = {Rapid Generation of Thermal-Safe Test Schedules},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {840--845},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.252},
doi = {10.1109/DATE.2005.252},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/RosingerAC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/TafajRAC05,
author = {Enkelejda Tafaj and
Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Krishnendu Chakrabarty},
title = {Improving Thermal-Safe Test Scheduling for Core-Based Systems-on-Chip
Using Shift Frequency Scaling},
booktitle = {20th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2005), 3-5 October 2005, Monterey, CA, {USA}},
pages = {544--551},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DFTVS.2005.40},
doi = {10.1109/DFTVS.2005.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/TafajRAC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/EjlaliSAMR05,
author = {Alireza Ejlali and
Marcus T. Schmitz and
Bashir M. Al{-}Hashimi and
Seyed Ghassem Miremadi and
Paul M. Rosinger},
editor = {Kaushik Roy and
Vivek Tiwari},
title = {Energy efficient SEU-tolerance in DVS-enabled real-time systems through
information redundancy},
booktitle = {Proceedings of the 2005 International Symposium on Low Power Electronics
and Design, 2005, San Diego, California, USA, August 8-10, 2005},
pages = {281--286},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1077603.1077669},
doi = {10.1145/1077603.1077669},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/EjlaliSAMR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RosingerAN04,
author = {Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Nicola Nicolici},
title = {Scan architecture with mutually exclusive scan segment activation
for shift- and capture-power reduction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {23},
number = {7},
pages = {1142--1153},
year = {2004},
url = {https://doi.org/10.1109/TCAD.2004.829797},
doi = {10.1109/TCAD.2004.829797},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RosingerAN04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LampropoulosAR04,
author = {Matheos Lampropoulos and
Bashir M. Al{-}Hashimi and
Paul M. Rosinger},
title = {Minimization of Crosstalk Noise, Delay and Power Using a Modified
Bus Invert Technique},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2004), 16-20 February 2004, Paris, France},
pages = {1372--1373},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DATE.2004.1269094},
doi = {10.1109/DATE.2004.1269094},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/LampropoulosAR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RosingerAN02,
author = {Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Nicola Nicolici},
title = {Power profile manipulation: a new approach for reducing test application
time under power constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {21},
number = {10},
pages = {1217--1225},
year = {2002},
url = {https://doi.org/10.1109/TCAD.2002.802256},
doi = {10.1109/TCAD.2002.802256},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RosingerAN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/RosingerAN02,
author = {Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Nicola Nicolici},
title = {Scan Architecture for Shift and Capture Cycle Power Reduction},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {129--137},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173509},
doi = {10.1109/DFTVS.2002.1173509},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/RosingerAN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RosingerAN02,
author = {Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Nicola Nicolici},
title = {Low Power Mixed-Mode {BIST} Based on Mask Pattern Generation Using
Dual {LFSR} Re-Seeding},
booktitle = {20th International Conference on Computer Design {(ICCD} 2002), {VLSI}
in Computers and Processors, 16-18 September 2002, Freiburg, Germany,
Proceedings},
pages = {474--479},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ICCD.2002.1106816},
doi = {10.1109/ICCD.2002.1106816},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RosingerAN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RosingerAN01,
author = {Paul M. Rosinger and
Bashir M. Al{-}Hashimi and
Nicola Nicolici},
title = {Power constrained test scheduling using power profile manipulation},
booktitle = {Proceedings of the 2001 International Symposium on Circuits and Systems,
{ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
pages = {251--254},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ISCAS.2001.922032},
doi = {10.1109/ISCAS.2001.922032},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RosingerAN01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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