BibTeX records: Alex Ramírez

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@article{DBLP:journals/thipeac/CarpenterRA19,
  author    = {Paul M. Carpenter and
               Alex Ram{\'{\i}}rez and
               Eduard Ayguad{\'{e}}},
  title     = {The Abstract Streaming Machine: Compile-Time Performance Modelling
               of Stream Programs on Heterogeneous Multiprocessors},
  journal   = {T. HiPEAC},
  volume    = {5},
  pages     = {79--99},
  year      = {2019},
  url       = {https://doi.org/10.1007/978-3-662-58834-5\_5},
  doi       = {10.1007/978-3-662-58834-5\_5},
  timestamp = {Wed, 27 Feb 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/thipeac/CarpenterRA19},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/LottariniRCKRSW18,
  author    = {Andrea Lottarini and
               Alex Ram{\'{\i}}rez and
               Joel Coburn and
               Martha A. Kim and
               Parthasarathy Ranganathan and
               Daniel Stodolsky and
               Mark Wachsler},
  title     = {vbench: Benchmarking Video Transcoding in the Cloud},
  booktitle = {Proceedings of the Twenty-Third International Conference on Architectural
               Support for Programming Languages and Operating Systems, {ASPLOS}
               2018, Williamsburg, VA, USA, March 24-28, 2018},
  pages     = {797--809},
  year      = {2018},
  crossref  = {DBLP:conf/asplos/2018},
  url       = {https://doi.org/10.1145/3173162.3173207},
  doi       = {10.1145/3173162.3173207},
  timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/asplos/LottariniRCKRSW18},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/GarciaRVCNR17,
  author    = {Victor Garcia and
               Alejandro Rico and
               Carlos Villavieja and
               Paul M. Carpenter and
               Nacho Navarro and
               Alex Ram{\'{\i}}rez},
  title     = {Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors},
  journal   = {International Journal of Parallel Programming},
  volume    = {45},
  number    = {3},
  pages     = {530--550},
  year      = {2017},
  url       = {https://doi.org/10.1007/s10766-016-0431-8},
  doi       = {10.1007/s10766-016-0431-8},
  timestamp = {Tue, 06 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ijpp/GarciaRVCNR17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/MilicRCR17,
  author    = {Ugljesa Milic and
               Alejandro Rico and
               Paul M. Carpenter and
               Alex Ram{\'{\i}}rez},
  title     = {Sharing the instruction cache among lean cores on an asymmetric {CMP}
               for {HPC} applications},
  booktitle = {2017 {IEEE} International Symposium on Performance Analysis of Systems
               and Software, {ISPASS} 2017, Santa Rosa, CA, USA, April 24-25, 2017},
  pages     = {3--12},
  year      = {2017},
  crossref  = {DBLP:conf/ispass/2017},
  url       = {https://doi.org/10.1109/ISPASS.2017.7975265},
  doi       = {10.1109/ISPASS.2017.7975265},
  timestamp = {Wed, 13 Feb 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/MilicRCR17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/MilicVBAEJRN17,
  author    = {Ugljesa Milic and
               Oreste Villa and
               Evgeny Bolotin and
               Akhil Arunkumar and
               Eiman Ebrahimi and
               Aamer Jaleel and
               Alex Ram{\'{\i}}rez and
               David W. Nellans},
  title     = {Beyond the socket: NUMA-aware GPUs},
  booktitle = {Proceedings of the 50th Annual {IEEE/ACM} International Symposium
               on Microarchitecture, {MICRO} 2017, Cambridge, MA, USA, October 14-18,
               2017},
  pages     = {123--135},
  year      = {2017},
  crossref  = {DBLP:conf/micro/2017},
  url       = {https://doi.org/10.1145/3123939.3124534},
  doi       = {10.1145/3123939.3124534},
  timestamp = {Tue, 06 Nov 2018 16:58:26 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/MilicVBAEJRN17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/MilicCRR16,
  author    = {Ugljesa Milic and
               Paul M. Carpenter and
               Alejandro Rico and
               Alex Ram{\'{\i}}rez},
  title     = {Rebalancing the core front-end through {HPC} code analysis},
  booktitle = {2016 {IEEE} International Symposium on Workload Characterization,
               {IISWC} 2016, Providence, RI, USA, September 25-27, 2016},
  pages     = {128--137},
  year      = {2016},
  crossref  = {DBLP:conf/iiswc/2016},
  url       = {https://doi.org/10.1109/IISWC.2016.7581273},
  doi       = {10.1109/IISWC.2016.7581273},
  timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/iiswc/MilicCRR16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/RajovicRMRVGBNS16,
  author    = {Nikola Rajovic and
               Alejandro Rico and
               Filippo Mantovani and
               Daniel Ruiz and
               Josep Oriol Vilarrubi and
               Constantino Gomez and
               Luna Backes and
               Diego Nieto and
               Harald Servat and
               Xavier Martorell and
               Jes{\'{u}}s Labarta and
               Eduard Ayguad{\'{e}} and
               Chris Adeniyi{-}Jones and
               Said Derradji and
               Herv{\'{e}} Gloaguen and
               Piero Lanucara and
               Nico Sanna and
               Jean{-}Fran{\c{c}}ois M{\'{e}}haut and
               Kevin Pouget and
               Brice Videau and
               Eric Boyer and
               Momme Allalen and
               Axel Auweter and
               David Brayford and
               Daniele Tafani and
               Volker Weinberg and
               Dirk Br{\"{o}}mmel and
               Ren{\'{e}} Halver and
               Jan H. Meinke and
               Ram{\'{o}}n Beivide and
               Mariano Benito and
               Enrique Vallejo and
               Mateo Valero and
               Alex Ram{\'{\i}}rez},
  title     = {The mont-blanc prototype: an alternative approach for {HPC} systems},
  booktitle = {Proceedings of the International Conference for High Performance Computing,
               Networking, Storage and Analysis, {SC} 2016, Salt Lake City, UT, USA,
               November 13-18, 2016},
  pages     = {444--455},
  year      = {2016},
  crossref  = {DBLP:conf/sc/2016},
  url       = {https://doi.org/10.1109/SC.2016.37},
  doi       = {10.1109/SC.2016.37},
  timestamp = {Sat, 16 Sep 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sc/RajovicRMRVGBNS16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/BolotinNVORK15,
  author    = {Evgeny Bolotin and
               David W. Nellans and
               Oreste Villa and
               Mike O'Connor and
               Alex Ram{\'{\i}}rez and
               Stephen W. Keckler},
  title     = {Designing Efficient Heterogeneous Memory Architectures},
  journal   = {{IEEE} Micro},
  volume    = {35},
  number    = {4},
  pages     = {60--68},
  year      = {2015},
  url       = {https://doi.org/10.1109/MM.2015.72},
  doi       = {10.1109/MM.2015.72},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/BolotinNVORK15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SaravananCR15,
  author    = {Karthikeyan P. Saravanan and
               Paul M. Carpenter and
               Alex Ram{\'{\i}}rez},
  title     = {Exploring multiple sleep modes in on/off based energy efficient {HPC}
               networks},
  booktitle = {33rd {IEEE} International Conference on Computer Design, {ICCD} 2015,
               New York City, NY, USA, October 18-21, 2015},
  pages     = {54--61},
  year      = {2015},
  crossref  = {DBLP:conf/iccd/2015},
  url       = {https://doi.org/10.1109/ICCD.2015.7357084},
  doi       = {10.1109/ICCD.2015.7357084},
  timestamp = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iccd/SaravananCR15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iwpc/PavlovicRRR15,
  author    = {Milan Pavlovic and
               Milan Radulovic and
               Alex Ram{\'{\i}}rez and
               Petar Radojkovic},
  title     = {Limpio: LIghtweight {MPI} instrumentatiOn},
  booktitle = {Proceedings of the 2015 {IEEE} 23rd International Conference on Program
               Comprehension, {ICPC} 2015, Florence/Firenze, Italy, May 16-24, 2015},
  pages     = {303--306},
  year      = {2015},
  crossref  = {DBLP:conf/iwpc/2015},
  url       = {https://doi.org/10.1109/ICPC.2015.46},
  doi       = {10.1109/ICPC.2015.46},
  timestamp = {Mon, 22 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iwpc/PavlovicRRR15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fgcs/RajovicRPAR14,
  author    = {Nikola Rajovic and
               Alejandro Rico and
               Nikola Puzovic and
               Chris Adeniyi{-}Jones and
               Alex Ram{\'{\i}}rez},
  title     = {Tibidabo: Making the case for an ARM-based {HPC} system},
  journal   = {Future Generation Comp. Syst.},
  volume    = {36},
  pages     = {322--334},
  year      = {2014},
  url       = {https://doi.org/10.1016/j.future.2013.07.013},
  doi       = {10.1016/j.future.2013.07.013},
  timestamp = {Sat, 27 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/fgcs/RajovicRPAR14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/GrassRCMR14,
  author    = {Thomas Grass and
               Alejandro Rico and
               Marc Casas and
               Miquel Moret{\'{o}} and
               Alex Ram{\'{\i}}rez},
  title     = {Evaluating Execution Time Predictability of Task-Based Programs on
               Multi-Core Processors},
  booktitle = {Euro-Par 2014: Parallel Processing Workshops - Euro-Par 2014 International
               Workshops, Porto, Portugal, August 25-26, 2014, Revised Selected Papers,
               Part {II}},
  pages     = {218--229},
  year      = {2014},
  crossref  = {DBLP:conf/europar/2014w2},
  url       = {https://doi.org/10.1007/978-3-319-14313-2\_19},
  doi       = {10.1007/978-3-319-14313-2\_19},
  timestamp = {Mon, 12 Feb 2018 20:36:55 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/europar/GrassRCMR14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/RamirezFSV14,
  author    = {Alex Ram{\'{\i}}rez and
               Ayose Falc{\'{o}}n and
               Oliverio J. Santana and
               Mateo Valero},
  title     = {Author retrospective for software trace cache},
  booktitle = {{ACM} International Conference on Supercomputing 25th Anniversary
               Volume},
  pages     = {45--47},
  year      = {2014},
  crossref  = {DBLP:conf/ics/25a},
  url       = {https://doi.org/10.1145/2591635.2594508},
  doi       = {10.1145/2591635.2594508},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ics/RamirezFSV14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/SaravananCR14,
  author    = {Karthikeyan P. Saravanan and
               Paul M. Carpenter and
               Alex Ram{\'{\i}}rez},
  title     = {A performance perspective on energy efficient {HPC} links},
  booktitle = {2014 International Conference on Supercomputing, ICS'14, Muenchen,
               Germany, June 10-13, 2014},
  pages     = {313--322},
  year      = {2014},
  crossref  = {DBLP:conf/ics/2014},
  url       = {https://doi.org/10.1145/2597652.2597671},
  doi       = {10.1145/2597652.2597671},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ics/SaravananCR14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/GrassoRRGR14,
  author    = {Ivan Grasso and
               Petar Radojkovic and
               Nikola Rajovic and
               Isaac Gelado and
               Alex Ram{\'{\i}}rez},
  title     = {Energy Efficient {HPC} on Embedded SoCs: Optimization Techniques for
               Mali {GPU}},
  booktitle = {2014 {IEEE} 28th International Parallel and Distributed Processing
               Symposium, Phoenix, AZ, USA, May 19-23, 2014},
  pages     = {123--132},
  year      = {2014},
  crossref  = {DBLP:conf/ipps/2014},
  url       = {https://doi.org/10.1109/IPDPS.2014.24},
  doi       = {10.1109/IPDPS.2014.24},
  timestamp = {Tue, 12 Feb 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ipps/GrassoRRGR14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/TanasicGCRNV14,
  author    = {Ivan Tanasic and
               Isaac Gelado and
               Javier Cabezas and
               Alex Ram{\'{\i}}rez and
               Nacho Navarro and
               Mateo Valero},
  title     = {Enabling preemptive multiprogramming on GPUs},
  booktitle = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
               {ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
  pages     = {193--204},
  year      = {2014},
  crossref  = {DBLP:conf/isca/2014},
  url       = {https://doi.org/10.1109/ISCA.2014.6853208},
  doi       = {10.1109/ISCA.2014.6853208},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/TanasicGCRNV14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcphy/GoddekeKGRRPR13,
  author    = {Dominik G{\"{o}}ddeke and
               Dimitri Komatitsch and
               Markus Geveler and
               Dirk Ribbrock and
               Nikola Rajovic and
               Nikola Puzovic and
               Alex Ram{\'{\i}}rez},
  title     = {Energy efficiency vs. performance of the numerical solution of PDEs:
               An application study on a low-power ARM-based cluster},
  journal   = {J. Comput. Physics},
  volume    = {237},
  pages     = {132--150},
  year      = {2013},
  url       = {https://doi.org/10.1016/j.jcp.2012.11.031},
  doi       = {10.1016/j.jcp.2012.11.031},
  timestamp = {Tue, 06 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/jcphy/GoddekeKGRRPR13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jocs/RajovicVVPR13,
  author    = {Nikola Rajovic and
               Llu{\'{\i}}s Vilanova and
               Carlos Villavieja and
               Nikola Puzovic and
               Alex Ram{\'{\i}}rez},
  title     = {The low power architecture approach towards exascale computing},
  journal   = {J. Comput. Science},
  volume    = {4},
  number    = {6},
  pages     = {439--443},
  year      = {2013},
  url       = {https://doi.org/10.1016/j.jocs.2013.01.002},
  doi       = {10.1016/j.jocs.2013.01.002},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/jocs/RajovicVVPR13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RajovicRVGPR13,
  author    = {Nikola Rajovic and
               Alejandro Rico and
               James Vipond and
               Isaac Gelado and
               Nikola Puzovic and
               Alex Ram{\'{\i}}rez},
  title     = {Experiences with mobile processors for energy efficient {HPC}},
  booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
               March 18-22, 2013},
  pages     = {464--468},
  year      = {2013},
  crossref  = {DBLP:conf/date/2013},
  url       = {https://doi.org/10.7873/DATE.2013.103},
  doi       = {10.7873/DATE.2013.103},
  timestamp = {Tue, 23 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/date/RajovicRVGPR13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/PavlovicPR13,
  author    = {Milan Pavlovic and
               Nikola Puzovic and
               Alex Ram{\'{\i}}rez},
  title     = {Data placement in {HPC} architectures with heterogeneous off-chip
               memory},
  booktitle = {2013 {IEEE} 31st International Conference on Computer Design, {ICCD}
               2013, Asheville, NC, USA, October 6-9, 2013},
  pages     = {193--200},
  year      = {2013},
  crossref  = {DBLP:conf/iccd/2013},
  url       = {https://doi.org/10.1109/ICCD.2013.6657042},
  doi       = {10.1109/ICCD.2013.6657042},
  timestamp = {Mon, 11 Feb 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/iccd/PavlovicPR13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/CieskoBPRBL13,
  author    = {Jan Ciesko and
               Javier Bueno and
               Nikola Puzovic and
               Alex Ram{\'{\i}}rez and
               Rosa M. Badia and
               Jes{\'{u}}s Labarta},
  title     = {Programmable and Scalable Reductions on Clusters},
  booktitle = {27th {IEEE} International Symposium on Parallel and Distributed Processing,
               {IPDPS} 2013, Cambridge, MA, USA, May 20-24, 2013},
  pages     = {560--568},
  year      = {2013},
  crossref  = {DBLP:conf/ipps/2013},
  url       = {https://doi.org/10.1109/IPDPS.2013.63},
  doi       = {10.1109/IPDPS.2013.63},
  timestamp = {Sat, 16 Sep 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ipps/CieskoBPRBL13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/RicoRV13,
  author    = {Alejandro Rico and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Trace filtering of multithreaded applications for {CMP} memory simulation},
  booktitle = {2012 {IEEE} International Symposium on Performance Analysis of Systems
               {\&} Software, Austin, TX, USA, 21-23 April, 2013},
  pages     = {134--135},
  year      = {2013},
  crossref  = {DBLP:conf/ispass/2013},
  url       = {https://doi.org/10.1109/ISPASS.2013.6557160},
  doi       = {10.1109/ISPASS.2013.6557160},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/RicoRV13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/SaravananCR13,
  author    = {Karthikeyan P. Saravanan and
               Paul M. Carpenter and
               Alex Ram{\'{\i}}rez},
  title     = {Power/performance evaluation of energy efficient Ethernet {(EEE)}
               for High Performance Computing},
  booktitle = {2012 {IEEE} International Symposium on Performance Analysis of Systems
               {\&} Software, Austin, TX, USA, 21-23 April, 2013},
  pages     = {205--214},
  year      = {2013},
  crossref  = {DBLP:conf/ispass/2013},
  url       = {https://doi.org/10.1109/ISPASS.2013.6557171},
  doi       = {10.1109/ISPASS.2013.6557171},
  timestamp = {Sun, 04 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/SaravananCR13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/MilicGPRT13,
  author    = {Ugljesa Milic and
               Isaac Gelado and
               Nikola Puzovic and
               Alex Ram{\'{\i}}rez and
               Milo Tomasevic},
  title     = {Parallelizing general histogram application for {CUDA} architectures},
  booktitle = {2013 International Conference on Embedded Computer Systems: Architectures,
               Modeling, and Simulation, {SAMOS} 2013, Agios Konstantinos, Samos
               Island, Greece, July 15-18, 2013},
  pages     = {11--18},
  year      = {2013},
  crossref  = {DBLP:conf/samos/2013ic},
  url       = {https://doi.org/10.1109/SAMOS.2013.6621100},
  doi       = {10.1109/SAMOS.2013.6621100},
  timestamp = {Thu, 25 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/MilicGPRT13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/RajovicCGPRV13,
  author    = {Nikola Rajovic and
               Paul M. Carpenter and
               Isaac Gelado and
               Nikola Puzovic and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Supercomputing with commodity CPUs: are mobile SoCs ready for HPC?},
  booktitle = {International Conference for High Performance Computing, Networking,
               Storage and Analysis, SC'13, Denver, CO, {USA} - November 17 - 21,
               2013},
  pages     = {40:1--40:12},
  year      = {2013},
  crossref  = {DBLP:conf/sc/2013},
  url       = {https://doi.org/10.1145/2503210.2503281},
  doi       = {10.1145/2503210.2503281},
  timestamp = {Tue, 06 Nov 2018 16:59:29 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/sc/RajovicCGPRV13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:series/sbcs/JuurlinkACAMR12,
  author    = {Ben H. H. Juurlink and
               Mauricio Alvarez Mesa and
               Chi Ching Chi and
               Arnaldo Azevedo and
               Cor Meenderinck and
               Alex Ram{\'{\i}}rez},
  title     = {Scalable Parallel Programming Applied to {H.264/AVC} Decoding},
  series    = {Springer Briefs in Computer Science},
  publisher = {Springer},
  year      = {2012},
  url       = {https://doi.org/10.1007/978-1-4614-2230-3},
  doi       = {10.1007/978-1-4614-2230-3},
  isbn      = {978-1-4614-2229-7},
  timestamp = {Tue, 16 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/series/sbcs/JuurlinkACAMR12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/bioinformatics/GonzalezMSPBRT12,
  author    = {Santi Gonz{\'{a}}lez and
               B{\`{a}}rbara Montserrat{-}Sent{\'{\i}}s and
               Friman S{\'{a}}nchez and
               Montserrat Puiggr{\`{o}}s and
               Enrique Blanco and
               Alex Ram{\'{\i}}rez and
               David Torrents},
  title     = {ReLA, a local alignment search tool for the identification of distal
               and proximal gene regulatory regions and their conserved transcription
               factor binding sites},
  journal   = {Bioinformatics},
  volume    = {28},
  number    = {6},
  pages     = {763--770},
  year      = {2012},
  url       = {https://doi.org/10.1093/bioinformatics/bts024},
  doi       = {10.1093/bioinformatics/bts024},
  timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/bioinformatics/GonzalezMSPBRT12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/RicoCVPVERV12,
  author    = {Alejandro Rico and
               Felipe Cabarcas and
               Carlos Villavieja and
               Milan Pavlovic and
               Augusto Vega and
               Yoav Etsion and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {On the simulation of large-scale architectures using multiple application
               abstraction levels},
  journal   = {{TACO}},
  volume    = {8},
  number    = {4},
  pages     = {36:1--36:20},
  year      = {2012},
  url       = {https://doi.org/10.1145/2086696.2086715},
  doi       = {10.1145/2086696.2086715},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/taco/RicoCVPVERV12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/VujicCTRMA12,
  author    = {Nikola Vujic and
               Felipe Cabarcas and
               Marc Gonz{\'{a}}lez Tallada and
               Alex Ram{\'{\i}}rez and
               Xavier Martorell and
               Eduard Ayguad{\'{e}}},
  title     = {{DMA++:} On the Fly Data Realignment for On-Chip Memories},
  journal   = {{IEEE} Trans. Computers},
  volume    = {61},
  number    = {2},
  pages     = {237--250},
  year      = {2012},
  url       = {https://doi.org/10.1109/TC.2010.255},
  doi       = {10.1109/TC.2010.255},
  timestamp = {Thu, 08 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tc/VujicCTRMA12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/RamirezNKM12,
  author    = {Alex Ram{\'{\i}}rez and
               Dimitrios S. Nikolopoulos and
               David R. Kaeli and
               Satoshi Matsuoka},
  title     = {Topic 16: {GPU} and Accelerators Computing},
  booktitle = {Euro-Par 2012 Parallel Processing - 18th International Conference,
               Euro-Par 2012, Rhodes Island, Greece, August 27-31, 2012. Proceedings},
  pages     = {857--858},
  year      = {2012},
  crossref  = {DBLP:conf/europar/2012},
  url       = {https://doi.org/10.1007/978-3-642-32820-6\_84},
  doi       = {10.1007/978-3-642-32820-6\_84},
  timestamp = {Wed, 24 May 2017 08:27:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/RamirezNKM12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/RadojkovicCMRC12,
  author    = {Petar Radojkovic and
               Paul M. Carpenter and
               Miquel Moret{\'{o}} and
               Alex Ram{\'{\i}}rez and
               Francisco J. Cazorla},
  title     = {Kernel Partitioning of Streaming Applications: {A} Statistical Approach
               to an NP-complete Problem},
  booktitle = {45th Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2012, Vancouver, BC, Canada, December 1-5, 2012},
  pages     = {401--412},
  year      = {2012},
  crossref  = {DBLP:conf/micro/2012},
  url       = {https://doi.org/10.1109/MICRO.2012.44},
  doi       = {10.1109/MICRO.2012.44},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/RadojkovicCMRC12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/SanchezCRV11,
  author    = {Friman S{\'{a}}nchez and
               Felipe Cabarcas and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Scalable multicore architectures for long {DNA} sequence comparison},
  journal   = {Concurrency and Computation: Practice and Experience},
  volume    = {23},
  number    = {17},
  pages     = {2205--2219},
  year      = {2011},
  url       = {https://doi.org/10.1002/cpe.1753},
  doi       = {10.1002/cpe.1753},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/concurrency/SanchezCRV11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/MunkABCCCCDDFFLLMMNOPPPRRRRSTZ11,
  author    = {Harm Munk and
               Eduard Ayguad{\'{e}} and
               C{\'{e}}dric Bastoul and
               Paul M. Carpenter and
               Zbigniew Chamski and
               Albert Cohen and
               Marco Cornero and
               Philippe Dumont and
               Marc Duranton and
               Mohammed Fellahi and
               Roger Ferrer and
               Razya Ladelsky and
               Menno Lindwer and
               Xavier Martorell and
               Cupertino Miranda and
               Dorit Nuzman and
               Andrea C. Ornstein and
               Antoniu Pop and
               Sebastian Pop and
               Louis{-}No{\"{e}}l Pouchet and
               Alex Ram{\'{\i}}rez and
               David R{\'{o}}denas and
               Erven Rohou and
               Ira Rosen and
               Uzi Shvadron and
               Konrad Trifunovic and
               Ayal Zaks},
  title     = {{ACOTES} Project: Advanced Compiler Technologies for Embedded Streaming},
  journal   = {International Journal of Parallel Programming},
  volume    = {39},
  number    = {3},
  pages     = {397--450},
  year      = {2011},
  url       = {https://doi.org/10.1007/s10766-010-0132-7},
  doi       = {10.1007/s10766-010-0132-7},
  timestamp = {Tue, 06 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ijpp/MunkABCCCCDDFFLLMMNOPPPRRRRSTZ11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/GonzalezGCMRLV11,
  author    = {Juan Gonzalez and
               Judit Gim{\'{e}}nez and
               Marc Casas and
               Miquel Moret{\'{o}} and
               Alex Ram{\'{\i}}rez and
               Jes{\'{u}}s Labarta and
               Mateo Valero},
  title     = {Simulating Whole Supercomputer Applications},
  journal   = {{IEEE} Micro},
  volume    = {31},
  number    = {3},
  pages     = {32--45},
  year      = {2011},
  url       = {https://doi.org/10.1109/MM.2011.58},
  doi       = {10.1109/MM.2011.58},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/GonzalezGCMRLV11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/MoretoCRV11,
  author    = {Miquel Moret{\'{o}} and
               Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Dynamic Cache Partitioning Based on the {MLP} of Cache Misses},
  journal   = {Trans. HiPEAC},
  volume    = {3},
  pages     = {3--23},
  year      = {2011},
  crossref  = {DBLP:journals/thipeac/2011-3},
  url       = {https://doi.org/10.1007/978-3-642-19448-1\_1},
  doi       = {10.1007/978-3-642-19448-1\_1},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/thipeac/MoretoCRV11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/AzevedoJMTHARV11,
  author    = {Arnaldo Azevedo and
               Ben H. H. Juurlink and
               Cor Meenderinck and
               Andrei Terechko and
               Jan Hoogerbrugge and
               Mauricio Alvarez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {A Highly Scalable Parallel Implementation of {H.264}},
  journal   = {Trans. HiPEAC},
  volume    = {4},
  pages     = {111--134},
  year      = {2011},
  crossref  = {DBLP:journals/thipeac/2011-4},
  url       = {https://doi.org/10.1007/978-3-642-24568-8\_6},
  doi       = {10.1007/978-3-642-24568-8\_6},
  timestamp = {Thu, 08 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/thipeac/AzevedoJMTHARV11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/VillaviejaKVERMNCU11,
  author    = {Carlos Villavieja and
               Vasileios Karakostas and
               Llu{\'{\i}}s Vilanova and
               Yoav Etsion and
               Alex Ram{\'{\i}}rez and
               Avi Mendelson and
               Nacho Navarro and
               Adri{\'{a}}n Cristal and
               Osman S. Unsal},
  title     = {DiDi: Mitigating the Performance Impact of {TLB} Shootdowns Using
               a Shared {TLB} Directory},
  booktitle = {2011 International Conference on Parallel Architectures and Compilation
               Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
  pages     = {340--349},
  year      = {2011},
  crossref  = {DBLP:conf/IEEEpact/2011},
  url       = {https://doi.org/10.1109/PACT.2011.65},
  doi       = {10.1109/PACT.2011.65},
  timestamp = {Mon, 29 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/VillaviejaKVERMNCU11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/CiobanuMKRG11,
  author    = {Catalin Bogdan Ciobanu and
               Xavier Martorell and
               Georgi Kuzmanov and
               Alex Ram{\'{\i}}rez and
               Georgi Gaydadjiev},
  title     = {Scalability Evaluation of a Polymorphic Register File: {A} {CG} Case
               Study},
  booktitle = {Architecture of Computing Systems - {ARCS} 2011 - 24th International
               Conference, Como, Italy, February 24-25, 2011. Proceedings},
  pages     = {13--25},
  year      = {2011},
  crossref  = {DBLP:conf/arcs/2011},
  url       = {https://doi.org/10.1007/978-3-642-19137-4\_2},
  doi       = {10.1007/978-3-642-19137-4\_2},
  timestamp = {Thu, 01 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/arcs/CiobanuMKRG11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/IsazaSCRG11,
  author    = {Sebasti{\'{a}}n Isaza and
               Friman S{\'{a}}nchez and
               Felipe Cabarcas and
               Alex Ram{\'{\i}}rez and
               Georgi Gaydadjiev},
  title     = {Parametrizing multicore architectures for multiple sequence alignment},
  booktitle = {Proceedings of the 8th Conference on Computing Frontiers, 2011, Ischia,
               Italy, May 3-5, 2011},
  pages     = {31},
  year      = {2011},
  crossref  = {DBLP:conf/cf/2011},
  url       = {https://doi.org/10.1145/2016604.2016642},
  doi       = {10.1145/2016604.2016642},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cf/IsazaSCRG11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cisis/IsazaHSRG11,
  author    = {Sebasti{\'{a}}n Isaza and
               Ernst Houtgast and
               Friman S{\'{a}}nchez and
               Alex Ram{\'{\i}}rez and
               Georgi Gaydadjiev},
  title     = {Scaling {HMMER} Performance on Multicore Architectures},
  booktitle = {International Conference on Complex, Intelligent and Software Intensive
               Systems, {CISIS} 2011, June 30 - July 2, 2011, Korean Bible University,
               Seoul, Korea},
  pages     = {618--623},
  year      = {2011},
  crossref  = {DBLP:conf/cisis/2011},
  url       = {https://doi.org/10.1109/CISIS.2011.102},
  doi       = {10.1109/CISIS.2011.102},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/cisis/IsazaHSRG11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/VillaviejaERN11,
  author    = {Carlos Villavieja and
               Yoav Etsion and
               Alex Ram{\'{\i}}rez and
               Nacho Navarro},
  title     = {{FELI:} {HW/SW} Support for On-Chip Distributed Shared Memory in Multicores},
  booktitle = {Euro-Par 2011 Parallel Processing - 17th International Conference,
               Euro-Par 2011, Bordeaux, France, August 29 - September 2, 2011, Proceedings,
               Part {I}},
  pages     = {282--294},
  year      = {2011},
  crossref  = {DBLP:conf/europar/2011-1},
  url       = {https://doi.org/10.1007/978-3-642-23400-2\_27},
  doi       = {10.1007/978-3-642-23400-2\_27},
  timestamp = {Wed, 24 May 2017 08:27:46 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/VillaviejaERN11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/PavlovicER11,
  author    = {Milan Pavlovic and
               Yoav Etsion and
               Alex Ram{\'{\i}}rez},
  title     = {On the memory system requirements of future scientific applications:
               Four case-studies},
  booktitle = {Proceedings of the 2011 {IEEE} International Symposium on Workload
               Characterization, {IISWC} 2011, Austin, TX, USA, November 6-8, 2011},
  pages     = {159--170},
  year      = {2011},
  crossref  = {DBLP:conf/iiswc/2011},
  url       = {https://doi.org/10.1109/IISWC.2011.6114176},
  doi       = {10.1109/IISWC.2011.6114176},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iiswc/PavlovicER11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/RicoDCERV11,
  author    = {Alejandro Rico and
               Alejandro Duran and
               Felipe Cabarcas and
               Yoav Etsion and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Trace-driven simulation of multithreaded applications},
  booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
               and Software, {ISPASS} 2011, 10-12 April, 2011, Austin, TX, {USA}},
  pages     = {87--96},
  year      = {2011},
  crossref  = {DBLP:conf/ispass/2011},
  url       = {https://doi.org/10.1109/ISPASS.2011.5762718},
  doi       = {10.1109/ISPASS.2011.5762718},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/RicoDCERV11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/Ramirez11,
  author    = {Alex Ram{\'{\i}}rez},
  title     = {Supercomputing: Past, present, and a possible future},
  booktitle = {2011 International Conference on Embedded Computer Systems: Architectures,
               Modeling, and Simulation, {SAMOS} XI, Samos, Greece, July 18-21, 2011},
  year      = {2011},
  crossref  = {DBLP:conf/samos/2011ic},
  url       = {https://doi.org/10.1109/SAMOS.2011.6045437},
  doi       = {10.1109/SAMOS.2011.6045437},
  timestamp = {Thu, 25 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/Ramirez11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/VegaCRV11,
  author    = {Augusto Vega and
               Felipe Cabarcas and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Breaking the bandwidth wall in chip multiprocessors},
  booktitle = {2011 International Conference on Embedded Computer Systems: Architectures,
               Modeling, and Simulation, {SAMOS} XI, Samos, Greece, July 18-21, 2011},
  pages     = {255--262},
  year      = {2011},
  crossref  = {DBLP:conf/samos/2011ic},
  url       = {https://doi.org/10.1109/SAMOS.2011.6045469},
  doi       = {10.1109/SAMOS.2011.6045469},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/VegaCRV11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/RajovicPVVR11,
  author    = {Nikola Rajovic and
               Nikola Puzovic and
               Llu{\'{\i}}s Vilanova and
               Carlos Villavieja and
               Alex Ram{\'{\i}}rez},
  title     = {The low-power architecture approach towards exascale computing},
  booktitle = {Proceedings of the second workshop on Scalable algorithms for large-scale
               systems, ScalA@SC 2011, Seattle, WA, USA, November 14, 2011},
  pages     = {1--2},
  year      = {2011},
  crossref  = {DBLP:conf/sc/2011scala},
  url       = {https://doi.org/10.1145/2133173.2133175},
  doi       = {10.1145/2133173.2133175},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/sc/RajovicPVVR11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/DesmetGRTV10,
  author    = {Veerle Desmet and
               Sylvain Girbal and
               Alex Ram{\'{\i}}rez and
               Olivier Temam and
               Augusto Vega},
  title     = {ArchExplorer for Automatic Design Space Exploration},
  journal   = {{IEEE} Micro},
  volume    = {30},
  number    = {5},
  pages     = {5--15},
  year      = {2010},
  url       = {https://doi.org/10.1109/MM.2010.76},
  doi       = {10.1109/MM.2010.76},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/DesmetGRTV10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/RamirezCJASAMCIG10,
  author    = {Alex Ram{\'{\i}}rez and
               Felipe Cabarcas and
               Ben H. H. Juurlink and
               Mauricio Alvarez and
               Friman S{\'{a}}nchez and
               Arnaldo Azevedo and
               Cor Meenderinck and
               Catalin Bogdan Ciobanu and
               Sebasti{\'{a}}n Isaza and
               Georgi Gaydadjiev},
  title     = {The {SARC} Architecture},
  journal   = {{IEEE} Micro},
  volume    = {30},
  number    = {5},
  pages     = {16--29},
  year      = {2010},
  url       = {https://doi.org/10.1109/MM.2010.79},
  doi       = {10.1109/MM.2010.79},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/RamirezCJASAMCIG10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cisis/IsazaSGRV10,
  author    = {Sebasti{\'{a}}n Isaza and
               Friman S{\'{a}}nchez and
               Georgi Gaydadjiev and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Scalability Analysis of Progressive Alignment on a Multicore},
  booktitle = {{CISIS} 2010, The Fourth International Conference on Complex, Intelligent
               and Software Intensive Systems, Krakow, Poland, 15-18 February 2010},
  pages     = {889--894},
  year      = {2010},
  crossref  = {DBLP:conf/cisis/2010},
  url       = {https://doi.org/10.1109/CISIS.2010.149},
  doi       = {10.1109/CISIS.2010.149},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/cisis/IsazaSGRV10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/csedu/RamirezJRUH10,
  author    = {Alex Ram{\'{\i}}rez and
               Shaobo Ji and
               Rob Riordan and
               Frank Ulbrich and
               Michael J. Hine},
  title     = {Empowering Business Students - Using Web 2.0 Tools in the Classroom},
  booktitle = {{CSEDU} 2010 - Proceedings of the Second International Conference
               on Computer Supported Education, Valencia, Spain, April 7-10, 2010
               - Volume 1},
  pages     = {147--153},
  year      = {2010},
  crossref  = {DBLP:conf/csedu/2010-1},
  timestamp = {Tue, 05 Jul 2011 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/csedu/RamirezJRUH10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/CarpenterRA10,
  author    = {Paul M. Carpenter and
               Alex Ram{\'{\i}}rez and
               Eduard Ayguad{\'{e}}},
  title     = {Starsscheck: {A} Tool to Find Errors in Task-Based Parallel Programs},
  booktitle = {Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference,
               Ischia, Italy, August 31 - September 3, 2010, Proceedings, Part {I}},
  pages     = {2--13},
  year      = {2010},
  crossref  = {DBLP:conf/europar/2010-1},
  url       = {https://doi.org/10.1007/978-3-642-15277-1\_2},
  doi       = {10.1007/978-3-642-15277-1\_2},
  timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/CarpenterRA10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/SanchezCRV10,
  author    = {Friman S{\'{a}}nchez and
               Felipe Cabarcas and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Long {DNA} Sequence Comparison on Multicore Architectures},
  booktitle = {Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference,
               Ischia, Italy, August 31 - September 3, 2010, Proceedings, Part {II}},
  pages     = {247--259},
  year      = {2010},
  crossref  = {DBLP:conf/europar/2010-2},
  url       = {https://doi.org/10.1007/978-3-642-15291-7\_24},
  doi       = {10.1007/978-3-642-15291-7\_24},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/SanchezCRV10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/CarpenterRA10,
  author    = {Paul M. Carpenter and
               Alex Ram{\'{\i}}rez and
               Eduard Ayguad{\'{e}}},
  title     = {Buffer Sizing for Self-timed Stream Programs on Heterogeneous Distributed
               Memory Multiprocessors},
  booktitle = {High Performance Embedded Architectures and Compilers, 5th International
               Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings},
  pages     = {96--110},
  year      = {2010},
  crossref  = {DBLP:conf/hipeac/2010},
  url       = {https://doi.org/10.1007/978-3-642-11515-8\_9},
  doi       = {10.1007/978-3-642-11515-8\_9},
  timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hipeac/CarpenterRA10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/VujicGCRMA10,
  author    = {Nikola Vujic and
               Marc Gonz{\'{a}}lez and
               Felipe Cabarcas and
               Alex Ram{\'{\i}}rez and
               Xavier Martorell and
               Eduard Ayguad{\'{e}}},
  title     = {{DMA++:} on the fly data realignment for on-chip memories},
  booktitle = {16th International Conference on High-Performance Computer Architecture
               {(HPCA-16} 2010), 9-14 January 2010, Bangalore, India},
  pages     = {1--12},
  year      = {2010},
  crossref  = {DBLP:conf/hpca/2010},
  url       = {https://doi.org/10.1109/HPCA.2010.5463057},
  doi       = {10.1109/HPCA.2010.5463057},
  timestamp = {Thu, 07 Feb 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/VujicGCRMA10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PavlovicER10,
  author    = {Milan Pavlovic and
               Yoav Etsion and
               Alex Ram{\'{\i}}rez},
  title     = {Can Manycores Support the Memory Requirements of Scientific Applications?},
  booktitle = {Computer Architecture - {ISCA} 2010 International Workshops A4MMC,
               AMAS-BT, EAMA, WEED, WIOSCA, Saint-Malo, France, June 19-23, 2010,
               Revised Selected Papers},
  pages     = {65--76},
  year      = {2010},
  crossref  = {DBLP:conf/isca/2010w},
  url       = {https://doi.org/10.1007/978-3-642-24322-6\_7},
  doi       = {10.1007/978-3-642-24322-6\_7},
  timestamp = {Tue, 23 May 2017 01:12:15 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/PavlovicER10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/EtsionCRRBALV10,
  author    = {Yoav Etsion and
               Felipe Cabarcas and
               Alejandro Rico and
               Alex Ram{\'{\i}}rez and
               Rosa M. Badia and
               Eduard Ayguad{\'{e}} and
               Jes{\'{u}}s Labarta and
               Mateo Valero},
  title     = {Task Superscalar: An Out-of-Order Task Pipeline},
  booktitle = {43rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2010, 4-8 December 2010, Atlanta, Georgia, {USA}},
  pages     = {89--100},
  year      = {2010},
  crossref  = {DBLP:conf/micro/2010},
  url       = {https://doi.org/10.1109/MICRO.2010.13},
  doi       = {10.1109/MICRO.2010.13},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/EtsionCRRBALV10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/CiobanuKGR10,
  author    = {Catalin Bogdan Ciobanu and
               Georgi Kuzmanov and
               Georgi Gaydadjiev and
               Alex Ram{\'{\i}}rez},
  title     = {A Polymorphic Register File for matrix operations},
  booktitle = {Proceedings of the 2010 International Conference on Embedded Computer
               Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2010),
               Samos, Greece, July 19-22, 2010},
  pages     = {241--249},
  year      = {2010},
  crossref  = {DBLP:conf/samos/2010ic},
  url       = {https://doi.org/10.1109/ICSAMOS.2010.5642059},
  doi       = {10.1109/ICSAMOS.2010.5642059},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/CiobanuKGR10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/CabarcasRER10,
  author    = {Felipe Cabarcas and
               Alejandro Rico and
               Yoav Etsion and
               Alex Ram{\'{\i}}rez},
  title     = {Interleaving granularity on high bandwidth memory architecture for
               CMPs},
  booktitle = {Proceedings of the 2010 International Conference on Embedded Computer
               Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2010),
               Samos, Greece, July 19-22, 2010},
  pages     = {250--257},
  year      = {2010},
  crossref  = {DBLP:conf/samos/2010ic},
  url       = {https://doi.org/10.1109/ICSAMOS.2010.5642060},
  doi       = {10.1109/ICSAMOS.2010.5642060},
  timestamp = {Thu, 25 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/CabarcasRER10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:journals/procedia/AloBBKFR10,
  author    = {Richard Al{\'{o}} and
               Diane Baxter and
               Karl Barnes and
               Al Kuslikis and
               Geoffrey C. Fox and
               Alex Ram{\'{\i}}rez},
  title     = {Advancing Computational Science, Visualization and Homeland Security
               Research/ Education at Minority Serving Institutions National Model
               Promoted/ Implemented by {MSI-CIEC} (Minority Serving Institutions-CyberInfrastructure
               Empowerment Coalition)},
  booktitle = {Proceedings of the International Conference on Computational Science,
               {ICCS} 2010, University of Amsterdam, The Netherlands, May 31 - June
               2, 2010},
  number    = {1},
  pages     = {903--912},
  year      = {2010},
  crossref  = {DBLP:conf/iccS/2010},
  url       = {https://doi.org/10.1016/j.procs.2010.04.099},
  doi       = {10.1016/j.procs.2010.04.099},
  timestamp = {Mon, 21 Aug 2017 16:43:25 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/procedia/AloBBKFR10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/rasi/AlvarezRVAM09,
  author    = {Mauricio Alvarez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero and
               Arnaldo Azevedo and
               Cor Meenderinck},
  title     = {Evaluaci{\'{o}}n del rendimiento paralelo en el nivel macro bloque
               del decodificador {H.264} en una arquitectura multiprocesador cc-NUMA},
  journal   = {{RASI}},
  volume    = {6},
  number    = {1},
  pages     = {219--228},
  year      = {2009},
  url       = {http://www.minas.medellin.unal.edu.co/index.php?option=com\_docman\&\#38;task=doc\_view\&\#38;gid=571\&\#38;tmpl=component\&\#38;format=raw\&\#38;Itemid=285},
  timestamp = {Mon, 09 May 2011 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/rasi/AlvarezRVAM09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigops/MoretoCRSV09,
  author    = {Miquel Moret{\'{o}} and
               Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Rizos Sakellariou and
               Mateo Valero},
  title     = {FlexDCP: a QoS framework for {CMP} architectures},
  journal   = {Operating Systems Review},
  volume    = {43},
  number    = {2},
  pages     = {86--96},
  year      = {2009},
  url       = {https://doi.org/10.1145/1531793.1531806},
  doi       = {10.1145/1531793.1531806},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/sigops/MoretoCRSV09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sp/RicoRV09,
  author    = {Alejandro Rico and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Available task-level parallelism on the Cell {BE}},
  journal   = {Scientific Programming},
  volume    = {17},
  number    = {1-2},
  pages     = {59--76},
  year      = {2009},
  url       = {https://doi.org/10.3233/SPR-2009-0269},
  doi       = {10.3233/SPR-2009-0269},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/sp/RicoRV09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sp/BellensPCRBL09,
  author    = {Pieter Bellens and
               Josep M. P{\'{e}}rez and
               Felipe Cabarcas and
               Alex Ram{\'{\i}}rez and
               Rosa M. Badia and
               Jes{\'{u}}s Labarta},
  title     = {CellSs: Scheduling techniques to better exploit memory hierarchy},
  journal   = {Scientific Programming},
  volume    = {17},
  number    = {1-2},
  pages     = {77--95},
  year      = {2009},
  url       = {https://doi.org/10.3233/SPR-2009-0272},
  doi       = {10.3233/SPR-2009-0272},
  timestamp = {Thu, 08 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/sp/BellensPCRBL09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/SantanaFRV09,
  author    = {Oliverio J. Santana and
               Ayose Falc{\'{o}}n and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {{DIA:} {A} Complexity-Effective Decoding Architecture},
  journal   = {{IEEE} Trans. Computers},
  volume    = {58},
  number    = {4},
  pages     = {448--462},
  year      = {2009},
  url       = {https://doi.org/10.1109/TC.2008.170},
  doi       = {10.1109/TC.2008.170},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tc/SantanaFRV09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/MeenderinckAJAR09,
  author    = {Cor Meenderinck and
               Arnaldo Azevedo and
               Ben H. H. Juurlink and
               Mauricio Alvarez and
               Alex Ram{\'{\i}}rez},
  title     = {Parallel Scalability of Video Decoders},
  journal   = {Signal Processing Systems},
  volume    = {57},
  number    = {2},
  pages     = {173--194},
  year      = {2009},
  url       = {https://doi.org/10.1007/s11265-008-0256-9},
  doi       = {10.1007/s11265-008-0256-9},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/vlsisp/MeenderinckAJAR09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CarpenterRA09,
  author    = {Paul M. Carpenter and
               Alex Ram{\'{\i}}rez and
               Eduard Ayguad{\'{e}}},
  title     = {Mapping stream programs onto heterogeneous multiprocessor systems},
  booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
               and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
               October 11-16, 2009},
  pages     = {57--66},
  year      = {2009},
  crossref  = {DBLP:conf/cases/2009},
  url       = {https://doi.org/10.1145/1629395.1629406},
  doi       = {10.1145/1629395.1629406},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cases/CarpenterRA09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/SanchezRV09,
  author    = {Friman S{\'{a}}nchez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Quantitative analysis of sequence alignment applications on multiprocessor
               architectures},
  booktitle = {Proceedings of the 6th Conference on Computing Frontiers, 2009, Ischia,
               Italy, May 18-20, 2009},
  pages     = {61--70},
  year      = {2009},
  crossref  = {DBLP:conf/cf/2009},
  url       = {https://doi.org/10.1145/1531743.1531755},
  doi       = {10.1145/1531743.1531755},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cf/SanchezRV09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/AzevedoMJTHAR09,
  author    = {Arnaldo Azevedo and
               Cor Meenderinck and
               Ben H. H. Juurlink and
               Andrei Terechko and
               Jan Hoogerbrugge and
               Mauricio Alvarez and
               Alex Ram{\'{\i}}rez},
  title     = {Parallel {H.264} Decoding on an Embedded Multicore Processor},
  booktitle = {High Performance Embedded Architectures and Compilers, Fourth International
               Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings},
  pages     = {404--418},
  year      = {2009},
  crossref  = {DBLP:conf/hipeac/2009},
  url       = {https://doi.org/10.1007/978-3-540-92990-1\_29},
  doi       = {10.1007/978-3-540-92990-1\_29},
  timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hipeac/AzevedoMJTHAR09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpads/MesaRAMJV09,
  author    = {Mauricio Alvarez Mesa and
               Alex Ram{\'{\i}}rez and
               Arnaldo Azevedo and
               Cor Meenderinck and
               Ben H. H. Juurlink and
               Mateo Valero},
  title     = {Scalability of Macroblock-level Parallelism for {H.264} Decoding},
  booktitle = {15th {IEEE} International Conference on Parallel and Distributed Systems,
               {ICPADS} 2009, Shenzhen, China, December 8-11, 2009},
  pages     = {236--243},
  year      = {2009},
  crossref  = {DBLP:conf/icpads/2009},
  url       = {https://doi.org/10.1109/ICPADS.2009.124},
  doi       = {10.1109/ICPADS.2009.124},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/icpads/MesaRAMJV09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/CarpenterRA09,
  author    = {Paul M. Carpenter and
               Alex Ram{\'{\i}}rez and
               Eduard Ayguad{\'{e}}},
  title     = {The Abstract Streaming Machine: Compile-Time Performance Modelling
               of Stream Programs on Heterogeneous Multiprocessors},
  booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation,
               9th International Workshop, {SAMOS} 2009, Samos, Greece, July 20-23,
               2009. Proceedings},
  pages     = {12--23},
  year      = {2009},
  crossref  = {DBLP:conf/samos/2009},
  url       = {https://doi.org/10.1007/978-3-642-03138-0\_3},
  doi       = {10.1007/978-3-642-03138-0\_3},
  timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/CarpenterRA09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/AcostaCRV09,
  author    = {Carmelo Acosta and
               Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Thread to Core Assignment in {SMT} On-Chip Multiprocessors},
  booktitle = {21st International Symposium on Computer Architecture and High Performance
               Computing, {SBAC-PAD} 2009, Sao Paolo, Brazil, October 28-31, 2009},
  pages     = {67--74},
  year      = {2009},
  crossref  = {DBLP:conf/sbac-pad/2009},
  url       = {https://doi.org/10.1109/SBAC-PAD.2009.13},
  doi       = {10.1109/SBAC-PAD.2009.13},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sbac-pad/AcostaCRV09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/NesbitMCRVS08,
  author    = {Kyle J. Nesbit and
               Miquel Moret{\'{o}} and
               Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero and
               James E. Smith},
  title     = {Multicore Resource Management},
  journal   = {{IEEE} Micro},
  volume    = {28},
  number    = {3},
  pages     = {6--16},
  year      = {2008},
  url       = {https://doi.org/10.1109/MM.2008.43},
  doi       = {10.1109/MM.2008.43},
  timestamp = {Tue, 12 Sep 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/NesbitMCRVS08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/MoretoCRV08,
  author    = {Miquel Moret{\'{o}} and
               Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {MLP-Aware Dynamic Cache Partitioning},
  booktitle = {High Performance Embedded Architectures and Compilers, Third International
               Conference, HiPEAC 2008, G{\"{o}}teborg, Sweden, January 27-29,
               2008, Proceedings},
  pages     = {337--352},
  year      = {2008},
  crossref  = {DBLP:conf/hipeac/2008},
  url       = {https://doi.org/10.1007/978-3-540-77560-7\_23},
  doi       = {10.1007/978-3-540-77560-7\_23},
  timestamp = {Fri, 09 Mar 2018 07:02:42 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/hipeac/MoretoCRV08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/AcostaCRV08,
  author    = {Carmelo Acosta and
               Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {{MFLUSH:} Handling Long-Latency Loads in {SMT} On-Chip Multiprocessors},
  booktitle = {2008 International Conference on Parallel Processing, {ICPP} 2008,
               September 8-12, 2008, Portland, Oregon, {USA}},
  pages     = {173--181},
  year      = {2008},
  crossref  = {DBLP:conf/icpp/2008},
  url       = {https://doi.org/10.1109/ICPP.2008.48},
  doi       = {10.1109/ICPP.2008.48},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/icpp/AcostaCRV08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AzevedoMJAR08,
  author    = {Arnaldo Azevedo and
               Cor Meenderinck and
               Ben H. H. Juurlink and
               Mauricio Alvarez and
               Alex Ram{\'{\i}}rez},
  title     = {Analysis of video filtering on the cell processor},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
               May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
  pages     = {488--491},
  year      = {2008},
  crossref  = {DBLP:conf/iscas/2008},
  url       = {https://doi.org/10.1109/ISCAS.2008.4541461},
  doi       = {10.1109/ISCAS.2008.4541461},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/AzevedoMJAR08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/IsazaSGRV08,
  author    = {Sebasti{\'{a}}n Isaza and
               Friman S{\'{a}}nchez and
               Georgi Gaydadjiev and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Preliminary Analysis of the Cell {BE} Processor Limitations for Sequence
               Alignment Applications},
  booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation,
               8th International Workshop, {SAMOS} 2008, Samos, Greece, July 21-24,
               2008. Proceedings},
  pages     = {53--64},
  year      = {2008},
  crossref  = {DBLP:conf/samos/2008},
  url       = {https://doi.org/10.1007/978-3-540-70550-5\_7},
  doi       = {10.1007/978-3-540-70550-5\_7},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/IsazaSGRV08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cf/2008,
  editor    = {Alex Ram{\'{\i}}rez and
               Gianfranco Bilardi and
               Michael Gschwind},
  title     = {Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia,
               Italy, May 5-7, 2008},
  publisher = {{ACM}},
  year      = {2008},
  isbn      = {978-1-60558-077-7},
  timestamp = {Thu, 15 May 2008 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/cf/2008},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MoretoCRV07,
  author    = {Miquel Moret{\'{o}} and
               Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Explaining Dynamic Cache Partitioning Speed Ups},
  journal   = {Computer Architecture Letters},
  volume    = {6},
  number    = {1},
  pages     = {1--4},
  year      = {2007},
  url       = {https://doi.org/10.1109/L-CA.2007.3},
  doi       = {10.1109/L-CA.2007.3},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/cal/MoretoCRV07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/SantanaRV07,
  author    = {Oliverio J. Santana and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Enlarging Instruction Streams},
  journal   = {{IEEE} Trans. Computers},
  volume    = {56},
  number    = {10},
  pages     = {1342--1357},
  year      = {2007},
  url       = {https://doi.org/10.1109/TC.2007.70742},
  doi       = {10.1109/TC.2007.70742},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tc/SantanaRV07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/BosschereLMNOPRSSST07,
  author    = {Koen De Bosschere and
               Wayne Luk and
               Xavier Martorell and
               Nacho Navarro and
               Michael F. P. O'Boyle and
               Dionisios N. Pnevmatikatos and
               Alex Ram{\'{\i}}rez and
               Pascal Sainrat and
               Andr{\'{e}} Seznec and
               Per Stenstr{\"{o}}m and
               Olivier Temam},
  title     = {High-Performance Embedded Architecture and Compilation Roadmap},
  journal   = {Trans. HiPEAC},
  volume    = {1},
  pages     = {5--29},
  year      = {2007},
  crossref  = {DBLP:journals/thipeac/2007-1},
  url       = {https://doi.org/10.1007/978-3-540-71528-3\_2},
  doi       = {10.1007/978-3-540-71528-3\_2},
  timestamp = {Thu, 08 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/thipeac/BosschereLMNOPRSSST07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/MoretoCRV07,
  author    = {Miquel Moret{\'{o}} and
               Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {MLP-Aware Dynamic Cache Partitioning},
  booktitle = {16th International Conference on Parallel Architectures and Compilation
               Techniques {(PACT} 2007), Brasov, Romania, September 15-19, 2007},
  pages     = {418},
  year      = {2007},
  crossref  = {DBLP:conf/IEEEpact/2007},
  url       = {http://doi.ieeecomputersociety.org/10.1109/PACT.2007.49},
  doi       = {10.1109/PACT.2007.49},
  timestamp = {Mon, 15 Apr 2019 16:16:42 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/MoretoCRV07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/AlvarezSRV07,
  author    = {Mauricio Alvarez and
               Esther Salam{\'{\i}} and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {HD-VideoBench. {A} Benchmark for Evaluating High Definition Digital
               Video Applications},
  booktitle = {{IEEE} 10th International Symposium on Workload Characterization,
               {IISWC} 2007, Boston, MA, USA, 27-29 September, 2007},
  pages     = {120--125},
  year      = {2007},
  crossref  = {DBLP:conf/iiswc/2007},
  url       = {https://doi.org/10.1109/IISWC.2007.4362188},
  doi       = {10.1109/IISWC.2007.4362188},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iiswc/AlvarezSRV07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/AlvarezSRV07,
  author    = {Mauricio Alvarez and
               Esther Salam{\'{\i}} and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Performance Impact of Unaligned Memory Operations in {SIMD} Extensions
               for Video Codec Applications},
  booktitle = {2007 {IEEE} International Symposium on Performance Analysis of Systems
               and Software, April 25-27, 2007, San Jose, California, USA, Proceedings},
  pages     = {62--71},
  year      = {2007},
  crossref  = {DBLP:conf/ispass/2007},
  url       = {https://doi.org/10.1109/ISPASS.2007.363737},
  doi       = {10.1109/ISPASS.2007.363737},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/AlvarezSRV07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/Jimenez-GonzalezMR07,
  author    = {Daniel Jim{\'{e}}nez{-}Gonz{\'{a}}lez and
               Xavier Martorell and
               Alex Ram{\'{\i}}rez},
  title     = {Performance Analysis of Cell Broadband Engine for High Memory Bandwidth
               Applications},
  booktitle = {2007 {IEEE} International Symposium on Performance Analysis of Systems
               and Software, April 25-27, 2007, San Jose, California, USA, Proceedings},
  pages     = {210--219},
  year      = {2007},
  crossref  = {DBLP:conf/ispass/2007},
  url       = {https://doi.org/10.1109/ISPASS.2007.363751},
  doi       = {10.1109/ISPASS.2007.363751},
  timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/Jimenez-GonzalezMR07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/CazorlaFKRSV07,
  author    = {Francisco J. Cazorla and
               Enrique Fern{\'{a}}ndez and
               Peter M. W. Knijnenburg and
               Alex Ram{\'{\i}}rez and
               Rizos Sakellariou and
               Mateo Valero},
  title     = {On the Problem of Minimizing Workload Execution Time in {SMT} Processors},
  booktitle = {Proceedings of the 2007 International Conference on Embedded Computer
               Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2007),
               Samos, Greece, July 16-19, 2007},
  pages     = {66--73},
  year      = {2007},
  crossref  = {DBLP:conf/samos/2007ic},
  url       = {https://doi.org/10.1109/ICSAMOS.2007.4285735},
  doi       = {10.1109/ICSAMOS.2007.4285735},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/CazorlaFKRSV07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/CarpenterRMRA07,
  author    = {Paul M. Carpenter and
               David R{\'{o}}denas and
               Xavier Martorell and
               Alex Ram{\'{\i}}rez and
               Eduard Ayguad{\'{e}}},
  title     = {A Streaming Machine Description and Programming Model},
  booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation,
               7th International Workshop, {SAMOS} 2007, Samos, Greece, July 16-19,
               2007, Proceedings},
  pages     = {107--116},
  year      = {2007},
  crossref  = {DBLP:conf/samos/2007},
  url       = {https://doi.org/10.1007/978-3-540-73625-7\_13},
  doi       = {10.1007/978-3-540-73625-7\_13},
  timestamp = {Fri, 02 Jun 2017 13:01:07 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/CarpenterRMRA07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/MoretoCRV07,
  author    = {Miquel Moret{\'{o}} and
               Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Online Prediction of Applications Cache Utility},
  booktitle = {Proceedings of the 2007 International Conference on Embedded Computer
               Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2007),
               Samos, Greece, July 16-19, 2007},
  pages     = {169--177},
  year      = {2007},
  crossref  = {DBLP:conf/samos/2007ic},
  url       = {https://doi.org/10.1109/ICSAMOS.2007.4285748},
  doi       = {10.1109/ICSAMOS.2007.4285748},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/MoretoCRV07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/CazorlaKSFRV06,
  author    = {Francisco J. Cazorla and
               Peter M. W. Knijnenburg and
               Rizos Sakellariou and
               Enrique Fern{\'{a}}ndez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Predictable Performance in {SMT} Processors: Synergy between the {OS}
               and SMTs},
  journal   = {{IEEE} Trans. Computers},
  volume    = {55},
  number    = {7},
  pages     = {785--799},
  year      = {2006},
  url       = {https://doi.org/10.1109/TC.2006.108},
  doi       = {10.1109/TC.2006.108},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tc/CazorlaKSFRV06},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/SantanaFRV06,
  author    = {Oliverio J. Santana and
               Ayose Falc{\'{o}}n and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Branch predictor guided instruction decoding},
  booktitle = {15th International Conference on Parallel Architectures and Compilation
               Techniques {(PACT} 2006), Seattle, Washington, USA, September 16-20,
               2006},
  pages     = {202--211},
  year      = {2006},
  crossref  = {DBLP:conf/IEEEpact/2006},
  url       = {https://doi.org/10.1145/1152154.1152186},
  doi       = {10.1145/1152154.1152186},
  timestamp = {Mon, 15 Apr 2019 16:16:35 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/SantanaFRV06},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/SanchezSRV06,
  author    = {Friman S{\'{a}}nchez and
               Esther Salam{\'{\i}} and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Performance Analysis of Sequence Alignment Applications},
  booktitle = {Proceedings of the 2006 {IEEE} International Symposium on Workload
               Characterization, {IISWC} 2006, October 25-27, 2006, San Jose, California,
               {USA}},
  pages     = {51--60},
  year      = {2006},
  crossref  = {DBLP:conf/iiswc/2006},
  url       = {https://doi.org/10.1109/IISWC.2006.302729},
  doi       = {10.1109/IISWC.2006.302729},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iiswc/SanchezSRV06},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/FalconSRLV05,
  author    = {Ayose Falc{\'{o}}n and
               Jared Stark and
               Alex Ram{\'{\i}}rez and
               Konrad K. Lai and
               Mateo Valero},
  title     = {Better Branch Prediction Through Prophet/Critic Hybrids},
  journal   = {{IEEE} Micro},
  volume    = {25},
  number    = {1},
  pages     = {80--89},
  year      = {2005},
  url       = {https://doi.org/10.1109/MM.2005.5},
  doi       = {10.1109/MM.2005.5},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/FalconSRLV05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/RamirezLV05,
  author    = {Alex Ram{\'{\i}}rez and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               Mateo Valero},
  title     = {Software Trace Cache},
  journal   = {{IEEE} Trans. Computers},
  volume    = {54},
  number    = {1},
  pages     = {22--35},
  year      = {2005},
  url       = {https://doi.org/10.1109/TC.2005.13},
  doi       = {10.1109/TC.2005.13},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tc/RamirezLV05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CazorlaKSFRV05,
  author    = {Francisco J. Cazorla and
               Peter M. W. Knijnenburg and
               Rizos Sakellariou and
               Enrique Fern{\'{a}}ndez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Architectural support for real-time task scheduling in {SMT} processors},
  booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
               and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
               USA, September 24-27, 2005},
  pages     = {166--176},
  year      = {2005},
  crossref  = {DBLP:conf/cases/2005},
  url       = {https://doi.org/10.1145/1086297.1086320},
  doi       = {10.1145/1086297.1086320},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cases/CazorlaKSFRV05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/AcostaFRV05,
  author    = {Carmelo Acosta and
               Ayose Falc{\'{o}}n and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {A Complexity-Effective Simultaneous Multithreading Architecture},
  booktitle = {34th International Conference on Parallel Processing {(ICPP} 2005),
               14-17 June 2005, Oslo, Norway},
  pages     = {157--164},
  year      = {2005},
  crossref  = {DBLP:conf/icpp/2005},
  url       = {https://doi.org/10.1109/ICPP.2005.7},
  doi       = {10.1109/ICPP.2005.7},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/icpp/AcostaFRV05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/FalconRV05,
  author    = {Ayose Falc{\'{o}}n and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Effective Instruction Prefetching via Fetch Prestaging},
  booktitle = {19th International Parallel and Distributed Processing Symposium {(IPDPS}
               2005), {CD-ROM} / Abstracts Proceedings, 4-8 April 2005, Denver, CO,
               {USA}},
  year      = {2005},
  crossref  = {DBLP:conf/ipps/2005},
  url       = {https://doi.org/10.1109/IPDPS.2005.188},
  doi       = {10.1109/IPDPS.2005.188},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ipps/FalconRV05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/SantanaRV05,
  author    = {Oliverio J. Santana and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Multiple Stream Prediction},
  booktitle = {High-Performance Computing - 6th International Symposium, {ISHPC}
               2005, Nara, Japan, September 7-9, 2005, First International Workshop
               on Advanced Low Power Systems, {ALPS} 2006, Revised Selected Papers},
  pages     = {1--16},
  year      = {2005},
  crossref  = {DBLP:conf/ishpc/2005},
  url       = {https://doi.org/10.1007/978-3-540-77704-5\_1},
  doi       = {10.1007/978-3-540-77704-5\_1},
  timestamp = {Sun, 21 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ishpc/SantanaRV05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/SanchezASRV05,
  author    = {Friman S{\'{a}}nchez and
               Mauricio Alvarez and
               Esther Salam{\'{\i}} and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {On the Scalability of 1- and 2-Dimensional {SIMD} Extensions for Multimedia
               Applications},
  booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
               and Software, {ISPASS} 2005, March 20-22, 2005, Austin, Texas, USA,
               Proceedings},
  pages     = {167--176},
  year      = {2005},
  crossref  = {DBLP:conf/ispass/2005},
  url       = {https://doi.org/10.1109/ISPASS.2005.1430571},
  doi       = {10.1109/ISPASS.2005.1430571},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/SanchezASRV05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cf/2005,
  editor    = {Nader Bagherzadeh and
               Mateo Valero and
               Alex Ram{\'{\i}}rez},
  title     = {Proceedings of the Second Conference on Computing Frontiers, 2005,
               Ischia, Italy, May 4-6, 2005},
  publisher = {{ACM}},
  year      = {2005},
  isbn      = {1-59593-019-1},
  timestamp = {Mon, 15 Jun 2015 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/cf/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpcn/FalconSRV04,
  author    = {Ayose Falc{\'{o}}n and
               Oliverio J. Santana and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {A latency-conscious {SMT} branch prediction architecture},
  journal   = {{IJHPCN}},
  volume    = {2},
  number    = {1},
  pages     = {11--21},
  year      = {2004},
  url       = {https://doi.org/10.1504/IJHPCN.2004.009264},
  doi       = {10.1504/IJHPCN.2004.009264},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ijhpcn/FalconSRV04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpcn/CazorlaRVF04,
  author    = {Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero and
               Enrique Fern{\'{a}}ndez},
  title     = {Optimising long-latency-load-aware fetch policies for {SMT} processors},
  journal   = {{IJHPCN}},
  volume    = {2},
  number    = {1},
  pages     = {45--54},
  year      = {2004},
  url       = {https://doi.org/10.1504/IJHPCN.2004.009267},
  doi       = {10.1504/IJHPCN.2004.009267},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ijhpcn/CazorlaRVF04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/CazorlaRVKSF04,
  author    = {Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero and
               Peter M. W. Knijnenburg and
               Rizos Sakellariou and
               Enrique Fern{\'{a}}ndez},
  title     = {QoS for High-Performance {SMT} Processors in Embedded Systems},
  journal   = {{IEEE} Micro},
  volume    = {24},
  number    = {4},
  pages     = {24--31},
  year      = {2004},
  url       = {https://doi.org/10.1109/MM.2004.37},
  doi       = {10.1109/MM.2004.37},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/CazorlaRVKSF04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/SantanaRLV04,
  author    = {Oliverio J. Santana and
               Alex Ram{\'{\i}}rez and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               Mateo Valero},
  title     = {A low-complexity fetch architecture for high-performance superscalar
               processors},
  journal   = {{TACO}},
  volume    = {1},
  number    = {2},
  pages     = {220--245},
  year      = {2004},
  url       = {https://doi.org/10.1145/1011528.1011532},
  doi       = {10.1145/1011528.1011532},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/taco/SantanaRLV04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEinteract/SantanaRV04,
  author    = {Oliverio J. Santana and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Reducing Fetch Architecture Complexity Using Procedure Inlining},
  booktitle = {8th Annual Workshop on Interaction between Compilers and Computer
               Architecture {(INTERACT-8} 2004), 15 February 2004, Madrid, Spain},
  pages     = {97--106},
  year      = {2004},
  crossref  = {DBLP:conf/IEEEinteract/2004},
  url       = {https://doi.org/10.1109/INTERA.2004.1299514},
  doi       = {10.1109/INTERA.2004.1299514},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEinteract/SantanaRV04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/CazorlaKSFRV04,
  author    = {Francisco J. Cazorla and
               Peter M. W. Knijnenburg and
               Rizos Sakellariou and
               Enrique Fern{\'{a}}ndez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Predictable performance in {SMT} processors},
  booktitle = {Proceedings of the First Conference on Computing Frontiers, 2004,
               Ischia, Italy, April 14-16, 2004},
  pages     = {433--443},
  year      = {2004},
  crossref  = {DBLP:conf/cf/2004},
  url       = {https://doi.org/10.1145/977091.977152},
  doi       = {10.1145/977091.977152},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cf/CazorlaKSFRV04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/CazorlaKSFRV04,
  author    = {Francisco J. Cazorla and
               Peter M. W. Knijnenburg and
               Rizos Sakellariou and
               Enrique Fern{\'{a}}ndez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Implicit vs. Explicit Resource Allocation in {SMT} Processors},
  booktitle = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
               Methods and Tools, 31 August - 3 September 2004, Rennes, France},
  pages     = {44--51},
  year      = {2004},
  crossref  = {DBLP:conf/dsd/2004},
  url       = {https://doi.org/10.1109/DSD.2004.1333257},
  doi       = {10.1109/DSD.2004.1333257},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/dsd/CazorlaKSFRV04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/CazorlaKSFRV04,
  author    = {Francisco J. Cazorla and
               Peter M. W. Knijnenburg and
               Rizos Sakellariou and
               Enrique Fern{\'{a}}ndez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Feasibility of QoS for {SMT}},
  booktitle = {Euro-Par 2004 Parallel Processing, 10th International Euro-Par Conference,
               Pisa, Italy, August 31-September 3, 2004, Proceedings},
  pages     = {535--540},
  year      = {2004},
  crossref  = {DBLP:conf/europar/2004},
  url       = {https://doi.org/10.1007/978-3-540-27866-5\_70},
  doi       = {10.1007/978-3-540-27866-5\_70},
  timestamp = {Tue, 30 May 2017 12:57:44 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/CazorlaKSFRV04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eusipco/CazorlaKSFRV04,
  author    = {Francisco J. Cazorla and
               Peter M. W. Knijnenburg and
               Rizos Sakellariou and
               Enrique Fern{\'{a}}ndez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Enabling {SMT} for real-time embedded systems},
  booktitle = {2004 12th European Signal Processing Conference, Vienna, Austria,
               September 6-10, 2004},
  pages     = {1341--1344},
  year      = {2004},
  crossref  = {DBLP:conf/eusipco/2004},
  url       = {http://ieeexplore.ieee.org/document/7079809/},
  timestamp = {Sun, 30 Apr 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/eusipco/CazorlaKSFRV04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/FalconRV04,
  author    = {Ayose Falc{\'{o}}n and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {A Low-Complexity, High-Performance Fetch Unit for Simultaneous Multithreading
               Processors},
  booktitle = {10th International Conference on High-Performance Computer Architecture
               {(HPCA-10} 2004), 14-18 February 2004, Madrid, Spain},
  pages     = {244--253},
  year      = {2004},
  crossref  = {DBLP:conf/hpca/2004},
  url       = {https://doi.org/10.1109/HPCA.2004.10003},
  doi       = {10.1109/HPCA.2004.10003},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/FalconRV04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/CazorlaRVF04,
  author    = {Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero and
               Enrique Fern{\'{a}}ndez},
  title     = {DCache Warn: An I-Fetch Policy to Increase {SMT} Efficiency},
  booktitle = {18th International Parallel and Distributed Processing Symposium {(IPDPS}
               2004), {CD-ROM} / Abstracts Proceedings, 26-30 April 2004, Santa Fe,
               New Mexico, {USA}},
  year      = {2004},
  crossref  = {DBLP:conf/ipps/2004},
  url       = {https://doi.org/10.1109/IPDPS.2004.1303005},
  doi       = {10.1109/IPDPS.2004.1303005},
  timestamp = {Wed, 24 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ipps/CazorlaRVF04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FalconSRLV04,
  author    = {Ayose Falc{\'{o}}n and
               Jared Stark and
               Alex Ram{\'{\i}}rez and
               Konrad Lai and
               Mateo Valero},
  title     = {Prophet/Critic Hybrid Branch Prediction},
  booktitle = {31st International Symposium on Computer Architecture {(ISCA} 2004),
               19-23 June 2004, Munich, Germany},
  pages     = {250--263},
  year      = {2004},
  crossref  = {DBLP:conf/isca/2004},
  url       = {https://doi.org/10.1109/ISCA.2004.1310779},
  doi       = {10.1109/ISCA.2004.1310779},
  timestamp = {Tue, 23 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/FalconSRLV04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/CazorlaRVF04,
  author    = {Francisco J. Cazorla and
               Alex Ram{\'{\i}}rez and
               Mateo Valero and
               Enrique Fern{\'{a}}ndez},
  title     = {Dynamically Controlled Resource Allocation in {SMT} Processors},
  booktitle = {37th Annual International Symposium on Microarchitecture {(MICRO-37}
               2004), 4-8 December 2004, Portland, OR, {USA}},
  pages     = {171--182},
  year      = {2004},
  crossref  = {DBLP:conf/micro/2004},
  url       = {https://doi.org/10.1109/MICRO.2004.17},
  doi       = {10.1109/MICRO.2004.17},
  timestamp = {Sun, 21 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/CazorlaRVF04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/CazorlaFRV03,
  author    = {Francisco J. Cazorla and
               Enrique Fern{\'{a}}ndez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Improving Memory Latency Aware Fetch Policies for {SMT} Processors},
  booktitle = {High Performance Computing, 5th International Symposium, {ISHPC} 2003,
               Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings},
  pages     = {70--85},
  year      = {2003},
  crossref  = {DBLP:conf/ishpc/2003},
  url       = {https://doi.org/10.1007/978-3-540-39707-6\_6},
  doi       = {10.1007/978-3-540-39707-6\_6},
  timestamp = {Mon, 29 May 2017 16:53:44 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ishpc/CazorlaFRV03},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/FalconSRV03,
  author    = {Ayose Falc{\'{o}}n and
               Oliverio J. Santana and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Tolerating Branch Predictor Latency on {SMT}},
  booktitle = {High Performance Computing, 5th International Symposium, {ISHPC} 2003,
               Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings},
  pages     = {86--98},
  year      = {2003},
  crossref  = {DBLP:conf/ishpc/2003},
  url       = {https://doi.org/10.1007/978-3-540-39707-6\_7},
  doi       = {10.1007/978-3-540-39707-6\_7},
  timestamp = {Mon, 29 May 2017 16:53:44 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ishpc/FalconSRV03},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/RamirezLNVT02,
  author    = {Alex Ram{\'{\i}}rez and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               Carlos Navarro and
               Mateo Valero and
               Josep Torrellas},
  title     = {Software Trace Cache for Commercial Applications},
  journal   = {International Journal of Parallel Programming},
  volume    = {30},
  number    = {5},
  pages     = {373--395},
  year      = {2002},
  url       = {https://doi.org/10.1023/A:1019992713965},
  doi       = {10.1023/A:1019992713965},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ijpp/RamirezLNVT02},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/VandierendonckRBV02,
  author    = {Hans Vandierendonck and
               Alex Ram{\'{\i}}rez and
               Koenraad De Bosschere and
               Mateo Valero},
  title     = {A Comparative Study of Redundancy in Trace Caches (Research Note)},
  booktitle = {Euro-Par 2002, Parallel Processing, 8th International Euro-Par Conference
               Paderborn, Germany, August 27-30, 2002, Proceedings},
  pages     = {512--516},
  year      = {2002},
  crossref  = {DBLP:conf/europar/2002},
  url       = {https://doi.org/10.1007/3-540-45706-2\_69},
  doi       = {10.1007/3-540-45706-2\_69},
  timestamp = {Fri, 26 May 2017 14:09:14 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/VandierendonckRBV02},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/SantanaFFMRV02,
  author    = {Oliverio J. Santana and
               Ayose Falc{\'{o}}n and
               Enrique Fern{\'{a}}ndez and
               Pedro Medina and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {A Comprehensive Analysis of Indirect Branch Prediction},
  booktitle = {High Performance Computing, 4th International Symposium, {ISHPC} 2002,
               Kansai Science City, Japan, May 15-17, 2002, Proceedings},
  pages     = {133--145},
  year      = {2002},
  crossref  = {DBLP:conf/ishpc/2002},
  url       = {https://doi.org/10.1007/3-540-47847-7\_13},
  doi       = {10.1007/3-540-47847-7\_13},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ishpc/SantanaFFMRV02},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/FalconSMFRV02,
  author    = {Ayose Falc{\'{o}}n and
               Oliverio J. Santana and
               Pedro Medina and
               Enrique Fern{\'{a}}ndez and
               Alex Ram{\'{\i}}rez and
               Mateo Valero},
  title     = {Studying New Ways for Improving Adaptive History Length Branch Predictors},
  booktitle = {High Performance Computing, 4th International Symposium, {ISHPC} 2002,
               Kansai Science City, Japan, May 15-17, 2002, Proceedings},
  pages     = {271--280},
  year      = {2002},
  crossref  = {DBLP:conf/ishpc/2002},
  url       = {https://doi.org/10.1007/3-540-47847-7\_23},
  doi       = {10.1007/3-540-47847-7\_23},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ishpc/FalconSMFRV02},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/RamirezSLV02,
  author    = {Alex Ram{\'{\i}}rez and
               Oliverio J. Santana and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               Mateo Valero},
  title     = {Fetching instruction streams},
  booktitle = {Proceedings of the 35th Annual International Symposium on Microarchitecture,
               Istanbul, Turkey, November 18-22, 2002},
  pages     = {371--382},
  year      = {2002},
  crossref  = {DBLP:conf/micro/2002},
  url       = {https://doi.org/10.1109/MICRO.2002.1176264},
  doi       = {10.1109/MICRO.2002.1176264},
  timestamp = {Wed, 28 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/RamirezSLV02},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/RamirezLV01,
  author    = {Alex Ram{\'{\i}}rez and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               Mateo Valero},
  title     = {Branch Prediction Using Profile Data},
  booktitle = {Euro-Par 2001: Parallel Processing, 7th International Euro-Par Conference
               Manchester, {UK} August 28-31, 2001, Proceedings},
  pages     = {386--393},
  year      = {2001},
  crossref  = {DBLP:conf/europar/2001},
  url       = {https://doi.org/10.1007/3-540-44681-8\_57},
  doi       = {10.1007/3-540-44681-8\_57},
  timestamp = {Fri, 26 May 2017 14:09:14 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/RamirezLV01},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/RamirezBGCLLV01,
  author    = {Alex Ram{\'{\i}}rez and
               Luiz Andr{\'{e}} Barroso and
               Kourosh Gharachorloo and
               Robert S. Cohn and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               P. Geoffrey Lowney and
               Mateo Valero},
  title     = {Code layout optimizations for transaction processing workloads},
  booktitle = {Proceedings of the 28th Annual International Symposium on Computer
               Architecture, {ISCA} 2001, G{\"{o}}teborg, Sweden, June 30-July
               4, 2001},
  pages     = {155--164},
  year      = {2001},
  crossref  = {DBLP:conf/isca/2001},
  url       = {https://doi.org/10.1145/379240.379260},
  doi       = {10.1145/379240.379260},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/isca/RamirezBGCLLV01},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/RamirezLV00,
  author    = {Alex Ram{\'{\i}}rez and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               Mateo Valero},
  title     = {The Effect of Code Reordering on Branch Prediction},
  booktitle = {Proceedings of the 2000 International Conference on Parallel Architectures
               and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania,
               USA, October 15-19, 2000},
  pages     = {189--198},
  year      = {2000},
  crossref  = {DBLP:conf/IEEEpact/2000},
  url       = {https://doi.org/10.1109/PACT.2000.888343},
  doi       = {10.1109/PACT.2000.888343},
  timestamp = {Mon, 22 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/RamirezLV00},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/NavarroRLV00,
  author    = {Carlos Navarro and
               Alex Ram{\'{\i}}rez and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               Mateo Valero},
  title     = {On the Performance of Fetch Engines Running {DSS} Workloads},
  booktitle = {Euro-Par 2000, Parallel Processing, 6th International Euro-Par Conference,
               Munich, Germany, August 29 - September 1, 2000, Proceedings.},
  pages     = {940--949},
  year      = {2000},
  crossref  = {DBLP:conf/europar/2000},
  url       = {https://doi.org/10.1007/3-540-44520-X\_133},
  doi       = {10.1007/3-540-44520-X\_133},
  timestamp = {Wed, 14 Nov 2018 10:58:19 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/europar/NavarroRLV00},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/RamirezLV00,
  author    = {Alex Ram{\'{\i}}rez and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               Mateo Valero},
  title     = {Trace Cache Redundancy: Red {\&} Blue Traces},
  booktitle = {Proceedings of the Sixth International Symposium on High-Performance
               Computer Architecture, Toulouse, France, January 8-12, 2000},
  pages     = {325--333},
  year      = {2000},
  crossref  = {DBLP:conf/hpca/2000},
  url       = {https://doi.org/10.1109/HPCA.2000.824361},
  doi       = {10.1109/HPCA.2000.824361},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/RamirezLV00},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/RamirezLNSVT99,
  author    = {Alex Ram{\'{\i}}rez and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               Carlos Navarro and
               Xavi Serrano and
               Mateo Valero and
               Josep Torrellas},
  title     = {Optimization of Instruction Fetch for Decision Support Workloads},
  booktitle = {Proceedings of the International Conference on Parallel Processing
               1999, {ICPP} 1999, Wakamatsu, Japan, September 21-24, 1999},
  pages     = {238--245},
  year      = {1999},
  crossref  = {DBLP:conf/icpp/1999},
  url       = {https://doi.org/10.1109/ICPP.1999.797409},
  doi       = {10.1109/ICPP.1999.797409},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/icpp/RamirezLNSVT99},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/RamirezLNTV99,
  author    = {Alex Ram{\'{\i}}rez and
               Josep{-}Llu{\'{\i}}s Larriba{-}Pey and
               Carlos Navarro and
               Josep Torrellas and
               Mateo Valero},
  title     = {Software trace cache},
  booktitle = {Proceedings of the 13th international conference on Supercomputing,
               {ICS} 1999, Rhodes, Greece, June 20-25, 1999},
  pages     = {119--126},
  year      = {1999},
  crossref  = {DBLP:conf/ics/1999},
  url       = {https://doi.org/10.1145/305138.305178},
  doi       = {10.1145/305138.305178},
  timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ics/RamirezLNTV99},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asplos/2018,
  editor    = {Xipeng Shen and
               James Tuck and
               Ricardo Bianchini and
               Vivek Sarkar},
  title     = {Proceedings of the Twenty-Third International Conference on Architectural
               Support for Programming Languages and Operating Systems, {ASPLOS}
               2018, Williamsburg, VA, USA, March 24-28, 2018},
  publisher = {{ACM}},
  year      = {2018},
  url       = {http://dl.acm.org/citation.cfm?id=3173162},
  timestamp = {Mon, 09 Apr 2018 19:23:25 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/asplos/2018},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ispass/2017,
  title     = {2017 {IEEE} International Symposium on Performance Analysis of Systems
               and Software, {ISPASS} 2017, Santa Rosa, CA, USA, April 24-25, 2017},
  publisher = {{IEEE} Computer Society},
  year      = {2017},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7965804},
  isbn      = {978-1-5386-3890-3},
  timestamp = {Wed, 30 May 2018 10:12:47 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/2017},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2017,
  editor    = {Hillery C. Hunter and
               Jaime Moreno and
               Joel S. Emer and
               Daniel S{\'{a}}nchez},
  title     = {Proceedings of the 50th Annual {IEEE/ACM} International Symposium
               on Microarchitecture, {MICRO} 2017, Cambridge, MA, USA, October 14-18,
               2017},
  publisher = {{ACM}},
  year      = {2017},
  url       = {https://doi.org/10.1145/3123939},
  doi       = {10.1145/3123939},
  isbn      = {978-1-4503-4952-9},
  timestamp = {Tue, 06 Nov 2018 16:58:26 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2017},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iiswc/2016,
  title     = {2016 {IEEE} International Symposium on Workload Characterization,
               {IISWC} 2016, Providence, RI, USA, September 25-27, 2016},
  publisher = {{IEEE} Computer Society},
  year      = {2016},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7581236},
  isbn      = {978-1-5090-3896-1},
  timestamp = {Tue, 11 Oct 2016 14:38:03 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iiswc/2016},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sc/2016,
  editor    = {John West and
               Cherri M. Pancake},
  title     = {Proceedings of the International Conference for High Performance Computing,
               Networking, Storage and Analysis, {SC} 2016, Salt Lake City, UT, USA,
               November 13-18, 2016},
  publisher = {{IEEE} Computer Society},
  year      = {2016},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7875333},
  isbn      = {978-1-4673-8815-3},
  timestamp = {Tue, 21 Mar 2017 08:50:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/sc/2016},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iccd/2015,
  title     = {33rd {IEEE} International Conference on Computer Design, {ICCD} 2015,
               New York City, NY, USA, October 18-21, 2015},
  publisher = {{IEEE} Computer Society},
  year      = {2015},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7347055},
  isbn      = {978-1-4673-7166-7},
  timestamp = {Tue, 05 Jan 2016 21:21:30 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/iccd/2015},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iwpc/2015,
  editor    = {Andrea De Lucia and
               Christian Bird and
               Rocco Oliveto},
  title     = {Proceedings of the 2015 {IEEE} 23rd International Conference on Program
               Comprehension, {ICPC} 2015, Florence/Firenze, Italy, May 16-24, 2015},
  publisher = {{IEEE} Computer Society},
  year      = {2015},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7180533},
  timestamp = {Wed, 29 Mar 2017 16:45:25 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iwpc/2015},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/europar/2014w2,
  editor    = {Lu{\'{\i}}s M. B. Lopes and
               Julius Zilinskas and
               Alexandru Costan and
               Roberto G. Cascella and
               Gabor Kecskemeti and
               Emmanuel Jeannot and
               Mario Cannataro and
               Laura Ricci and
               Siegfried Benkner and
               Salvador Petit and
               Vittorio Scarano and
               Jos{\'{e}} Gracia and
               Sascha Hunold and
               Stephen L. Scott and
               Stefan Lankes and
               Christian Lengauer and
               Jes{\'{u}}s Carretero and
               Jens Breitbart and
               Michael Alexander},
  title     = {Euro-Par 2014: Parallel Processing Workshops - Euro-Par 2014 International
               Workshops, Porto, Portugal, August 25-26, 2014, Revised Selected Papers,
               Part {II}},
  series    = {Lecture Notes in Computer Science},
  volume    = {8806},
  publisher = {Springer},
  year      = {2014},
  url       = {https://doi.org/10.1007/978-3-319-14313-2},
  doi       = {10.1007/978-3-319-14313-2},
  isbn      = {978-3-319-14312-5},
  timestamp = {Mon, 12 Feb 2018 20:36:55 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/europar/2014w2},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ics/25a,
  editor    = {Utpal Banerjee},
  title     = {{ACM} International Conference on Supercomputing 25th Anniversary
               Volume},
  publisher = {{ACM}},
  year      = {2014},
  url       = {http://dl.acm.org/citation.cfm?id=2591635},
  isbn      = {978-1-4503-2840-1},
  timestamp = {Fri, 13 Mar 2015 10:14:26 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ics/25a},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ics/2014,
  editor    = {Arndt Bode and
               Michael Gerndt and
               Per Stenstr{\"{o}}m and
               Lawrence Rauchwerger and
               Barton P. Miller and
               Martin Schulz},
  title     = {2014 International Conference on Supercomputing, ICS'14, Muenchen,
               Germany, June 10-13, 2014},
  publisher = {{ACM}},
  year      = {2014},
  url       = {http://dl.acm.org/citation.cfm?id=2597652},
  isbn      = {978-1-4503-2642-1},
  timestamp = {Mon, 06 Mar 2017 12:14:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ics/2014},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ipps/2014,
  title     = {2014 {IEEE} 28th International Parallel and Distributed Processing
               Symposium, Phoenix, AZ, USA, May 19-23, 2014},
  publisher = {{IEEE} Computer Society},
  year      = {2014},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6875427},
  isbn      = {978-1-4799-3799-8},
  timestamp = {Thu, 23 Jul 2015 17:27:32 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ipps/2014},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2014,
  title     = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
               {ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
  publisher = {{IEEE} Computer Society},
  year      = {2014},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6847316},
  isbn      = {978-1-4799-4396-8},
  timestamp = {Thu, 16 Oct 2014 17:35:14 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2014},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/date/2013,
  editor    = {Enrico Macii},
  title     = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
               March 18-22, 2013},
  publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
  year      = {2013},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6507370},
  isbn      = {978-1-4503-2153-2},
  timestamp = {Tue, 10 Nov 2015 12:54:15 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/date/2013},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iccd/2013,
  title     = {2013 {IEEE} 31st International Conference on Computer Design, {ICCD}
               2013, Asheville, NC, USA, October 6-9, 2013},
  publisher = {{IEEE} Computer Society},
  year      = {2013},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6644329},
  isbn      = {978-1-4799-2987-0},
  timestamp = {Mon, 22 Sep 2014 16:50:10 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iccd/2013},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ipps/2013,
  title     = {27th {IEEE} International Symposium on Parallel and Distributed Processing,
               {IPDPS} 2013, Cambridge, MA, USA, May 20-24, 2013},
  publisher = {{IEEE} Computer Society},
  year      = {2013},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6569024},
  isbn      = {978-1-4673-6066-1},
  timestamp = {Fri, 01 Aug 2014 14:26:13 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ipps/2013},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ispass/2013,
  title     = {2012 {IEEE} International Symposium on Performance Analysis of Systems
               {\&} Software, Austin, TX, USA, 21-23 April, 2013},
  publisher = {{IEEE} Computer Society},
  year      = {2013},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6523368},
  isbn      = {978-1-4673-5776-0},
  timestamp = {Mon, 04 May 2015 17:00:50 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/2013},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2013ic,
  title     = {2013 International Conference on Embedded Computer Systems: Architectures,
               Modeling, and Simulation, {SAMOS} 2013, Agios Konstantinos, Samos
               Island, Greece, July 15-18, 2013},
  publisher = {{IEEE}},
  year      = {2013},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6601057},
  timestamp = {Wed, 11 Dec 2013 12:59:15 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/samos/2013ic},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sc/2013,
  editor    = {William Gropp and
               Satoshi Matsuoka},
  title     = {International Conference for High Performance Computing, Networking,
               Storage and Analysis, SC'13, Denver, CO, {USA} - November 17 - 21,
               2013},
  publisher = {{ACM}},
  year      = {2013},
  url       = {https://doi.org/10.1145/2503210},
  doi       = {10.1145/2503210},
  isbn      = {978-1-4503-2378-9},
  timestamp = {Tue, 06 Nov 2018 16:59:29 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/sc/2013},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/europar/2012,
  editor    = {Christos Kaklamanis and
               Theodore S. Papatheodorou and
               Paul G. Spirakis},
  title     = {Euro-Par 2012 Parallel Processing - 18th International Conference,
               Euro-Par 2012, Rhodes Island, Greece, August 27-31, 2012. Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {7484},
  publisher = {Springer},
  year      = {2012},
  url       = {https://doi.org/10.1007/978-3-642-32820-6},
  doi       = {10.1007/978-3-642-32820-6},
  isbn      = {978-3-642-32819-0},
  timestamp = {Wed, 24 May 2017 08:27:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/2012},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2012,
  title     = {45th Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2012, Vancouver, BC, Canada, December 1-5, 2012},
  publisher = {{IEEE} Computer Society},
  year      = {2012},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6490492},
  isbn      = {978-1-4673-4819-5},
  timestamp = {Thu, 18 Sep 2014 16:58:21 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2012},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:journals/thipeac/2011-3,
  editor    = {Per Stenstr{\"{o}}m},
  title     = {Transactions on High-Performance Embedded Architectures and Compilers
               {III}},
  series    = {Lecture Notes in Computer Science},
  volume    = {6590},
  publisher = {Springer},
  year      = {2011},
  url       = {https://doi.org/10.1007/978-3-642-19448-1},
  doi       = {10.1007/978-3-642-19448-1},
  isbn      = {978-3-642-19447-4},
  timestamp = {Fri, 26 May 2017 22:52:03 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/thipeac/2011-3},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:journals/thipeac/2011-4,
  editor    = {Per Stenstr{\"{o}}m},
  title     = {Transactions on High-Performance Embedded Architectures and Compilers
               {IV}},
  series    = {Lecture Notes in Computer Science},
  volume    = {6760},
  publisher = {Springer},
  year      = {2011},
  url       = {https://doi.org/10.1007/978-3-642-24568-8},
  doi       = {10.1007/978-3-642-24568-8},
  isbn      = {978-3-642-24567-1},
  timestamp = {Fri, 26 May 2017 22:52:03 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/thipeac/2011-4},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2011,
  editor    = {Lawrence Rauchwerger and
               Vivek Sarkar},
  title     = {2011 International Conference on Parallel Architectures and Compilation
               Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
  publisher = {{IEEE} Computer Society},
  year      = {2011},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6112806},
  isbn      = {978-1-4577-1794-9},
  timestamp = {Mon, 11 Aug 2014 17:11:12 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/arcs/2011,
  editor    = {Mladen Berekovic and
               William Fornaciari and
               Uwe Brinkschulte and
               Cristina Silvano},
  title     = {Architecture of Computing Systems - {ARCS} 2011 - 24th International
               Conference, Como, Italy, February 24-25, 2011. Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {6566},
  publisher = {Springer},
  year      = {2011},
  url       = {https://doi.org/10.1007/978-3-642-19137-4},
  doi       = {10.1007/978-3-642-19137-4},
  isbn      = {978-3-642-19136-7},
  timestamp = {Wed, 24 May 2017 08:27:33 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/arcs/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cf/2011,
  editor    = {Calin Cascaval and
               Pedro Trancoso and
               Viktor K. Prasanna},
  title     = {Proceedings of the 8th Conference on Computing Frontiers, 2011, Ischia,
               Italy, May 3-5, 2011},
  publisher = {{ACM}},
  year      = {2011},
  isbn      = {978-1-4503-0698-0},
  timestamp = {Tue, 09 Aug 2011 18:40:37 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/cf/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cisis/2011,
  title     = {International Conference on Complex, Intelligent and Software Intensive
               Systems, {CISIS} 2011, June 30 - July 2, 2011, Korean Bible University,
               Seoul, Korea},
  publisher = {{IEEE} Computer Society},
  year      = {2011},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5986779},
  isbn      = {978-0-7695-4373-4},
  timestamp = {Mon, 13 Oct 2014 17:58:22 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/cisis/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/europar/2011-1,
  editor    = {Emmanuel Jeannot and
               Raymond Namyst and
               Jean Roman},
  title     = {Euro-Par 2011 Parallel Processing - 17th International Conference,
               Euro-Par 2011, Bordeaux, France, August 29 - September 2, 2011, Proceedings,
               Part {I}},
  series    = {Lecture Notes in Computer Science},
  volume    = {6852},
  publisher = {Springer},
  year      = {2011},
  url       = {https://doi.org/10.1007/978-3-642-23400-2},
  doi       = {10.1007/978-3-642-23400-2},
  isbn      = {978-3-642-23399-9},
  timestamp = {Wed, 24 May 2017 08:27:46 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/2011-1},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iiswc/2011,
  title     = {Proceedings of the 2011 {IEEE} International Symposium on Workload
               Characterization, {IISWC} 2011, Austin, TX, USA, November 6-8, 2011},
  publisher = {{IEEE} Computer Society},
  year      = {2011},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6107922},
  isbn      = {978-1-4577-2064-2},
  timestamp = {Thu, 27 Aug 2015 18:04:47 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iiswc/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ispass/2011,
  title     = {{IEEE} International Symposium on Performance Analysis of Systems
               and Software, {ISPASS} 2011, 10-12 April, 2011, Austin, TX, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2011},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5755445},
  isbn      = {978-1-61284-367-4},
  timestamp = {Mon, 04 May 2015 17:00:50 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2011ic,
  editor    = {Luigi Carro and
               Andy D. Pimentel},
  title     = {2011 International Conference on Embedded Computer Systems: Architectures,
               Modeling, and Simulation, {SAMOS} XI, Samos, Greece, July 18-21, 2011},
  publisher = {{IEEE}},
  year      = {2011},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6036614},
  isbn      = {978-1-4577-0802-2},
  timestamp = {Sat, 29 Oct 2011 18:55:01 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/2011ic},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sc/2011scala,
  editor    = {Vassil N. Alexandrov and
               Al Geist and
               Jack J. Dongarra},
  title     = {Proceedings of the second workshop on Scalable algorithms for large-scale
               systems, ScalA@SC 2011, Seattle, WA, USA, November 14, 2011},
  publisher = {{ACM}},
  year      = {2011},
  url       = {http://dl.acm.org/citation.cfm?id=2133173},
  isbn      = {978-1-4503-1180-9},
  timestamp = {Mon, 21 Aug 2017 16:43:27 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sc/2011scala},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cisis/2010,
  editor    = {Leonard Barolli and
               Fatos Xhafa and
               Salvatore Vitabile and
               Hui{-}Huang Hsu},
  title     = {{CISIS} 2010, The Fourth International Conference on Complex, Intelligent
               and Software Intensive Systems, Krakow, Poland, 15-18 February 2010},
  publisher = {{IEEE} Computer Society},
  year      = {2010},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5446610},
  isbn      = {978-0-7695-3967-6},
  timestamp = {Mon, 13 Oct 2014 17:58:21 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/cisis/2010},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/csedu/2010-1,
  editor    = {Jos{\'{e}} A. Moinhos Cordeiro and
               Boris Shishkov and
               Alexander Verbraeck and
               Markus Helfert},
  title     = {{CSEDU} 2010 - Proceedings of the Second International Conference
               on Computer Supported Education, Valencia, Spain, April 7-10, 2010
               - Volume 1},
  publisher = {{INSTICC} Press},
  year      = {2010},
  isbn      = {978-989-674-023-8},
  timestamp = {Tue, 04 Jan 2011 15:45:29 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/csedu/2010-1},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/europar/2010-1,
  editor    = {Pasqua D'Ambra and
               Mario Rosario Guarracino and
               Domenico Talia},
  title     = {Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference,
               Ischia, Italy, August 31 - September 3, 2010, Proceedings, Part {I}},
  series    = {Lecture Notes in Computer Science},
  volume    = {6271},
  publisher = {Springer},
  year      = {2010},
  url       = {https://doi.org/10.1007/978-3-642-15277-1},
  doi       = {10.1007/978-3-642-15277-1},
  isbn      = {978-3-642-15276-4},
  timestamp = {Wed, 24 May 2017 08:27:47 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/2010-1},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/europar/2010-2,
  editor    = {Pasqua D'Ambra and
               Mario Rosario Guarracino and
               Domenico Talia},
  title     = {Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference,
               Ischia, Italy, August 31 - September 3, 2010, Proceedings, Part {II}},
  series    = {Lecture Notes in Computer Science},
  volume    = {6272},
  publisher = {Springer},
  year      = {2010},
  url       = {https://doi.org/10.1007/978-3-642-15291-7},
  doi       = {10.1007/978-3-642-15291-7},
  isbn      = {978-3-642-15290-0},
  timestamp = {Wed, 24 May 2017 08:27:48 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/2010-2},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hipeac/2010,
  editor    = {Yale N. Patt and
               Pierfrancesco Foglia and
               Evelyn Duesterwald and
               Paolo Faraboschi and
               Xavier Martorell},
  title     = {High Performance Embedded Architectures and Compilers, 5th International
               Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {5952},
  publisher = {Springer},
  year      = {2010},
  url       = {https://doi.org/10.1007/978-3-642-11515-8},
  doi       = {10.1007/978-3-642-11515-8},
  isbn      = {978-3-642-11514-1},
  timestamp = {Sun, 21 May 2017 00:18:11 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hipeac/2010},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2010,
  editor    = {Matthew T. Jacob and
               Chita R. Das and
               Pradip Bose},
  title     = {16th International Conference on High-Performance Computer Architecture
               {(HPCA-16} 2010), 9-14 January 2010, Bangalore, India},
  publisher = {{IEEE} Computer Society},
  year      = {2010},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5410726},
  isbn      = {978-1-4244-5659-8},
  timestamp = {Tue, 07 Oct 2014 17:26:20 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2010},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2010w,
  editor    = {Ana Lucia Varbanescu and
               Anca Mariana Molnos and
               Rob van Nieuwpoort},
  title     = {Computer Architecture - {ISCA} 2010 International Workshops A4MMC,
               AMAS-BT, EAMA, WEED, WIOSCA, Saint-Malo, France, June 19-23, 2010,
               Revised Selected Papers},
  series    = {Lecture Notes in Computer Science},
  volume    = {6161},
  publisher = {Springer},
  year      = {2012},
  url       = {https://doi.org/10.1007/978-3-642-24322-6},
  doi       = {10.1007/978-3-642-24322-6},
  isbn      = {978-3-642-24321-9},
  timestamp = {Tue, 23 May 2017 01:12:15 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2010w},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2010,
  title     = {43rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2010, 4-8 December 2010, Atlanta, Georgia, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2010},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5692847},
  isbn      = {978-0-7695-4299-7},
  timestamp = {Thu, 18 Sep 2014 16:58:22 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2010},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2010ic,
  editor    = {Fadi J. Kurdahi and
               Jarmo Takala},
  title     = {Proceedings of the 2010 International Conference on Embedded Computer
               Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2010),
               Samos, Greece, July 19-22, 2010},
  publisher = {{IEEE}},
  year      = {2010},
  isbn      = {978-1-4244-7937-5},
  timestamp = {Wed, 24 Nov 2010 11:40:16 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/samos/2010ic},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iccS/2010,
  editor    = {Peter M. A. Sloot and
               G. Dick van Albada and
               Jack J. Dongarra},
  title     = {Proceedings of the International Conference on Computational Science,
               {ICCS} 2010, University of Amsterdam, The Netherlands, May 31 - June
               2, 2010},
  series    = {Procedia Computer Science},
  volume    = {1},
  number    = {1},
  publisher = {Elsevier},
  year      = {2010},
  url       = {http://www.sciencedirect.com/science/journal/18770509/1/1},
  timestamp = {Mon, 21 Aug 2017 16:43:25 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iccS/2010},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2009,
  editor    = {J{\"{o}}rg Henkel and
               Sri Parameswaran},
  title     = {Proceedings of the 2009 International Conference on Compilers, Architecture,
               and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
               October 11-16, 2009},
  publisher = {{ACM}},
  year      = {2009},
  timestamp = {Mon, 26 Oct 2009 16:02:55 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cases/2009},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cf/2009,
  editor    = {Gearold Johnson and
               Carsten Trinitis and
               Georgi Gaydadjiev and
               Alexander V. Veidenbaum},
  title     = {Proceedings of the 6th Conference on Computing Frontiers, 2009, Ischia,
               Italy, May 18-20, 2009},
  publisher = {{ACM}},
  year      = {2009},
  isbn      = {978-1-60558-413-3},
  timestamp = {Fri, 29 May 2009 08:00:45 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/cf/2009},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hipeac/2009,
  editor    = {Andr{\'{e}} Seznec and
               Joel S. Emer and
               Michael F. P. O'Boyle and
               Margaret Martonosi and
               Theo Ungerer},
  title     = {High Performance Embedded Architectures and Compilers, Fourth International
               Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {5409},
  publisher = {Springer},
  year      = {2009},
  url       = {https://doi.org/10.1007/978-3-540-92990-1},
  doi       = {10.1007/978-3-540-92990-1},
  isbn      = {978-3-540-92989-5},
  timestamp = {Sun, 21 May 2017 00:18:11 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hipeac/2009},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/icpads/2009,
  title     = {15th {IEEE} International Conference on Parallel and Distributed Systems,
               {ICPADS} 2009, Shenzhen, China, December 8-11, 2009},
  publisher = {{IEEE} Computer Society},
  year      = {2009},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5394475},
  isbn      = {978-1-4244-5788-5},
  timestamp = {Mon, 04 May 2015 17:00:41 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/icpads/2009},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2009,
  editor    = {Koen Bertels and
               Nikitas J. Dimopoulos and
               Cristina Silvano and
               Stephan Wong},
  title     = {Embedded Computer Systems: Architectures, Modeling, and Simulation,
               9th International Workshop, {SAMOS} 2009, Samos, Greece, July 20-23,
               2009. Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {5657},
  publisher = {Springer},
  year      = {2009},
  url       = {https://doi.org/10.1007/978-3-642-03138-0},
  doi       = {10.1007/978-3-642-03138-0},
  isbn      = {978-3-642-03137-3},
  timestamp = {Thu, 25 May 2017 00:42:59 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/2009},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sbac-pad/2009,
  title     = {21st International Symposium on Computer Architecture and High Performance
               Computing, {SBAC-PAD} 2009, Sao Paolo, Brazil, October 28-31, 2009},
  publisher = {{IEEE} Computer Society},
  year      = {2009},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5336186},
  isbn      = {978-0-7695-3857-0},
  timestamp = {Wed, 22 Apr 2015 16:41:58 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sbac-pad/2009},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hipeac/2008,
  editor    = {Per Stenstr{\"{o}}m and
               Michel Dubois and
               Manolis Katevenis and
               Rajiv Gupta and
               Theo Ungerer},
  title     = {High Performance Embedded Architectures and Compilers, Third International
               Conference, HiPEAC 2008, G{\"{o}}teborg, Sweden, January 27-29,
               2008, Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {4917},
  publisher = {Springer},
  year      = {2008},
  url       = {https://doi.org/10.1007/978-3-540-77560-7},
  doi       = {10.1007/978-3-540-77560-7},
  isbn      = {978-3-540-77559-1},
  timestamp = {Fri, 09 Mar 2018 07:02:42 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/hipeac/2008},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/icpp/2008,
  title     = {2008 International Conference on Parallel Processing, {ICPP} 2008,
               September 8-12, 2008, Portland, Oregon, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2008},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4625814},
  timestamp = {Fri, 25 Jul 2014 14:09:08 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/icpp/2008},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iscas/2008,
  title     = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
               May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
  publisher = {{IEEE}},
  year      = {2008},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4534149},
  isbn      = {978-1-4244-1683-7},
  timestamp = {Fri, 20 May 2016 09:40:26 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/2008},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2008,
  editor    = {Mladen Berekovic and
               Nikitas J. Dimopoulos and
               Stephan Wong},
  title     = {Embedded Computer Systems: Architectures, Modeling, and Simulation,
               8th International Workshop, {SAMOS} 2008, Samos, Greece, July 21-24,
               2008. Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {5114},
  publisher = {Springer},
  year      = {2008},
  url       = {https://doi.org/10.1007/978-3-540-70550-5},
  doi       = {10.1007/978-3-540-70550-5},
  isbn      = {978-3-540-70549-9},
  timestamp = {Tue, 13 Jun 2017 10:37:56 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/2008},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:journals/thipeac/2007-1,
  editor    = {Per Stenstr{\"{o}}m and
               Michael F. P. O'Boyle and
               Fran{\c{c}}ois Bodin and
               Marcelo Cintra and
               Sally A. McKee},
  title     = {Transactions on High-Performance Embedded Architectures and Compilers
               {I}},
  series    = {Lecture Notes in Computer Science},
  volume    = {4050},
  publisher = {Springer},
  year      = {2007},
  url       = {https://doi.org/10.1007/978-3-540-71528-3},
  doi       = {10.1007/978-3-540-71528-3},
  isbn      = {978-3-540-71527-6},
  timestamp = {Fri, 02 Jun 2017 13:01:08 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/thipeac/2007-1},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2007,
  title     = {16th International Conference on Parallel Architectures and Compilation
               Techniques {(PACT} 2007), Brasov, Romania, September 15-19, 2007},
  publisher = {{IEEE} Computer Society},
  year      = {2007},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4336183},
  isbn      = {0-7695-2944-5},
  timestamp = {Mon, 15 Apr 2019 16:16:42 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/2007},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iiswc/2007,
  title     = {{IEEE} 10th International Symposium on Workload Characterization,
               {IISWC} 2007, Boston, MA, USA, 27-29 September, 2007},
  publisher = {{IEEE} Computer Society},
  year      = {2007},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4362166},
  isbn      = {978-1-4244-1561-8},
  timestamp = {Wed, 15 Jun 2016 13:43:05 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iiswc/2007},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ispass/2007,
  title     = {2007 {IEEE} International Symposium on Performance Analysis of Systems
               and Software, April 25-27, 2007, San Jose, California, USA, Proceedings},
  publisher = {{IEEE} Computer Society},
  year      = {2007},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4211006},
  isbn      = {1-4244-1081-9},
  timestamp = {Mon, 04 May 2015 17:00:48 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/2007},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2007ic,
  editor    = {Holger Blume and
               Georgi Gaydadjiev and
               C. John Glossner and
               Peter M. W. Knijnenburg},
  title     = {Proceedings of the 2007 International Conference on Embedded Computer
               Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2007),
               Samos, Greece, July 16-19, 2007},
  publisher = {{IEEE}},
  year      = {2007},
  isbn      = {1-4244-1058-4},
  timestamp = {Tue, 07 Sep 2010 07:18:12 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/2007ic},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2007,
  editor    = {Stamatis Vassiliadis and
               Mladen Berekovic and
               Timo D. H{\"{a}}m{\"{a}}l{\"{a}}inen},
  title     = {Embedded Computer Systems: Architectures, Modeling, and Simulation,
               7th International Workshop, {SAMOS} 2007, Samos, Greece, July 16-19,
               2007, Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {4599},
  publisher = {Springer},
  year      = {2007},
  url       = {https://doi.org/10.1007/978-3-540-73625-7},
  doi       = {10.1007/978-3-540-73625-7},
  isbn      = {978-3-540-73622-6},
  timestamp = {Fri, 02 Jun 2017 13:01:07 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/samos/2007},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2006,
  editor    = {Erik R. Altman and
               Kevin Skadron and
               Benjamin G. Zorn},
  title     = {15th International Conference on Parallel Architectures and Compilation
               Techniques {(PACT} 2006), Seattle, Washington, USA, September 16-20,
               2006},
  publisher = {{ACM}},
  year      = {2006},
  url       = {https://doi.org/10.1145/1152154},
  doi       = {10.1145/1152154},
  isbn      = {1-59593-264-X},
  timestamp = {Mon, 15 Apr 2019 16:16:35 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/2006},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iiswc/2006,
  title     = {Proceedings of the 2006 {IEEE} International Symposium on Workload
               Characterization, {IISWC} 2006, October 25-27, 2006, San Jose, California,
               {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2006},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4086118},
  isbn      = {1-4244-0508-4},
  timestamp = {Thu, 27 Aug 2015 18:04:47 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iiswc/2006},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2005,
  editor    = {Thomas M. Conte and
               Paolo Faraboschi and
               William H. Mangione{-}Smith and
               Walid A. Najjar},
  title     = {Proceedings of the 2005 International Conference on Compilers, Architecture,
               and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
               USA, September 24-27, 2005},
  publisher = {{ACM}},
  year      = {2005},
  isbn      = {1-59593-149-X},
  timestamp = {Wed, 15 Feb 2006 13:37:46 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cases/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/icpp/2005,
  title     = {34th International Conference on Parallel Processing {(ICPP} 2005),
               14-17 June 2005, Oslo, Norway},
  publisher = {{IEEE} Computer Society},
  year      = {2005},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9964},
  isbn      = {0-7695-2380-3},
  timestamp = {Fri, 25 Jul 2014 14:09:07 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/icpp/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ipps/2005,
  title     = {19th International Parallel and Distributed Processing Symposium {(IPDPS}
               2005), {CD-ROM} / Abstracts Proceedings, 4-8 April 2005, Denver, CO,
               {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2005},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9722},
  isbn      = {0-7695-2312-9},
  timestamp = {Fri, 01 Aug 2014 14:26:13 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ipps/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ishpc/2005,
  editor    = {Jes{\'{u}}s Labarta and
               Kazuki Joe and
               Toshinori Sato},
  title     = {High-Performance Computing - 6th International Symposium, {ISHPC}
               2005, Nara, Japan, September 7-9, 2005, First International Workshop
               on Advanced Low Power Systems, {ALPS} 2006, Revised Selected Papers},
  series    = {Lecture Notes in Computer Science},
  volume    = {4759},
  publisher = {Springer},
  year      = {2008},
  url       = {https://doi.org/10.1007/978-3-540-77704-5},
  doi       = {10.1007/978-3-540-77704-5},
  isbn      = {978-3-540-77703-8},
  timestamp = {Sun, 21 May 2017 00:21:56 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ishpc/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ispass/2005,
  title     = {{IEEE} International Symposium on Performance Analysis of Systems
               and Software, {ISPASS} 2005, March 20-22, 2005, Austin, Texas, USA,
               Proceedings},
  publisher = {{IEEE} Computer Society},
  year      = {2005},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9783},
  isbn      = {0-7803-8965-4},
  timestamp = {Mon, 04 May 2015 17:00:50 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEinteract/2004,
  title     = {8th Annual Workshop on Interaction between Compilers and Computer
               Architecture {(INTERACT-8} 2004), 15 February 2004, Madrid, Spain},
  publisher = {{IEEE} Computer Society},
  year      = {2004},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9098},
  isbn      = {0-7695-2061-8},
  timestamp = {Fri, 01 Apr 2016 10:14:07 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEinteract/2004},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cf/2004,
  editor    = {Stamatis Vassiliadis and
               Jean{-}Luc Gaudiot and
               Vincenzo Piuri},
  title     = {Proceedings of the First Conference on Computing Frontiers, 2004,
               Ischia, Italy, April 14-16, 2004},
  publisher = {{ACM}},
  year      = {2004},
  isbn      = {1-58113-741-9},
  timestamp = {Thu, 23 Jun 2016 15:53:28 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/cf/2004},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/dsd/2004,
  title     = {2004 Euromicro Symposium on Digital Systems Design {(DSD} 2004), Architectures,
               Methods and Tools, 31 August - 3 September 2004, Rennes, France},
  publisher = {{IEEE} Computer Society},
  year      = {2004},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9267},
  isbn      = {0-7695-2203-3},
  timestamp = {Thu, 23 Jun 2016 15:53:29 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/dsd/2004},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/europar/2004,
  editor    = {Marco Danelutto and
               Marco Vanneschi and
               Domenico Laforenza},
  title     = {Euro-Par 2004 Parallel Processing, 10th International Euro-Par Conference,
               Pisa, Italy, August 31-September 3, 2004, Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {3149},
  publisher = {Springer},
  year      = {2004},
  url       = {https://doi.org/10.1007/b99409},
  doi       = {10.1007/b99409},
  isbn      = {3-540-22924-8},
  timestamp = {Tue, 30 May 2017 12:57:44 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/2004},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/eusipco/2004,
  title     = {2004 12th European Signal Processing Conference, Vienna, Austria,
               September 6-10, 2004},
  publisher = {{IEEE}},
  year      = {2004},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7079653},
  isbn      = {978-320-0001-65-7},
  timestamp = {Fri, 29 Apr 2016 15:12:19 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/eusipco/2004},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2004,
  title     = {10th International Conference on High-Performance Computer Architecture
               {(HPCA-10} 2004), 14-18 February 2004, Madrid, Spain},
  publisher = {{IEEE} Computer Society},
  year      = {2004},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9679},
  isbn      = {0-7695-2053-7},
  timestamp = {Tue, 07 Oct 2014 17:26:19 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2004},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ipps/2004,
  title     = {18th International Parallel and Distributed Processing Symposium {(IPDPS}
               2004), {CD-ROM} / Abstracts Proceedings, 26-30 April 2004, Santa Fe,
               New Mexico, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2004},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9132},
  isbn      = {0-7695-2132-0},
  timestamp = {Fri, 01 Aug 2014 14:26:09 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ipps/2004},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2004,
  title     = {31st International Symposium on Computer Architecture {(ISCA} 2004),
               19-23 June 2004, Munich, Germany},
  publisher = {{IEEE} Computer Society},
  year      = {2004},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9170},
  isbn      = {0-7695-2143-6},
  timestamp = {Thu, 16 Oct 2014 17:35:15 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2004},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2004,
  title     = {37th Annual International Symposium on Microarchitecture {(MICRO-37}
               2004), 4-8 December 2004, Portland, OR, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2004},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=10398},
  isbn      = {0-7695-2126-6},
  timestamp = {Thu, 18 Sep 2014 16:58:21 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2004},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ishpc/2003,
  editor    = {Alexander V. Veidenbaum and
               Kazuki Joe and
               Hideharu Amano and
               Hideo Aiso},
  title     = {High Performance Computing, 5th International Symposium, {ISHPC} 2003,
               Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {2858},
  publisher = {Springer},
  year      = {2003},
  url       = {https://doi.org/10.1007/b14207},
  doi       = {10.1007/b14207},
  isbn      = {3-540-20359-1},
  timestamp = {Mon, 29 May 2017 16:53:44 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ishpc/2003},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/europar/2002,
  editor    = {Burkhard Monien and
               Rainer Feldmann},
  title     = {Euro-Par 2002, Parallel Processing, 8th International Euro-Par Conference
               Paderborn, Germany, August 27-30, 2002, Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {2400},
  publisher = {Springer},
  year      = {2002},
  url       = {https://doi.org/10.1007/3-540-45706-2},
  doi       = {10.1007/3-540-45706-2},
  isbn      = {3-540-44049-6},
  timestamp = {Fri, 26 May 2017 14:09:14 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/2002},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ishpc/2002,
  editor    = {Hans P. Zima and
               Kazuki Joe and
               Mitsuhisa Sato and
               Yoshiki Seo and
               Masaaki Shimasaki},
  title     = {High Performance Computing, 4th International Symposium, {ISHPC} 2002,
               Kansai Science City, Japan, May 15-17, 2002, Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {2327},
  publisher = {Springer},
  year      = {2002},
  url       = {https://doi.org/10.1007/3-540-47847-7},
  doi       = {10.1007/3-540-47847-7},
  isbn      = {3-540-43674-X},
  timestamp = {Fri, 26 May 2017 14:09:15 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ishpc/2002},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2002,
  editor    = {Erik R. Altman and
               Kemal Ebcioglu and
               Scott A. Mahlke and
               B. Ramakrishna Rau and
               Sanjay J. Patel},
  title     = {Proceedings of the 35th Annual International Symposium on Microarchitecture,
               Istanbul, Turkey, November 18-22, 2002},
  publisher = {{ACM/IEEE} Computer Society},
  year      = {2002},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8385},
  isbn      = {0-7695-1859-1},
  timestamp = {Thu, 18 Sep 2014 16:58:21 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2002},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/europar/2001,
  editor    = {Rizos Sakellariou and
               John A. Keane and
               John R. Gurd and
               Len Freeman},
  title     = {Euro-Par 2001: Parallel Processing, 7th International Euro-Par Conference
               Manchester, {UK} August 28-31, 2001, Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {2150},
  publisher = {Springer},
  year      = {2001},
  url       = {https://doi.org/10.1007/3-540-44681-8},
  doi       = {10.1007/3-540-44681-8},
  isbn      = {3-540-42495-4},
  timestamp = {Fri, 26 May 2017 14:09:14 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/europar/2001},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2001,
  editor    = {Per Stenstr{\"{o}}m},
  title     = {Proceedings of the 28th Annual International Symposium on Computer
               Architecture, {ISCA} 2001, G{\"{o}}teborg, Sweden, June 30-July
               4, 2001},
  publisher = {{ACM}},
  year      = {2001},
  url       = {http://dl.acm.org/citation.cfm?id=379240},
  isbn      = {0-7695-1162-7},
  timestamp = {Thu, 16 Oct 2014 17:35:15 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2001},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2000,
  title     = {Proceedings of the 2000 International Conference on Parallel Architectures
               and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania,
               USA, October 15-19, 2000},
  publisher = {{IEEE} Computer Society},
  year      = {2000},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7126},
  isbn      = {0-7695-0622-4},
  timestamp = {Mon, 11 Aug 2014 17:11:10 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/2000},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/europar/2000,
  editor    = {Arndt Bode and
               Thomas Ludwig and
               Wolfgang Karl and
               Roland Wism{\"{u}}ller},
  title     = {Euro-Par 2000, Parallel Processing, 6th International Euro-Par Conference,
               Munich, Germany, August 29 - September 1, 2000, Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {1900},
  publisher = {Springer},
  year      = {2000},
  url       = {https://doi.org/10.1007/3-540-44520-X},
  doi       = {10.1007/3-540-44520-X},
  isbn      = {3-540-67956-1},
  timestamp = {Wed, 14 Nov 2018 10:58:19 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/europar/2000},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2000,
  title     = {Proceedings of the Sixth International Symposium on High-Performance
               Computer Architecture, Toulouse, France, January 8-12, 2000},
  publisher = {{IEEE} Computer Society},
  year      = {2000},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6665},
  isbn      = {0-7695-0550-3},
  timestamp = {Tue, 07 Oct 2014 17:26:19 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2000},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/icpp/1999,
  title     = {Proceedings of the International Conference on Parallel Processing
               1999, {ICPP} 1999, Wakamatsu, Japan, September 21-24, 1999},
  publisher = {{IEEE} Computer Society},
  year      = {1999},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6466},
  isbn      = {0-7695-0350-0},
  timestamp = {Fri, 25 Jul 2014 14:28:05 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/icpp/1999},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ics/1999,
  editor    = {Theodore S. Papatheodorou and
               Mateo Valero and
               Constantine D. Polychronopoulos and
               Yoichi Muraoka and
               Jes{\'{u}}s Labarta},
  title     = {Proceedings of the 13th international conference on Supercomputing,
               {ICS} 1999, Rhodes, Greece, June 20-25, 1999},
  publisher = {{ACM}},
  year      = {1999},
  url       = {https://doi.org/10.1145/305138},
  doi       = {10.1145/305138},
  isbn      = {1-58113-164-X},
  timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ics/1999},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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