BibTeX records: Michael D. Powell

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@inproceedings{DBLP:conf/hpca/RanganPWB11,
  author       = {Krishna K. Rangan and
                  Michael D. Powell and
                  Gu{-}Yeon Wei and
                  David M. Brooks},
  title        = {Achieving uniform performance and maximizing throughput in the presence
                  of heterogeneity},
  booktitle    = {17th International Conference on High-Performance Computer Architecture
                  {(HPCA-17} 2011), February 12-16 2011, San Antonio, Texas, {USA}},
  pages        = {3--14},
  publisher    = {{IEEE} Computer Society},
  year         = {2011},
  url          = {https://doi.org/10.1109/HPCA.2011.5749712},
  doi          = {10.1109/HPCA.2011.5749712},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hpca/RanganPWB11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hpca/PowellBEMSY09,
  author       = {Michael D. Powell and
                  Arijit Biswas and
                  Joel S. Emer and
                  Shubhendu S. Mukherjee and
                  Basit R. Sheikh and
                  Shrirang M. Yardi},
  title        = {{CAMP:} {A} technique to estimate per-structure power at run-time
                  using a few simple parameters},
  booktitle    = {15th International Conference on High-Performance Computer Architecture
                  {(HPCA-15} 2009), 14-18 February 2009, Raleigh, North Carolina, {USA}},
  pages        = {289--300},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/HPCA.2009.4798264},
  doi          = {10.1109/HPCA.2009.4798264},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/hpca/PowellBEMSY09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isca/PowellBGM09,
  author       = {Michael D. Powell and
                  Arijit Biswas and
                  Shantanu Gupta and
                  Shubhendu S. Mukherjee},
  editor       = {Stephen W. Keckler and
                  Luiz Andr{\'{e}} Barroso},
  title        = {Architectural core salvaging in a multi-core processor for hard-error
                  tolerance},
  booktitle    = {36th International Symposium on Computer Architecture {(ISCA} 2009),
                  June 20-24, 2009, Austin, TX, {USA}},
  pages        = {93--104},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1555754.1555769},
  doi          = {10.1145/1555754.1555769},
  timestamp    = {Fri, 09 Jul 2021 15:51:20 +0200},
  biburl       = {https://dblp.org/rec/conf/isca/PowellBGM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/islped/PowellV07,
  author       = {Michael D. Powell and
                  T. N. Vijaykumar},
  editor       = {Diana Marculescu and
                  Anand Raghunathan and
                  Ali Keshavarzi and
                  Vijaykrishnan Narayanan},
  title        = {Resource area dilation to reduce power density in throughput servers},
  booktitle    = {Proceedings of the 2007 International Symposium on Low Power Electronics
                  and Design, 2007, Portland, OR, USA, August 27-29, 2007},
  pages        = {268--273},
  publisher    = {{ACM}},
  year         = {2007},
  url          = {https://doi.org/10.1145/1283780.1283838},
  doi          = {10.1145/1283780.1283838},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/islped/PowellV07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isca/ChishtiPV05,
  author       = {Zeshan Chishti and
                  Michael D. Powell and
                  T. N. Vijaykumar},
  title        = {Optimizing Replication, Communication, and Capacity Allocation in
                  CMPs},
  booktitle    = {32st International Symposium on Computer Architecture {(ISCA} 2005),
                  4-8 June 2005, Madison, Wisconsin, {USA}},
  pages        = {357--368},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCA.2005.39},
  doi          = {10.1109/ISCA.2005.39},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/ChishtiPV05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/PowellSV05,
  author       = {Michael D. Powell and
                  Ethan Schuchman and
                  T. N. Vijaykumar},
  title        = {Balancing Resource Utilization to Mitigate Power Density in Processor
                  Pipelines},
  booktitle    = {38th Annual {IEEE/ACM} International Symposium on Microarchitecture
                  {(MICRO-38} 2005), 12-16 November 2005, Barcelona, Spain},
  pages        = {294--304},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MICRO.2005.14},
  doi          = {10.1109/MICRO.2005.14},
  timestamp    = {Tue, 31 May 2022 14:39:58 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/PowellSV05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/asplos/GomaaPV04,
  author       = {Mohamed A. Gomaa and
                  Michael D. Powell and
                  T. N. Vijaykumar},
  editor       = {Shubu Mukherjee and
                  Kathryn S. McKinley},
  title        = {Heat-and-run: leveraging {SMT} and {CMP} to manage power density through
                  the operating system},
  booktitle    = {Proceedings of the 11th International Conference on Architectural
                  Support for Programming Languages and Operating Systems, {ASPLOS}
                  2004, Boston, MA, USA, October 7-13, 2004},
  pages        = {260--270},
  publisher    = {{ACM}},
  year         = {2004},
  url          = {https://doi.org/10.1145/1024393.1024424},
  doi          = {10.1145/1024393.1024424},
  timestamp    = {Wed, 07 Jul 2021 13:23:08 +0200},
  biburl       = {https://dblp.org/rec/conf/asplos/GomaaPV04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isca/PowellV04,
  author       = {Michael D. Powell and
                  T. N. Vijaykumar},
  title        = {Exploiting Resonant Behavior to Reduce Inductive Noise},
  booktitle    = {31st International Symposium on Computer Architecture {(ISCA} 2004),
                  19-23 June 2004, Munich, Germany},
  pages        = {288--301},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.org/10.1109/ISCA.2004.1310782},
  doi          = {10.1109/ISCA.2004.1310782},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/PowellV04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isca/PowellV03,
  author       = {Michael D. Powell and
                  T. N. Vijaykumar},
  editor       = {Allan Gottlieb and
                  Kai Li},
  title        = {Pipeline Damping: {A} Microarchitectural Technique to Reduce Inductive
                  Noise in Supply Voltage},
  booktitle    = {30th International Symposium on Computer Architecture {(ISCA} 2003),
                  9-11 June 2003, San Diego, California, {USA}},
  pages        = {72--83},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/ISCA.2003.1206990},
  doi          = {10.1109/ISCA.2003.1206990},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/PowellV03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/islped/PowellV03,
  author       = {Michael D. Powell and
                  T. N. Vijaykumar},
  editor       = {Ingrid Verbauwhede and
                  Hyung Roh},
  title        = {Pipeline muffling and a priori current ramping: architectural techniques
                  to reduce high-frequency inductive noise},
  booktitle    = {Proceedings of the 2003 International Symposium on Low Power Electronics
                  and Design, 2003, Seoul, Korea, August 25-27, 2003},
  pages        = {223--228},
  publisher    = {{ACM}},
  year         = {2003},
  url          = {https://doi.org/10.1145/871506.871562},
  doi          = {10.1145/871506.871562},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/islped/PowellV03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/ChishtiPV03,
  author       = {Zeshan Chishti and
                  Michael D. Powell and
                  T. N. Vijaykumar},
  title        = {Distance Associativity for High-Performance Energy-Efficient Non-Uniform
                  Cache Architectures},
  booktitle    = {Proceedings of the 36th Annual International Symposium on Microarchitecture,
                  San Diego, CA, USA, December 3-5, 2003},
  pages        = {55--66},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MICRO.2003.1253183},
  doi          = {10.1109/MICRO.2003.1253183},
  timestamp    = {Tue, 31 May 2022 14:39:58 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/ChishtiPV03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hpca/YangPFV02,
  author       = {Se{-}Hyun Yang and
                  Michael D. Powell and
                  Babak Falsafi and
                  T. N. Vijaykumar},
  title        = {Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron
                  Processor Energy-Delay},
  booktitle    = {Proceedings of the Eighth International Symposium on High-Performance
                  Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February
                  2-6, 2002},
  pages        = {151--161},
  publisher    = {{IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/HPCA.2002.995706},
  doi          = {10.1109/HPCA.2002.995706},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hpca/YangPFV02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/ParkPV02,
  author       = {Il Park and
                  Michael D. Powell and
                  T. N. Vijaykumar},
  editor       = {Erik R. Altman and
                  Kemal Ebcioglu and
                  Scott A. Mahlke and
                  B. Ramakrishna Rau and
                  Sanjay J. Patel},
  title        = {Reducing register ports for higher speed and lower energy},
  booktitle    = {Proceedings of the 35th Annual International Symposium on Microarchitecture,
                  Istanbul, Turkey, November 18-22, 2002},
  pages        = {171--182},
  publisher    = {{ACM/IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/MICRO.2002.1176248},
  doi          = {10.1109/MICRO.2002.1176248},
  timestamp    = {Tue, 31 May 2022 14:39:58 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/ParkPV02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/PowellYFRV01,
  author       = {Michael D. Powell and
                  Se{-}Hyun Yang and
                  Babak Falsafi and
                  Kaushik Roy and
                  T. N. Vijaykumar},
  title        = {Reducing leakage in a high-performance deep-submicron instruction
                  cache},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {9},
  number       = {1},
  pages        = {77--89},
  year         = {2001},
  url          = {https://doi.org/10.1109/92.920821},
  doi          = {10.1109/92.920821},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/PowellYFRV01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hpca/YangPFRV01,
  author       = {Se{-}Hyun Yang and
                  Michael D. Powell and
                  Babak Falsafi and
                  Kaushik Roy and
                  T. N. Vijaykumar},
  title        = {An Integrated Circuit/Architecture Approach to Reducing Leakage in
                  Deep-Submicron High-Performance I-Caches},
  booktitle    = {Proceedings of the Seventh International Symposium on High-Performance
                  Computer Architecture (HPCA'01), Nuevo Leone, Mexico, January 20-24,
                  2001},
  pages        = {147--157},
  publisher    = {{IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/HPCA.2001.903259},
  doi          = {10.1109/HPCA.2001.903259},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hpca/YangPFRV01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/PowellAVFR01,
  author       = {Michael D. Powell and
                  Amit Agarwal and
                  T. N. Vijaykumar and
                  Babak Falsafi and
                  Kaushik Roy},
  editor       = {Yale N. Patt and
                  Josh Fisher and
                  Paolo Faraboschi and
                  Kevin Skadron},
  title        = {Reducing set-associative cache energy via way-prediction and selective
                  direct-mapping},
  booktitle    = {Proceedings of the 34th Annual International Symposium on Microarchitecture,
                  Austin, Texas, USA, December 1-5, 2001},
  pages        = {54--65},
  publisher    = {{ACM/IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/MICRO.2001.991105},
  doi          = {10.1109/MICRO.2001.991105},
  timestamp    = {Tue, 31 May 2022 14:39:58 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/PowellAVFR01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/islped/PowellYFRV00,
  author       = {Michael D. Powell and
                  Se{-}Hyun Yang and
                  Babak Falsafi and
                  Kaushik Roy and
                  T. N. Vijaykumar},
  editor       = {David T. Blaauw and
                  Christian C. Enz and
                  Thaddeus Gabara and
                  Enrico Macii},
  title        = {Gated-V\({}_{\mbox{dd}}\): a circuit technique to reduce leakage in
                  deep-submicron cache memories},
  booktitle    = {Proceedings of the 2000 International Symposium on Low Power Electronics
                  and Design, 2000, Rapallo, Italy, July 25-27, 2000},
  pages        = {90--95},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/344166.344526},
  doi          = {10.1145/344166.344526},
  timestamp    = {Fri, 16 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/islped/PowellYFRV00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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