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ORCIDBibTeX records: Eduardo J. Peralías
@article{DBLP:journals/tvlsi/DominguezMatasGOGLP23,
author = {Carlos Manuel Dom{\'{\i}}nguez{-}Matas and
Antonio J. Gin{\'{e}}s and
Ar{\'{a}}nzazu Ot{\'{\i}}n and
Valentin Gutierrez and
Gildas L{\'{e}}ger and
Eduardo J. Peral{\'{\i}}as},
title = {Behavioral Model for High-Speed {SAR} ADCs With On-Chip References},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {31},
number = {12},
pages = {1918--1930},
year = {2023},
url = {https://doi.org/10.1109/TVLSI.2023.3314067},
doi = {10.1109/TVLSI.2023.3314067},
timestamp = {Sun, 17 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/DominguezMatasGOGLP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/LegerGPGDJC23,
author = {Gildas L{\'{e}}ger and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Valentin Gutierrez and
C. Dominguez and
Maria Angeles Jal{\'{o}}n and
L. Carranza},
title = {A Single-Event Latchup setup for high-precision {AMS} circuits},
booktitle = {{IEEE} European Test Symposium, {ETS} 2023, Venezia, Italy, May 22-26,
2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ETS56758.2023.10174024},
doi = {10.1109/ETS56758.2023.10174024},
timestamp = {Fri, 14 Jul 2023 22:01:39 +0200},
biburl = {https://dblp.org/rec/conf/ets/LegerGPGDJC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/GinesLP21,
author = {Antonio J. Gin{\'{e}}s and
Gildas L{\'{e}}ger and
Eduardo J. Peral{\'{\i}}as},
title = {Digital Non-Linearity Calibration for ADCs With Redundancy Using a
New {LUT} Approach},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {68},
number = {8},
pages = {3197--3210},
year = {2021},
url = {https://doi.org/10.1109/TCSI.2021.3066886},
doi = {10.1109/TCSI.2021.3066886},
timestamp = {Thu, 16 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasI/GinesLP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/FiorelliBSP20,
author = {Rafaella Fiorelli and
Nicol{\'{a}}s Barabino and
Fernando Silveira and
Eduardo J. Peral{\'{\i}}as},
title = {Normalized Nonlinear Semiempirical {MOST} Model Used in Monolithic
{RF} Class A-to-C PAs},
journal = {Circuits Syst. Signal Process.},
volume = {39},
number = {6},
pages = {2796--2821},
year = {2020},
url = {https://doi.org/10.1007/s00034-019-01296-7},
doi = {10.1007/S00034-019-01296-7},
timestamp = {Thu, 16 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cssp/FiorelliBSP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Lopez-AnguloGP20,
author = {Antonio Lopez{-}Angulo and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as},
title = {Calibration of Capacitor Mismatch and Static Comparator Offset in
{SAR} {ADC} with Digital Redundancy},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180537},
doi = {10.1109/ISCAS45731.2020.9180537},
timestamp = {Mon, 18 Jan 2021 08:38:59 +0100},
biburl = {https://dblp.org/rec/conf/iscas/Lopez-AnguloGP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SerranoGP20,
author = {J. A. Serrano and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as},
title = {Fast Simulation of Non-Linear Circuits using Semi-Analytical Solutions
Based on the Matrix Exponential},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180945},
doi = {10.1109/ISCAS45731.2020.9180945},
timestamp = {Mon, 18 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/SerranoGP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/Lopez-AnguloGP20,
author = {Antonio Lopez{-}Angulo and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as},
title = {Digital calibration of capacitor mismatch and comparison offset in
Split-CDAC {SAR} ADCs with redundancy},
booktitle = {18th {IEEE} International New Circuits and Systems Conference, {NEWCAS}
2020, Montr{\'{e}}al, QC, Canada, June 16-19, 2020},
pages = {130--133},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/NEWCAS49341.2020.9159766},
doi = {10.1109/NEWCAS49341.2020.9159766},
timestamp = {Thu, 13 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/newcas/Lopez-AnguloGP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/GinesLP20,
author = {Antonio J. Gin{\'{e}}s and
Gildas L{\'{e}}ger and
Eduardo J. Peral{\'{\i}}as},
title = {Non-Linear Calibration of Pipeline ADCs using a Histogram-Based Estimation
of the Redundant {INL}},
booktitle = {18th {IEEE} International New Circuits and Systems Conference, {NEWCAS}
2020, Montr{\'{e}}al, QC, Canada, June 16-19, 2020},
pages = {142--145},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/NEWCAS49341.2020.9159800},
doi = {10.1109/NEWCAS49341.2020.9159800},
timestamp = {Thu, 13 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/newcas/GinesLP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijcta/GinesPAR19,
author = {Antonio Jose Gin{\'{e}}s and
Eduardo Jos{\'{e}} Peral{\'{\i}}as and
Cristina Aledo and
Adoraci{\'{o}}n Rueda},
title = {Fast adaptive comparator offset calibration in pipeline {ADC} with
self-repairing thermometer to binary encoder},
journal = {Int. J. Circuit Theory Appl.},
volume = {47},
number = {3},
pages = {333--349},
year = {2019},
url = {https://doi.org/10.1002/cta.2594},
doi = {10.1002/CTA.2594},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijcta/GinesPAR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Lopez-AnguloGPR19,
author = {Antonio Lopez{-}Angulo and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Mismatch and Offset Calibration in Redundant {SAR} {ADC}},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959843},
doi = {10.1109/DCIS201949030.2019.8959843},
timestamp = {Thu, 06 Feb 2020 18:27:27 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Lopez-AnguloGPR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/Lopez-AnguloGPR18,
author = {Antonio Lopez{-}Angulo and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Redundant {SAR} ADCs with Split-capacitor {DAC}},
booktitle = {25th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2018, Bordeaux, France, December 9-12, 2018},
pages = {801--804},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ICECS.2018.8618051},
doi = {10.1109/ICECS.2018.8618051},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/Lopez-AnguloGPR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GinesLPR18,
author = {Antonio J. Gin{\'{e}}s and
Antonio Lopez{-}Angulo and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Description of {SAR} ADCs with Digital Redundancy using a Unified
Hardware-Based Approach},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351565},
doi = {10.1109/ISCAS.2018.8351565},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GinesLPR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/GinesPR17,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Black-Box Calibration for ADCs With Hard Nonlinear Errors Using a
Novel INL-Based Additive Code: {A} Pipeline {ADC} Case Study},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {64-I},
number = {7},
pages = {1718--1729},
year = {2017},
url = {https://doi.org/10.1109/TCSI.2017.2662085},
doi = {10.1109/TCSI.2017.2662085},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/GinesPR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/GinesPR17,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline
ADCs},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {25},
number = {10},
pages = {2966--2970},
year = {2017},
url = {https://doi.org/10.1109/TVLSI.2017.2718625},
doi = {10.1109/TVLSI.2017.2718625},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/GinesPR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BarraganLGPR17,
author = {Manuel J. Barrag{\'{a}}n and
Gildas L{\'{e}}ger and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
editor = {David Atienza and
Giorgio Di Natale},
title = {On the limits of machine learning-based test: {A} calibrated mixed-signal
system case study},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {79--84},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7926962},
doi = {10.23919/DATE.2017.7926962},
timestamp = {Wed, 28 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/BarraganLGPR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/FiorelliP16,
author = {Rafaella Fiorelli and
Eduardo J. Peral{\'{\i}}as},
title = {Semi-empirical {RF} {MOST} model for {CMOS} 65 nm technologies: Theory,
extraction method and validation},
journal = {Integr.},
volume = {52},
pages = {228--236},
year = {2016},
url = {https://doi.org/10.1016/j.vlsi.2015.07.018},
doi = {10.1016/J.VLSI.2015.07.018},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/FiorelliP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/GinesPLRRBM16,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Gildas L{\'{e}}ger and
Adoraci{\'{o}}n Rueda and
Guillaume Renaud and
Manuel J. Barrag{\'{a}}n and
Salvador Mir},
title = {Linearity test of high-speed high-performance ADCs using a self-testable
on-chip generator},
booktitle = {21th {IEEE} European Test Symposium, {ETS} 2016, Amsterdam, Netherlands,
May 23-27, 2016},
pages = {1--6},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ETS.2016.7519308},
doi = {10.1109/ETS.2016.7519308},
timestamp = {Wed, 28 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/GinesPLRRBM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/GinesPR15,
author = {Antonio Jose Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Background Digital Calibration of Comparator Offsets in Pipeline ADCs},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {23},
number = {7},
pages = {1345--1349},
year = {2015},
url = {https://doi.org/10.1109/TVLSI.2014.2335233},
doi = {10.1109/TVLSI.2014.2335233},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/GinesPR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lascas/NunezGPR15,
author = {Juan N{\'{u}}{\~{n}}ez and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {An approach to the design of low-jitter differential clock recovery
circuits for high performance ADCs},
booktitle = {{IEEE} 6th Latin American Symposium on Circuits {\&} Systems,
{LASCAS} 2015, Montevideo, Uruguay, February 24-27, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/LASCAS.2015.7250431},
doi = {10.1109/LASCAS.2015.7250431},
timestamp = {Wed, 30 Oct 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/lascas/NunezGPR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/PeraliasGR14,
author = {Eduardo J. Peral{\'{\i}}as and
Antonio Jose Gin{\'{e}}s and
Adoraci{\'{o}}n Rueda},
editor = {Giorgio Di Natale},
title = {{INL} systematic reduced-test technique for Pipeline ADCs},
booktitle = {19th {IEEE} European Test Symposium, {ETS} 2014, Paderborn, Germany,
May 26-30, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ETS.2014.6847818},
doi = {10.1109/ETS.2014.6847818},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/ets/PeraliasGR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/GinesPLR14,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Gildas L{\'{e}}ger and
Adoraci{\'{o}}n Rueda},
title = {Closed-loop simulation method for evaluation of static offset in discrete-time
comparators},
booktitle = {21st {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2014, Marseille, France, December 7-10, 2014},
pages = {538--541},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ICECS.2014.7050041},
doi = {10.1109/ICECS.2014.7050041},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/GinesPLR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/GinesVPR12,
author = {Antonio Jose Gin{\'{e}}s and
Alberto Villegas and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Self-biased input common-mode generation for improving dynamic range
and yield in inverter-based filters},
booktitle = {19th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2012, Seville, Spain, December 9-12, 2012},
pages = {256--259},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ICECS.2012.6463752},
doi = {10.1109/ICECS.2012.6463752},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/GinesVPR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DoldanGPR12,
author = {Ricardo Dold{\'{a}}n and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Analysis of steady-state common-mode response in differential LC-VCOs},
booktitle = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2012, Seoul, Korea (South), May 20-23, 2012},
pages = {2031--2034},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISCAS.2012.6271679},
doi = {10.1109/ISCAS.2012.6271679},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DoldanGPR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tim/GinesPR11,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using
Arbitrary Input Stimulus},
journal = {{IEEE} Trans. Instrum. Meas.},
volume = {60},
number = {2},
pages = {452--461},
year = {2011},
url = {https://doi.org/10.1109/TIM.2010.2051062},
doi = {10.1109/TIM.2010.2051062},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tim/GinesPR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecctd/FiorelliVPVR11,
author = {Rafaella Fiorelli and
Alberto Villegas and
Eduardo J. Peral{\'{\i}}as and
Diego V{\'{a}}zquez and
Adoraci{\'{o}}n Rueda},
title = {2.4-GHz single-ended input low-power low-voltage active front-end
for ZigBee applications in 90 nm {CMOS}},
booktitle = {20th European Conference on Circuit Theory and Design, {ECCTD} 2011,
Linkoping, Sweden, Aug. 29-31, 2011},
pages = {829--832},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ECCTD.2011.6043831},
doi = {10.1109/ECCTD.2011.6043831},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/ecctd/FiorelliVPVR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/VillegasVPR11,
author = {Alberto Villegas and
Diego V{\'{a}}zquez and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {A 3.6mW @ 1.2V high linear 8\({}^{\mbox{th}}\)-order {CMOS} complex
filter for {IEEE} 802.15.4 standard},
booktitle = {Proceedings of the 37th European Solid-State Circuits Conference,
{ESSCIRC} 2011, Helsinki, Finland, Sept. 12-16, 2011},
pages = {99--102},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ESSCIRC.2011.6044924},
doi = {10.1109/ESSCIRC.2011.6044924},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/VillegasVPR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/JalonP10,
author = {Maria Angeles Jal{\'{o}}n and
Eduardo J. Peral{\'{\i}}as},
title = {{ADC} Non-Linearity Low-Cost Test Through a Simplified Double-Histogram
Method},
journal = {J. Electron. Test.},
volume = {26},
number = {1},
pages = {47--58},
year = {2010},
url = {https://doi.org/10.1007/s10836-009-5130-6},
doi = {10.1007/S10836-009-5130-6},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/JalonP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LegerGPR10,
author = {Gildas L{\'{e}}ger and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {On Chopper Effects in Discrete-Time SigmaDelta Modulators},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {57-I},
number = {9},
pages = {2438--2449},
year = {2010},
url = {https://doi.org/10.1109/TCSI.2010.2043996},
doi = {10.1109/TCSI.2010.2043996},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LegerGPR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/GinesDRP10,
author = {Antonio J. Gin{\'{e}}s and
Ricardo Dold{\'{a}}n and
Adoraci{\'{o}}n Rueda and
Eduardo J. Peral{\'{\i}}as},
title = {Power optimization of {CMOS} programmable gain amplifiers with high
dynamic range and common-mode feed-forward circuit},
booktitle = {17th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2010, Athens, Greece, 12-15 December, 2010},
pages = {45--48},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICECS.2010.5724450},
doi = {10.1109/ICECS.2010.5724450},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/GinesDRP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/FiorelliPBS10,
author = {Rafaella Fiorelli and
Eduardo J. Peral{\'{\i}}as and
Nicol{\'{a}}s Barabino and
Fernando Silveira},
title = {A fully differential monolithic 2.4GHZ {PA} for {IEEE} 802.15.4 based
on efficiency design flow},
booktitle = {17th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2010, Athens, Greece, 12-15 December, 2010},
pages = {603--606},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICECS.2010.5724584},
doi = {10.1109/ICECS.2010.5724584},
timestamp = {Sun, 04 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/FiorelliPBS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GinesDARP10,
author = {Antonio J. Gin{\'{e}}s and
Ricardo Dold{\'{a}}n and
Manuel J. Barragan Asian and
Adoraci{\'{o}}n Rueda and
Eduardo J. Peral{\'{\i}}as},
title = {On-chip biased voltage-controlled oscillator with temperature compensation
of the oscillation amplitude for robust {I/Q} generation},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
30 - June 2, 2010, Paris, France},
pages = {1979--1982},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISCAS.2010.5537050},
doi = {10.1109/ISCAS.2010.5537050},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GinesDARP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecctd/GinesPR09,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {On-line estimation of the integral non-linear errors in analogue-to-digital
converters without histogram evaluation},
booktitle = {19th European Conference on Circuit Theory and Design, {ECCTD} 2009,
Antalya, Turkey, August 23-27, 2009},
pages = {97--100},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ECCTD.2009.5274975},
doi = {10.1109/ECCTD.2009.5274975},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ecctd/GinesPR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecctd/GinesPR09a,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {A survey on digital background calibration of ADCs},
booktitle = {19th European Conference on Circuit Theory and Design, {ECCTD} 2009,
Antalya, Turkey, August 23-27, 2009},
pages = {101--104},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ECCTD.2009.5274976},
doi = {10.1109/ECCTD.2009.5274976},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ecctd/GinesPR09a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/FiorelliSP09,
author = {Rafaella Fiorelli and
Fernando Silveira and
Eduardo J. Peral{\'{\i}}as},
editor = {Ivan Saraiva Silva and
Renato P. Ribas and
Calvin Plett},
title = {Phase noise - consumption trade-off in low power {RF-LC-VCO} design
in micro and nanometric technologies},
booktitle = {Proceedings of the 22st Annual Symposium on Integrated Circuits and
Systems Design: Chip on the Dunes, {SBCCI} 2009, Natal, Brazil, August
31 - September 3, 2009},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1601896.1601918},
doi = {10.1145/1601896.1601918},
timestamp = {Mon, 19 Nov 2018 09:09:09 +0100},
biburl = {https://dblp.org/rec/conf/sbcci/FiorelliSP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsi/PeraliasJR08,
author = {Eduardo J. Peral{\'{\i}}as and
Maria Angeles Jal{\'{o}}n and
Adoraci{\'{o}}n Rueda},
title = {Simple Evaluation of the Nonlinearity Signature of an {ADC} Using
a Spectral Approach},
journal = {{VLSI} Design},
volume = {2008},
pages = {657207:1--657207:8},
year = {2008},
url = {https://doi.org/10.1155/2008/657207},
doi = {10.1155/2008/657207},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsi/PeraliasJR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/LorenzoARP08,
author = {Ricardo Dold{\'{a}}n Lorenzo and
Antonio Jose Gin{\'{e}}s Arteaga and
Adoraci{\'{o}}n Rueda and
Eduardo J. Peral{\'{\i}}as},
title = {A 5GHz wide tuning range {LC-VCO} in sub-micrometer {CMOS} technology},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2008,
Macao, China, November 30 2008 - December 3, 2008},
pages = {558--561},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/APCCAS.2008.4746084},
doi = {10.1109/APCCAS.2008.4746084},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/apccas/LorenzoARP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/GinesDVAJVRP08,
author = {Antonio Jose Gin{\'{e}}s and
Ricardo Dold{\'{a}}n and
Alberto Villegas and
Antonio J. Acosta and
Maria Angeles Jal{\'{o}}n and
Diego V{\'{a}}zquez and
Adoraci{\'{o}}n Rueda and
Eduardo J. Peral{\'{\i}}as},
title = {A 1.2V 5.14mW quadrature frequency synthesizer in 90nm {CMOS} technology
for 2.4GHz ZigBee applications},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2008,
Macao, China, November 30 2008 - December 3, 2008},
pages = {1252--1255},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/APCCAS.2008.4746254},
doi = {10.1109/APCCAS.2008.4746254},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/apccas/GinesDVAJVRP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/FiorelliSPVRH08,
author = {Rafaella Fiorelli and
Fernando Silveira and
Eduardo J. Peral{\'{\i}}as and
Diego V{\'{a}}zquez and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} Luis Huertas},
editor = {Marcelo Lubaszewski and
Michel Renovell and
Rajesh K. Gupta},
title = {A 2.4GHz {LNA} in a 90-nm {CMOS} technology designed with {ACM} model},
booktitle = {Proceedings of the 21st Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2008, Gramado, Brazil, September 1-4, 2008},
pages = {70--75},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1404371.1404398},
doi = {10.1145/1404371.1404398},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/FiorelliSPVRH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GinesPR07,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Improved Background Algorithms for Pipeline {ADC} Full Calibration},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
May 2007, New Orleans, Louisiana, {USA}},
pages = {3383--3386},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ISCAS.2007.378293},
doi = {10.1109/ISCAS.2007.378293},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GinesPR07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/GinesPR07,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
editor = {Antonio Petraglia and
Volnei A. Pedroni and
Gert Cauwenberghs},
title = {Novel swapping technique for background calibration of capacitor mismatching
in pipeline {ADCS}},
booktitle = {Proceedings of the 20th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2007, Copacabana, Rio de Janeiro, Brazil,
September 3-6, 2007},
pages = {21--26},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1284480.1284494},
doi = {10.1145/1284480.1284494},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/GinesPR07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GinesPR06,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Statistical analysis of a background correlation-based technique for
full calibration of pipeline ADCs},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
May 2006, Island of Kos, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISCAS.2006.1693819},
doi = {10.1109/ISCAS.2006.1693819},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GinesPR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/NavarroPPCM05,
author = {Guillermo Zatorre{-}Navarro and
Eduardo J. Peral{\'{\i}}as and
Santiago Celma Pueyo and
Concepci{\'{o}}n Aldea Chagoyen and
Nicol{\'{a}}s J. Medrano{-}Marqu{\'{e}}s},
title = {Digital self-tuning technique for continuous-time filters},
booktitle = {12th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2005, Gammarth, Tunisia, December 11-14, 2005},
pages = {1--4},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ICECS.2005.4633572},
doi = {10.1109/ICECS.2005.4633572},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/NavarroPPCM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GinesPR05,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Full calibration digital techniques for pipeline ADCs},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {1976--1979},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1465002},
doi = {10.1109/ISCAS.2005.1465002},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GinesPR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LegerPRH04,
author = {Gildas L{\'{e}}ger and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} Luis Huertas},
title = {Impact of random channel mismatch on the {SNR} and {SFDR} of time-interleaved
ADCs},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {51-I},
number = {1},
pages = {140--150},
year = {2004},
url = {https://doi.org/10.1109/TCSI.2003.821301},
doi = {10.1109/TCSI.2003.821301},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LegerPRH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GinesPR04,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Digital Background Gain Error Correction in Pipeline ADCs},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2004), 16-20 February 2004, Paris, France},
pages = {82--87},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DATE.2004.1268831},
doi = {10.1109/DATE.2004.1268831},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/GinesPR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/GinesPR03,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit
Stages},
booktitle = {Proceedings of the 16th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2003, Sao Paulo, Brazil, September 8-11, 2003},
pages = {317--322},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/SBCCI.2003.1232847},
doi = {10.1109/SBCCI.2003.1232847},
timestamp = {Fri, 17 Jun 2022 15:49:04 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/GinesPR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/HuertasVJRH02,
author = {Gloria Huertas and
Diego V{\'{a}}zquez and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} Luis Huertas},
title = {Practical Oscillation-Based Test of Integrated Filters},
journal = {{IEEE} Des. Test Comput.},
volume = {19},
number = {6},
pages = {64--72},
year = {2002},
url = {https://doi.org/10.1109/MDT.2002.1047745},
doi = {10.1109/MDT.2002.1047745},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/HuertasVJRH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/HuertasVPRH02,
author = {Gloria Huertas and
Diego V{\'{a}}zquez and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} Luis Huertas},
title = {Testing Mixed-Signal Cores: {A} Practical Oscillation-Based Test in
an Analog Macrocell},
journal = {{IEEE} Des. Test Comput.},
volume = {19},
number = {6},
pages = {73--82},
year = {2002},
url = {https://doi.org/10.1109/MDT.2002.1047746},
doi = {10.1109/MDT.2002.1047746},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/HuertasVPRH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GinesPRSM02,
author = {Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Ralf Seepold and
Natividad Mart{\'{\i}}nez Madrid},
title = {A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural
Models with Non-Ideal Effects},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {310--314},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998290},
doi = {10.1109/DATE.2002.998290},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/GinesPRSM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/PeraliasRH01,
author = {Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} Luis Huertas},
title = {New {BIST} Schemes for Structural Testing of Pipelined Analog to Digital
Converters},
journal = {J. Electron. Test.},
volume = {17},
number = {5},
pages = {373--383},
year = {2001},
url = {https://doi.org/10.1023/A:1012747017838},
doi = {10.1023/A:1012747017838},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/PeraliasRH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MadridPAR01,
author = {Natividad Mart{\'{\i}}nez Madrid and
Eduardo J. Peral{\'{\i}}as and
Antonio J. Acosta and
Adoraci{\'{o}}n Rueda},
editor = {Wolfgang Nebel and
Ahmed Jerraya},
title = {Analog/mixed-signal {IP} modeling for design reuse},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2001, Munich, Germany, March 12-16, 2001},
pages = {766--767},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DATE.2001.915115},
doi = {10.1109/DATE.2001.915115},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MadridPAR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PeraliasRH01,
author = {Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {Structural testing of pipelined analog to digital converters},
booktitle = {Proceedings of the 2001 International Symposium on Circuits and Systems,
{ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
pages = {436--439},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ISCAS.2001.921886},
doi = {10.1109/ISCAS.2001.921886},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PeraliasRH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PeraliasHRH01,
author = {Eduardo J. Peral{\'{\i}}as and
Gloria Huertas and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {Self-Testable Pipelined {ADC} with Low Hardware Overhead},
booktitle = {19th {IEEE} {VLSI} Test Symposium {(VTS} 2001), Test and Diagnosis
in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA,
{USA}},
pages = {272--278},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/VTS.2001.923450},
doi = {10.1109/VTS.2001.923450},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PeraliasHRH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HuertasVPRH00,
author = {Gloria Huertas and
Diego V{\'{a}}zquez and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {Testing mixed-signal cores: practical oscillation-based test in an
analog macrocell},
booktitle = {9th Asian Test Symposium {(ATS} 2000), 4-6 December 2000, Taipei,
Taiwan},
pages = {31--38},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ATS.2000.893599},
doi = {10.1109/ATS.2000.893599},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/HuertasVPRH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PeraliasARH00,
author = {Eduardo J. Peral{\'{\i}}as and
Antonio J. Acosta and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
editor = {Ivo Bolsens},
title = {A Vhdl-Based Methodology for Design and Verification of Pipeline {A/D}
Converters},
booktitle = {2000 Design, Automation and Test in Europe {(DATE} 2000), 27-30 March
2000, Paris, France},
pages = {534--538},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2000},
url = {https://doi.org/10.1109/DATE.2000.840837},
doi = {10.1109/DATE.2000.840837},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/PeraliasARH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PeraliasARH00,
author = {Eduardo J. Peral{\'{\i}}as and
Antonio J. Acosta and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {VHDL-based behavioural description of pipeline ADCs},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
May 2000, Proceedings},
pages = {681--684},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/ISCAS.2000.858843},
doi = {10.1109/ISCAS.2000.858843},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PeraliasARH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/PeraliasRH00,
author = {Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {Alternative {DFT} Strategies for High-Speed Pipelined Data Converters},
booktitle = {1st Latin American Test Workshop, {LATW} 2000, Rio de Janeiro, RJ,
Brazil, March 13-15, 2000},
pages = {123--127},
publisher = {{IEEE}},
year = {2000},
timestamp = {Tue, 25 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/latw/PeraliasRH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/JimenezAPR00,
author = {Ra{\'{u}}l Jim{\'{e}}nez and
Antonio J. Acosta and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
editor = {Dimitrios Soudris and
Peter Pirsch and
Erich Barke},
title = {An Application of Self-Timed Circuits to the Reduction of Switching
Noise in Analog-Digital Circuits},
booktitle = {Integrated Circuit Design, Power and Timing Modeling, Optimization
and Simulation, 10th International Workshop, {PATMOS} 2000, G{\"{o}}ttingen,
Germany, September 13-15, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1918},
pages = {295--305},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-45373-3\_31},
doi = {10.1007/3-540-45373-3\_31},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/JimenezAPR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/VazquezRHP98,
author = {Diego V{\'{a}}zquez and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} Luis Huertas and
Eduardo J. Peral{\'{\i}}as},
title = {A high-Q bandpass fully differential {SC} filter with enhanced testability},
journal = {{IEEE} J. Solid State Circuits},
volume = {33},
number = {7},
pages = {976--986},
year = {1998},
url = {https://doi.org/10.1109/4.701236},
doi = {10.1109/4.701236},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/VazquezRHP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PrietoRGPHR98,
author = {Juan A. Prieto and
Adoraci{\'{o}}n Rueda and
Ian Andrew Grout and
Eduardo J. Peral{\'{\i}}as and
Jos{\'{e}} L. Huertas and
Andrew Mark David Richardson},
editor = {Patrick M. Dewilde and
Franz J. Rammig and
Gerry Musgrave},
title = {An Approach to Realistic Fault Prediction and Layout Design for Testability
in Analog Circuits},
booktitle = {1998 Design, Automation and Test in Europe {(DATE} '98), February
23-26, 1998, Le Palais des Congr{\`{e}}s de Paris, Paris, France},
pages = {905--909},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/DATE.1998.655965},
doi = {10.1109/DATE.1998.655965},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/PrietoRGPHR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/PeraliasRH98,
author = {Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {{CMOS} pipelined {A/D} converters with concurrent error detection
capability},
booktitle = {5th {IEEE} International Conference on Electronics, Circuits and Systems,
{ICECS} 1998, Surfing the Waves of Science and Technology, Lisbon,
Portugal, September 7-10, 1998},
pages = {437--440},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ICECS.1998.814916},
doi = {10.1109/ICECS.1998.814916},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/PeraliasRH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/PeraliasRPH98,
author = {Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Juan A. Prieto and
Jos{\'{e}} L. Huertas},
title = {DfT and on-line test of high-performance data converters: a practical
case},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {534--540},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743196},
doi = {10.1109/TEST.1998.743196},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/PeraliasRPH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/MirROPH97,
author = {Salvador Mir and
Adoraci{\'{o}}n Rueda and
Thomas Olbrich and
Eduardo J. Peral{\'{\i}}as and
Jos{\'{e}} Luis Huertas},
editor = {Ellen J. Yoffa and
Giovanni De Micheli and
Jan M. Rabaey},
title = {{SWITTEST:} Automatic Switch-Level Fault Simulation and Test Evaluation
of Switched-Capacitor Systems},
booktitle = {Proceedings of the 34st Conference on Design Automation, Anaheim,
California, USA, Anaheim Convention Center, June 9-13, 1997},
pages = {281--286},
publisher = {{ACM} Press},
year = {1997},
url = {https://doi.org/10.1145/266021.266099},
doi = {10.1145/266021.266099},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/MirROPH97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PeraliasRH97,
author = {Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {A {DFT} Technique for Analog-to-Digital Converters with digital correction},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {302--307},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600293},
doi = {10.1109/VTEST.1997.600293},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PeraliasRH97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/PeraliasRH95,
author = {Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} Luis Huertas},
editor = {Richard L. Rudell},
title = {Statistical behavioral modeling and characterization of {A/D} converters},
booktitle = {Proceedings of the 1995 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1995, San Jose, California, USA, November 5-9, 1995},
pages = {562--566},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1995},
url = {https://doi.org/10.1109/ICCAD.1995.480172},
doi = {10.1109/ICCAD.1995.480172},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/PeraliasRH95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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