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BibTeX records: Naoya Onizawa
@article{DBLP:journals/access/OnizawaYSFH23, author = {Naoya Onizawa and Koji Yano and Seiichi Shin and Hiroyuki Fujita and Takahiro Hanyu}, title = {Self-Adaptive Gate Control for Efficient Escape From Local Minimum Energy on Invertible Logic}, journal = {{IEEE} Access}, volume = {11}, pages = {44923--44931}, year = {2023}, url = {https://doi.org/10.1109/ACCESS.2023.3272867}, doi = {10.1109/ACCESS.2023.3272867}, timestamp = {Fri, 02 Jun 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/access/OnizawaYSFH23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/esticas/ShinOGH23, author = {Duckgyu Shin and Naoya Onizawa and Warren J. Gross and Takahiro Hanyu}, title = {Memory-Efficient {FPGA} Implementation of Stochastic Simulated Annealing}, journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.}, volume = {13}, number = {1}, pages = {108--118}, year = {2023}, url = {https://doi.org/10.1109/JETCAS.2023.3243260}, doi = {10.1109/JETCAS.2023.3243260}, timestamp = {Sun, 16 Apr 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/esticas/ShinOGH23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tnn/OnizawaKSGH23, author = {Naoya Onizawa and Kota Katsuki and Duckgyu Shin and Warren J. Gross and Takahiro Hanyu}, title = {Fast-Converging Simulated Annealing for Ising Models Based on Integral Stochastic Computing}, journal = {{IEEE} Trans. Neural Networks Learn. Syst.}, volume = {34}, number = {12}, pages = {10999--11005}, year = {2023}, url = {https://doi.org/10.1109/TNNLS.2022.3159713}, doi = {10.1109/TNNLS.2022.3159713}, timestamp = {Fri, 08 Mar 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tnn/OnizawaKSGH23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpt/KubutaSOH23, author = {Taiga Kubuta and Duckgyu Shin and Naoya Onizawa and Takahiro Hanyu}, title = {Stochastic Implementation of Simulated Quantum Annealing on {PYNQ}}, booktitle = {International Conference on Field Programmable Technology, {ICFPT} 2023, Yokohama, Japan, December 12-14, 2023}, pages = {274--275}, publisher = {{IEEE}}, year = {2023}, url = {https://doi.org/10.1109/ICFPT59805.2023.00042}, doi = {10.1109/ICFPT59805.2023.00042}, timestamp = {Sat, 24 Feb 2024 20:42:47 +0100}, biburl = {https://dblp.org/rec/conf/fpt/KubutaSOH23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icecsys/SasakiSOH23, author = {Ryoma Sasaki and Duckgyu Shin and Naoya Onizawa and Takahiro Hanyu}, title = {Improving Stochastic Quantum-Like Annealing Based on Rerandomization}, booktitle = {30th {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 2023, Istanbul, Turkey, December 4-7, 2023}, pages = {1--4}, publisher = {{IEEE}}, year = {2023}, url = {https://doi.org/10.1109/ICECS58634.2023.10382735}, doi = {10.1109/ICECS58634.2023.10382735}, timestamp = {Thu, 18 Jan 2024 08:27:11 +0100}, biburl = {https://dblp.org/rec/conf/icecsys/SasakiSOH23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2302-12454, author = {Naoya Onizawa and Ryoma Sasaki and Duckgyu Shin and Warren J. Gross and Takahiro Hanyu}, title = {Stochastic Quantum Monte Carlo Algorithm for Large-Scale Combinatorial Optimization Problems}, journal = {CoRR}, volume = {abs/2302.12454}, year = {2023}, url = {https://doi.org/10.48550/arXiv.2302.12454}, doi = {10.48550/ARXIV.2302.12454}, eprinttype = {arXiv}, eprint = {2302.12454}, timestamp = {Tue, 28 Feb 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/corr/abs-2302-12454.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2304-11839, author = {Naoya Onizawa and Kyo Kuroki and Duckgyu Shin and Takahiro Hanyu}, title = {Local Energy Distribution Based Hyperparameter Determination for Stochastic Simulated Annealing}, journal = {CoRR}, volume = {abs/2304.11839}, year = {2023}, url = {https://doi.org/10.48550/arXiv.2304.11839}, doi = {10.48550/ARXIV.2304.11839}, eprinttype = {arXiv}, eprint = {2304.11839}, timestamp = {Wed, 03 May 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-2304-11839.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/flap/ShinOH22, author = {Duckgyu Shin and Naoya Onizawa and Takahiro Hanyu}, title = {Implementation of {CMOS} Invertible Logic on Zynq-SoC Platform: {A} Case Study of Training {BNN}}, journal = {{FLAP}}, volume = {9}, number = {3}, pages = {653--674}, year = {2022}, url = {https://collegepublications.co.uk/ifcolog/?00055}, timestamp = {Mon, 08 Aug 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/flap/ShinOH22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icecsys/KatsukiSOH22, author = {Kota Katsuki and Duckgyu Shin and Naoya Onizawa and Takahiro Hanyu}, title = {Fast Solving Complete 2000-Node Optimization Using Stochastic-Computing Simulated Annealing}, booktitle = {29th {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 2022, Glasgow, United Kingdom, October 24-26, 2022}, pages = {1--4}, publisher = {{IEEE}}, year = {2022}, url = {https://doi.org/10.1109/ICECS202256217.2022.9971124}, doi = {10.1109/ICECS202256217.2022.9971124}, timestamp = {Fri, 23 Dec 2022 17:47:32 +0100}, biburl = {https://dblp.org/rec/conf/icecsys/KatsukiSOH22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/access/OnizawaKYYSFH21, author = {Naoya Onizawa and Makoto Kato and Hitoshi Yamagata and Koji Yano and Seiichi Shin and Hiroyuki Fujita and Takahiro Hanyu}, title = {Sparse Random Signals for Fast Convergence on Invertible Logic}, journal = {{IEEE} Access}, volume = {9}, pages = {62890--62898}, year = {2021}, url = {https://doi.org/10.1109/ACCESS.2021.3072048}, doi = {10.1109/ACCESS.2021.3072048}, timestamp = {Sun, 16 May 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/access/OnizawaKYYSFH21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ojcands/OnizawaTH21, author = {Naoya Onizawa and Akira Tamakoshi and Takahiro Hanyu}, title = {Hardware Acceleration of Large-Scale {CMOS} Invertible Logic Based on Sparse Hamiltonian Matrices}, journal = {{IEEE} Open J. Circuits Syst.}, volume = {2}, pages = {782--791}, year = {2021}, url = {https://doi.org/10.1109/OJCAS.2021.3116584}, doi = {10.1109/OJCAS.2021.3116584}, timestamp = {Mon, 28 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ojcands/OnizawaTH21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/OnizawaNSMGYFH21, author = {Naoya Onizawa and Kaito Nishino and Sean C. Smithson and Brett H. Meyer and Warren J. Gross and Hitoshi Yamagata and Hiroyuki Fujita and Takahiro Hanyu}, title = {A Design Framework for Invertible Logic}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {40}, number = {4}, pages = {655--665}, year = {2021}, url = {https://doi.org/10.1109/TCAD.2020.3003906}, doi = {10.1109/TCAD.2020.3003906}, timestamp = {Thu, 27 Jul 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/OnizawaNSMGYFH21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcasI/ArakawaODH21, author = {Ren Arakawa and Naoya Onizawa and Jean{-}Philippe Diguet and Takahiro Hanyu}, title = {Multi-Context TCAM-Based Selective Computing: Design Space Exploration for a Low-Power {NN}}, journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.}, volume = {68}, number = {1}, pages = {67--76}, year = {2021}, url = {https://doi.org/10.1109/TCSI.2020.3030104}, doi = {10.1109/TCSI.2020.3030104}, timestamp = {Thu, 27 Jul 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcasI/ArakawaODH21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/OnizawaH21, author = {Naoya Onizawa and Takahiro Hanyu}, title = {High Convergence Rates of {CMOS} Invertible Logic Circuits Based on Many-Body Hamiltonians}, booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021, Daegu, South Korea, May 22-28, 2021}, pages = {1--5}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/ISCAS51556.2021.9401278}, doi = {10.1109/ISCAS51556.2021.9401278}, timestamp = {Fri, 02 Jul 2021 12:26:54 +0200}, biburl = {https://dblp.org/rec/conf/iscas/OnizawaH21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sips/OnizawaTH21, author = {Naoya Onizawa and Akira Tamakoshi and Takahiro Hanyu}, title = {Scalable Hardware Architecture for Invertible Logic with Sparse Hamiltonian Matrices}, booktitle = {{IEEE} Workshop on Signal Processing Systems, SiPS 2021, Coimbra, Portugal, October 19-21, 2021}, pages = {1--6}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/SiPS52927.2021.00047}, doi = {10.1109/SIPS52927.2021.00047}, timestamp = {Wed, 17 Nov 2021 17:36:53 +0100}, biburl = {https://dblp.org/rec/conf/sips/OnizawaTH21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/access/ShinOGH20, author = {Duckgyu Shin and Naoya Onizawa and Warren J. Gross and Takahiro Hanyu}, title = {Training Hardware for Binarized Convolutional Neural Network Based on {CMOS} Invertible Logic}, journal = {{IEEE} Access}, volume = {8}, pages = {188004--188014}, year = {2020}, url = {https://doi.org/10.1109/ACCESS.2020.3029576}, doi = {10.1109/ACCESS.2020.3029576}, timestamp = {Tue, 01 Dec 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/access/ShinOGH20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/flap/OnizawaSH20, author = {Naoya Onizawa and Duckgyu Shin and Takahiro Hanyu}, title = {Fast Hardware-based Learning Algorithm for Binarized Perceptrons using {CMOS} Invertible Logic}, journal = {{FLAP}}, volume = {7}, number = {1}, pages = {41--58}, year = {2020}, url = {http://collegepublications.co.uk/ifcolog/?00037}, timestamp = {Fri, 29 Jan 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/flap/OnizawaSH20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/flap/OnizawaAH20, author = {Naoya Onizawa and Ren Arakawa and Takahiro Hanyu}, title = {Design of an MTJ-based Nonvolatile Multi-context Ternary Content-addressable Memory}, journal = {{FLAP}}, volume = {7}, number = {1}, pages = {89--109}, year = {2020}, url = {http://collegepublications.co.uk/ifcolog/?00037}, timestamp = {Fri, 29 Jan 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/flap/OnizawaAH20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/flap/KatoOH20, author = {Makoto Kato and Naoya Onizawa and Takahiro Hanyu}, title = {Design Automation of Invertible Logic Circuit from a Standard {HDL} Description}, journal = {{FLAP}}, volume = {8}, number = {5}, pages = {1311--1333}, year = {2020}, url = {https://collegepublications.co.uk/ifcolog/?00047}, timestamp = {Fri, 27 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/flap/KatoOH20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcas/OnizawaSMGH20, author = {Naoya Onizawa and Sean C. Smithson and Brett H. Meyer and Warren J. Gross and Takahiro Hanyu}, title = {In-Hardware Training Chip Based on {CMOS} Invertible Logic for Machine Learning}, journal = {{IEEE} Trans. Circuits Syst. {I} Fundam. Theory Appl.}, volume = {67-I}, number = {5}, pages = {1541--1550}, year = {2020}, url = {https://doi.org/10.1109/TCSI.2019.2960383}, doi = {10.1109/TCSI.2019.2960383}, timestamp = {Fri, 22 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcas/OnizawaSMGH20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/OnizawaMTYFH20, author = {Naoya Onizawa and Shogo Mukaida and Akira Tamakoshi and Hitoshi Yamagata and Hiroyuki Fujita and Takahiro Hanyu}, title = {High-Throughput/Low-Energy MTJ-Based True Random Number Generator Using a Multi-Voltage/Current Converter}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {28}, number = {10}, pages = {2171--2181}, year = {2020}, url = {https://doi.org/10.1109/TVLSI.2020.3005413}, doi = {10.1109/TVLSI.2020.3005413}, timestamp = {Mon, 20 Sep 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tvlsi/OnizawaMTYFH20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/AliRBDJOH20, author = {Khaled Alhaj Ali and Mostafa Rizk and Amer Baghdadi and Jean{-}Philippe Diguet and Jalal Jomaah and Naoya Onizawa and Takahiro Hanyu}, title = {Memristive Computational Memory Using Memristor Overwrite Logic {(MOL)}}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {28}, number = {11}, pages = {2370--2382}, year = {2020}, url = {https://doi.org/10.1109/TVLSI.2020.3011522}, doi = {10.1109/TVLSI.2020.3011522}, timestamp = {Tue, 01 Dec 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/AliRBDJOH20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/newcas/TamakoshiOYFH20, author = {Akira Tamakoshi and Naoya Onizawa and Hitoshi Yamagata and Hiroyuki Fujita and Takahiro Hanyu}, title = {Design of an Energy-Efficient True Random Number Generator Based on Triple Read-Write Data-Stream Multiplexing of {MTJ} Devices}, booktitle = {18th {IEEE} International New Circuits and Systems Conference, {NEWCAS} 2020, Montr{\'{e}}al, QC, Canada, June 16-19, 2020}, pages = {283--286}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/NEWCAS49341.2020.9159805}, doi = {10.1109/NEWCAS49341.2020.9159805}, timestamp = {Mon, 26 Jun 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/newcas/TamakoshiOYFH20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcas/SmithsonOMGH19, author = {Sean C. Smithson and Naoya Onizawa and Brett H. Meyer and Warren J. Gross and Takahiro Hanyu}, title = {Efficient {CMOS} Invertible Logic Using Stochastic Computing}, journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.}, volume = {66-I}, number = {6}, pages = {2263--2274}, year = {2019}, url = {https://doi.org/10.1109/TCSI.2018.2889732}, doi = {10.1109/TCSI.2018.2889732}, timestamp = {Fri, 22 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcas/SmithsonOMGH19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/acssc/OnizawaNSMGYFH19, author = {Naoya Onizawa and Kaito Nishino and Sean C. Smithson and Brett H. Meyer and Warren J. Gross and Hitoshi Yamagata and Hiroyuki Fujita and Takahiro Hanyu}, editor = {Michael B. Matthews}, title = {A Design Framework for Invertible Logic}, booktitle = {53rd Asilomar Conference on Signals, Systems, and Computers, {ACSCC} 2019, Pacific Grove, CA, USA, November 3-6, 2019}, pages = {312--316}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/IEEECONF44664.2019.9048700}, doi = {10.1109/IEEECONF44664.2019.9048700}, timestamp = {Wed, 10 Feb 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/acssc/OnizawaNSMGYFH19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icecsys/ShinOH19, author = {Duckgyu Shin and Naoya Onizawa and Takahiro Hanyu}, title = {{FPGA} Implementation of Binarized Perceptron Learning Hardware Using {CMOS} Invertible Logic}, booktitle = {26th {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 2019, Genoa, Italy, November 27-29, 2019}, pages = {115--116}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/ICECS46596.2019.8965097}, doi = {10.1109/ICECS46596.2019.8965097}, timestamp = {Mon, 03 Feb 2020 12:19:05 +0100}, biburl = {https://dblp.org/rec/conf/icecsys/ShinOH19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icecsys/ArakawaODH19, author = {Ren Arakawa and Naoya Onizawa and Jean{-}Philippe Diguet and Takahiro Hanyu}, title = {Multi-Context {TCAM} Based Selective Computing Architecture for a Low-Power {NN}}, booktitle = {26th {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 2019, Genoa, Italy, November 27-29, 2019}, pages = {117--118}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/ICECS46596.2019.8964869}, doi = {10.1109/ICECS46596.2019.8964869}, timestamp = {Mon, 03 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/icecsys/ArakawaODH19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icecsys/OnizawaGH19, author = {Naoya Onizawa and Warren J. Gross and Takahiro Hanyu}, title = {Stochastic-Computing Based Brainwave {LSI} Towards an Intelligence Edge}, booktitle = {26th {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 2019, Genoa, Italy, November 27-29, 2019}, pages = {434--437}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/ICECS46596.2019.8964739}, doi = {10.1109/ICECS46596.2019.8964739}, timestamp = {Mon, 03 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/icecsys/OnizawaGH19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/esticas/OnizawaKMGH18, author = {Naoya Onizawa and Daisaku Katagiri and Kazumichi Matsumiya and Warren J. Gross and Takahiro Hanyu}, title = {An Accuracy/Energy-Flexible Configurable Gabor-Filter Chip Based on Stochastic Computation With Dynamic Voltage-Frequency-Length Scaling}, journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.}, volume = {8}, number = {3}, pages = {444--453}, year = {2018}, url = {https://doi.org/10.1109/JETCAS.2018.2844329}, doi = {10.1109/JETCAS.2018.2844329}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/esticas/OnizawaKMGH18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mj/OnizawaIYH18, author = {Naoya Onizawa and Masashi Imai and Tomohiro Yoneda and Takahiro Hanyu}, title = {MTJ-based asynchronous circuits for Re-initialization free computing against power failures}, journal = {Microelectron. J.}, volume = {82}, pages = {46--61}, year = {2018}, url = {https://doi.org/10.1016/j.mejo.2018.10.012}, doi = {10.1016/J.MEJO.2018.10.012}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mj/OnizawaIYH18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/DiguetORSBH18, author = {Jean{-}Philippe Diguet and Naoya Onizawa and Mostafa Rizk and Martha Johanna Sep{\'{u}}lveda and Amer Baghdadi and Takahiro Hanyu}, title = {Networked Power-Gated MRAMs for Memory-Based Computing}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {26}, number = {12}, pages = {2696--2708}, year = {2018}, url = {https://doi.org/10.1109/TVLSI.2018.2856458}, doi = {10.1109/TVLSI.2018.2856458}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/DiguetORSBH18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsisp/BogaLOMHG18, author = {Kaushik Boga and Fran{\c{c}}ois Leduc{-}Primeau and Naoya Onizawa and Kazumichi Matsumiya and Takahiro Hanyu and Warren J. Gross}, title = {A Generalized Stochastic Implementation of the Disparity Energy Model for Depth Perception}, journal = {J. Signal Process. Syst.}, volume = {90}, number = {5}, pages = {709--725}, year = {2018}, url = {https://doi.org/10.1007/s11265-016-1197-3}, doi = {10.1007/S11265-016-1197-3}, timestamp = {Thu, 12 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsisp/BogaLOMHG18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icecsys/NishinoSOMGYFH18, author = {Kaito Nishino and Sean C. Smithson and Naoya Onizawa and Brett H. Meyer and Warren J. Gross and Hitoshi Yamagata and Hiroyuki Fujita and Takahiro Hanyu}, title = {Study of Stochastic Invertible Multiplier Designs}, booktitle = {25th {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 2018, Bordeaux, France, December 9-12, 2018}, pages = {649--650}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/ICECS.2018.8618039}, doi = {10.1109/ICECS.2018.8618039}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/icecsys/NishinoSOMGYFH18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/KoshitaOAHK18, author = {Shunsuke Koshita and Naoya Onizawa and Masahide Abe and Takahiro Hanyu and Masayuki Kawamata}, title = {High-Precision Stochastic State-Space Digital Filters Based on Minimum Roundoff Noise Structure}, booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018, 27-30 May 2018, Florence, Italy}, pages = {1--5}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/ISCAS.2018.8351186}, doi = {10.1109/ISCAS.2018.8351186}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/KoshitaOAHK18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/MukaidaOH18, author = {Shogo Mukaida and Naoya Onizawa and Takahiro Hanyu}, title = {Design of a Low-Power MTJ-Based True Random Number Generator Using a Multi-voltage/Current Converter}, booktitle = {48th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL} 2018, Linz, Austria, May 16-18, 2018}, pages = {156--161}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/ISMVL.2018.00035}, doi = {10.1109/ISMVL.2018.00035}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/MukaidaOH18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/KoshitaOAHK17, author = {Shunsuke Koshita and Naoya Onizawa and Masahide Abe and Takahiro Hanyu and Masayuki Kawamata}, title = {High-Accuracy and Area-Efficient Stochastic {FIR} Digital Filters Based on Hybrid Computation}, journal = {{IEICE} Trans. Inf. Syst.}, volume = {100-D}, number = {8}, pages = {1592--1602}, year = {2017}, url = {https://doi.org/10.1587/transinf.2016LOP0011}, doi = {10.1587/TRANSINF.2016LOP0011}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/KoshitaOAHK17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tetc/OnizawaMTH17, author = {Naoya Onizawa and Akira Mochizuki and Akira Tamakoshi and Takahiro Hanyu}, title = {Sudden Power-Outage Resilient In-Processor Checkpointing for Energy-Harvesting Nonvolatile Processors}, journal = {{IEEE} Trans. Emerg. Top. Comput.}, volume = {5}, number = {2}, pages = {151--163}, year = {2017}, url = {https://doi.org/10.1109/TETC.2016.2604083}, doi = {10.1109/TETC.2016.2604083}, timestamp = {Fri, 15 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tetc/OnizawaMTH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/ArdakaniLOHG17, author = {Arash Ardakani and Fran{\c{c}}ois Leduc{-}Primeau and Naoya Onizawa and Takahiro Hanyu and Warren J. Gross}, title = {{VLSI} Implementation of Deep Neural Network Using Integral Stochastic Computing}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {25}, number = {10}, pages = {2688--2699}, year = {2017}, url = {https://doi.org/10.1109/TVLSI.2017.2654298}, doi = {10.1109/TVLSI.2017.2654298}, timestamp = {Wed, 11 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/ArdakaniLOHG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/OnizawaKSAKH17, author = {Naoya Onizawa and Shunsuke Koshita and Shuichi Sakamoto and Masahide Abe and Masayuki Kawamata and Takahiro Hanyu}, title = {Area/Energy-Efficient Gammatone Filters Based on Stochastic Computation}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {25}, number = {10}, pages = {2724--2735}, year = {2017}, url = {https://doi.org/10.1109/TVLSI.2017.2687404}, doi = {10.1109/TVLSI.2017.2687404}, timestamp = {Wed, 11 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/OnizawaKSAKH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/async/OnizawaIHY17, author = {Naoya Onizawa and Masashi Imai and Takahiro Hanyu and Tomohiro Yoneda}, title = {MTJ-based Asynchronous Circuits for Re-initialization Free Computing against Power Failures}, booktitle = {23rd {IEEE} International Symposium on Asynchronous Circuits and Systems, {ASYNC} 2017, San Diego, CA, USA, May 21-24, 2017}, pages = {118--125}, publisher = {{IEEE} Computer Society}, year = {2017}, url = {https://doi.org/10.1109/ASYNC.2017.11}, doi = {10.1109/ASYNC.2017.11}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/async/OnizawaIHY17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/HanyuSON17, author = {Takahiro Hanyu and Daisuke Suzuki and Naoya Onizawa and Masanori Natsui}, editor = {David Atienza and Giorgio Di Natale}, title = {Three-terminal MTJ-based nonvolatile logic circuits with self-terminated writing mechanism for ultra-low-power {VLSI} processor}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2017, Lausanne, Switzerland, March 27-31, 2017}, pages = {548--553}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.23919/DATE.2017.7927048}, doi = {10.23919/DATE.2017.7927048}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/HanyuSON17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/esscirc/OnizawaMGH17, author = {Naoya Onizawa and Kazumichi Matsumiya and Warren J. Gross and Takahiro Hanyu}, title = {Accuracy/energy-flexible stochastic configurable 2D Gabor filter with instant-on capability}, booktitle = {43rd {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2017, Leuven, Belgium, September 11-14, 2017}, pages = {43--46}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ESSCIRC.2017.8094521}, doi = {10.1109/ESSCIRC.2017.8094521}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/esscirc/OnizawaMGH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/globalsip/OnizawaKSKH17, author = {Naoya Onizawa and Shunsuke Koshita and Shuichi Sakamoto and Masayuki Kawamata and Takahiro Hanyu}, title = {Design of stochastic asymmetric compensation filters for auditory signal processing}, booktitle = {2017 {IEEE} Global Conference on Signal and Information Processing, GlobalSIP 2017, Montreal, QC, Canada, November 14-16, 2017}, pages = {1315--1319}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/GlobalSIP.2017.8309174}, doi = {10.1109/GLOBALSIP.2017.8309174}, timestamp = {Wed, 16 Oct 2019 14:14:51 +0200}, biburl = {https://dblp.org/rec/conf/globalsip/OnizawaKSKH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/OnizawaKSKH17, author = {Naoya Onizawa and Shunsuke Koshita and Shuichi Sakamoto and Masayuki Kawamata and Takahiro Hanyu}, title = {Evaluation of Stochastic Cascaded {IIR} Filters}, booktitle = {47th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL} 2017, Novi Sad, Serbia, May 22-24, 2017}, pages = {224--229}, publisher = {{IEEE} Computer Society}, year = {2017}, url = {https://doi.org/10.1109/ISMVL.2017.25}, doi = {10.1109/ISMVL.2017.25}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/OnizawaKSKH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/newcas/RizkDOBSAGH17, author = {Mostafa Rizk and Jean{-}Philippe Diguet and Naoya Onizawa and Amer Baghdadi and Martha Johanna Sep{\'{u}}lveda and Y. Akgul and Vincent Gripon and Takahiro Hanyu}, title = {NoC-MRAM architecture for memory-based computing: Database-search case study}, booktitle = {15th {IEEE} International New Circuits and Systems Conference, {NEWCAS} 2017, Strasbourg, France, June 25-28, 2017}, pages = {309--312}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/NEWCAS.2017.8010167}, doi = {10.1109/NEWCAS.2017.8010167}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/newcas/RizkDOBSAGH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/esticas/OnizawaJHG16, author = {Naoya Onizawa and Hooman Jarollahi and Takahiro Hanyu and Warren J. Gross}, title = {Hardware Implementation of Associative Memories Based on Multiple-Valued Sparse Clustered Networks}, journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.}, volume = {6}, number = {1}, pages = {13--24}, year = {2016}, url = {https://doi.org/10.1109/JETCAS.2016.2528721}, doi = {10.1109/JETCAS.2016.2528721}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/esticas/OnizawaJHG16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mvl/OnizawaSNSH16, author = {Naoya Onizawa and Noboru Sakimura and Ryusuke Nebashi and Tadahiko Sugibayashi and Takahiro Hanyu}, title = {Evaluation of Soft-Delay-Error Effects in Content-Addressable Memory}, journal = {J. Multiple Valued Log. Soft Comput.}, volume = {26}, number = {1-2}, pages = {125--140}, year = {2016}, url = {http://www.oldcitypublishing.com/journals/mvlsc-home/mvlsc-issue-contents/mvlsc-volume-26-number-1-2-2016/mvlsc-26-1-2-p-125-140/}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/mvl/OnizawaSNSH16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/pieee/HanyuESKMONIO16, author = {Takahiro Hanyu and Tetsuo Endoh and Daisuke Suzuki and Hiroki Koike and Yitao Ma and Naoya Onizawa and Masanori Natsui and Shoji Ikeda and Hideo Ohno}, title = {Standby-Power-Free Integrated Circuits Using MTJ-Based {VLSI} Computing}, journal = {Proc. {IEEE}}, volume = {104}, number = {10}, pages = {1844--1863}, year = {2016}, url = {https://doi.org/10.1109/JPROC.2016.2574939}, doi = {10.1109/JPROC.2016.2574939}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/pieee/HanyuESKMONIO16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icassp/OnizawaKSAKH16, author = {Naoya Onizawa and Shunsuke Koshita and Shuichi Sakamoto and Masahide Abe and Masayuki Kawamata and Takahiro Hanyu}, title = {Gammatone filter based on stochastic computation}, booktitle = {2016 {IEEE} International Conference on Acoustics, Speech and Signal Processing, {ICASSP} 2016, Shanghai, China, March 20-25, 2016}, pages = {1036--1040}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/ICASSP.2016.7471833}, doi = {10.1109/ICASSP.2016.7471833}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/icassp/OnizawaKSAKH16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/KoshitaOAHK16, author = {Shunsuke Koshita and Naoya Onizawa and Masahide Abe and Takahiro Hanyu and Masayuki Kawamata}, title = {Realization of {FIR} Digital Filters Based on Stochastic/Binary Hybrid Computation}, booktitle = {46th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL} 2016, Sapporo, Japan, May 18-20, 2016}, pages = {223--228}, publisher = {{IEEE} Computer Society}, year = {2016}, url = {https://doi.org/10.1109/ISMVL.2016.40}, doi = {10.1109/ISMVL.2016.40}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/KoshitaOAHK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/istc/ArdakaniLOHG16, author = {Arash Ardakani and Fran{\c{c}}ois Leduc{-}Primeau and Naoya Onizawa and Takahiro Hanyu and Warren J. Gross}, title = {{VLSI} implementation of deep neural networks using integral stochastic computing}, booktitle = {9th International Symposium on Turbo Codes and Iterative Information Processing, {ISTC} 2016, Brest, France, September 5-9, 2016}, pages = {216--220}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/ISTC.2016.7593108}, doi = {10.1109/ISTC.2016.7593108}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/istc/ArdakaniLOHG16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/newcas/OnizawaH16, author = {Naoya Onizawa and Takahiro Hanyu}, title = {Redundant STT-MTJ-based nonvolatile flip-flops for low write-error-rate operations}, booktitle = {14th {IEEE} International New Circuits and Systems Conference, {NEWCAS} 2016, Vancouver, BC, Canada, June 26-29, 2016}, pages = {1--4}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/NEWCAS.2016.7604792}, doi = {10.1109/NEWCAS.2016.7604792}, timestamp = {Wed, 16 Oct 2019 14:14:54 +0200}, biburl = {https://dblp.org/rec/conf/newcas/OnizawaH16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/spl/OnizawaKMGH15, author = {Naoya Onizawa and Daisaku Katagiri and Kazumichi Matsumiya and Warren J. Gross and Takahiro Hanyu}, title = {Gabor Filter Based on Stochastic Computation}, journal = {{IEEE} Signal Process. Lett.}, volume = {22}, number = {9}, pages = {1224--1228}, year = {2015}, url = {https://doi.org/10.1109/LSP.2015.2392123}, doi = {10.1109/LSP.2015.2392123}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/spl/OnizawaKMGH15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/JarollahiGOG15, author = {Hooman Jarollahi and Vincent Gripon and Naoya Onizawa and Warren J. Gross}, title = {Algorithm and Architecture for a Low-Power Content-Addressable Memory Based on Sparse Clustered Networks}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {23}, number = {4}, pages = {642--653}, year = {2015}, url = {https://doi.org/10.1109/TVLSI.2014.2316733}, doi = {10.1109/TVLSI.2014.2316733}, timestamp = {Wed, 11 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/JarollahiGOG15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/HanyuSOMNM15, author = {Takahiro Hanyu and Daisuke Suzuki and Naoya Onizawa and Shoun Matsunaga and Masanori Natsui and Akira Mochizuki}, editor = {Wolfgang Nebel and David Atienza}, title = {Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable {VLSI} computing paradigm}, booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March 9-13, 2015}, pages = {1006--1011}, publisher = {{ACM}}, year = {2015}, url = {http://dl.acm.org/citation.cfm?id=2757048}, timestamp = {Mon, 09 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/HanyuSOMNM15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icdsp/OnizawaKMGH15, author = {Naoya Onizawa and Daisaku Katagiri and Kazumichi Matsumiya and Warren J. Gross and Takahiro Hanyu}, title = {Frequency-flexible stochastic Gabor filter}, booktitle = {2015 {IEEE} International Conference on Digital Signal Processing, {DSP} 2015, Singapore, July 21-24, 2015}, pages = {458--462}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/ICDSP.2015.7251914}, doi = {10.1109/ICDSP.2015.7251914}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/icdsp/OnizawaKMGH15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/KatagiriOH15, author = {Daisaku Katagiri and Naoya Onizawa and Takahiro Hanyu}, title = {Early-Stage Operation-Skipping Scheme for Low-Power Stochastic Image Processors}, booktitle = {2015 {IEEE} International Symposium on Multiple-Valued Logic, Waterloo, ON, Canada, May 18-20, 2015}, pages = {109--114}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/ISMVL.2015.28}, doi = {10.1109/ISMVL.2015.28}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/KatagiriOH15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mwscas/OnizawaKH15, author = {Naoya Onizawa and Shunsuke Koshita and Takahiro Hanyu}, title = {Scaled {IIR} filter based on stochastic computation}, booktitle = {{IEEE} 58th International Midwest Symposium on Circuits and Systems, {MWSCAS} 2015, Fort Collins, CO, USA, August 2-5, 2015}, pages = {1--4}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/MWSCAS.2015.7282118}, doi = {10.1109/MWSCAS.2015.7282118}, timestamp = {Mon, 09 Aug 2021 14:54:01 +0200}, biburl = {https://dblp.org/rec/conf/mwscas/OnizawaKH15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/nanoarch/OnizawaMTH15, author = {Naoya Onizawa and Akira Mochizuki and Akira Tamakoshi and Takahiro Hanyu}, title = {A sudden power-outage resilient nonvolatile microprocessor for immediate system recovery}, booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015}, pages = {39--44}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/NANOARCH.2015.7180584}, doi = {10.1109/NANOARCH.2015.7180584}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/nanoarch/OnizawaMTH15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/newcas/OosawaKOH15, author = {Satoshi Oosawa and Takayuki Konishi and Naoya Onizawa and Takahiro Hanyu}, title = {Design of an {STT-MTJ} based true random number generator using digitally controlled probability-locked loop}, booktitle = {{IEEE} 13th International New Circuits and Systems Conference, {NEWCAS} 2015, Grenoble, France, June 7-10, 2015}, pages = {1--4}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/NEWCAS.2015.7182089}, doi = {10.1109/NEWCAS.2015.7182089}, timestamp = {Wed, 16 Oct 2019 14:14:54 +0200}, biburl = {https://dblp.org/rec/conf/newcas/OosawaKOH15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sips/BogaOLMHG15, author = {Kaushik Boga and Naoya Onizawa and Fran{\c{c}}ois Leduc{-}Primeau and Kazumichi Matsumiya and Takahiro Hanyu and Warren J. Gross}, title = {Stochastic implementation of the disparity energy model for depth perception}, booktitle = {2015 {IEEE} Workshop on Signal Processing Systems, SiPS 2015, Hangzhou, China, October 14-16, 2015}, pages = {1--6}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/SiPS.2015.7344982}, doi = {10.1109/SIPS.2015.7344982}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/sips/BogaOLMHG15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/ArdakaniLOHG15, author = {Arash Ardakani and Fran{\c{c}}ois Leduc{-}Primeau and Naoya Onizawa and Takahiro Hanyu and Warren J. Gross}, title = {{VLSI} Implementation of Deep Neural Network Using Integral Stochastic Computing}, journal = {CoRR}, volume = {abs/1509.08972}, year = {2015}, url = {http://arxiv.org/abs/1509.08972}, eprinttype = {arXiv}, eprint = {1509.08972}, timestamp = {Mon, 13 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/ArdakaniLOHG15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/esticas/JarollahiOGSSEOHG14, author = {Hooman Jarollahi and Naoya Onizawa and Vincent Gripon and Noboru Sakimura and Tadahiko Sugibayashi and Tetsuo Endoh and Hideo Ohno and Takahiro Hanyu and Warren J. Gross}, title = {A Nonvolatile Associative Memory-Based Context-Driven Search Engine Using 90 nm CMOS/MTJ-Hybrid Logic-in-Memory Architecture}, journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.}, volume = {4}, number = {4}, pages = {460--474}, year = {2014}, url = {https://doi.org/10.1109/JETCAS.2014.2361061}, doi = {10.1109/JETCAS.2014.2361061}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/esticas/JarollahiOGSSEOHG14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieiceee/OnizawaH14, author = {Naoya Onizawa and Takahiro Hanyu}, title = {Soft-error tolerant transistor/magnetic-tunnel-junction hybrid non-volatile C-element}, journal = {{IEICE} Electron. Express}, volume = {11}, number = {24}, pages = {20141017}, year = {2014}, url = {https://doi.org/10.1587/elex.11.20141017}, doi = {10.1587/ELEX.11.20141017}, timestamp = {Fri, 12 Feb 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ieiceee/OnizawaH14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/OnizawaMSIYH14, author = {Naoya Onizawa and Akira Mochizuki and Hirokatsu Shirahama and Masashi Imai and Tomohiro Yoneda and Takahiro Hanyu}, title = {High-Throughput Partially Parallel Inter-Chip Link Architecture for Asynchronous Multi-Chip NoCs}, journal = {{IEICE} Trans. Inf. Syst.}, volume = {97-D}, number = {6}, pages = {1546--1556}, year = {2014}, url = {https://doi.org/10.1587/transinf.E97.D.1546}, doi = {10.1587/TRANSINF.E97.D.1546}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/OnizawaMSIYH14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/OnizawaGHG14, author = {Naoya Onizawa and Warren J. Gross and Takahiro Hanyu and Vincent C. Gaudet}, title = {Asynchronous Stochastic Decoding of {LDPC} Codes: Algorithm and Simulation Model}, journal = {{IEICE} Trans. Inf. Syst.}, volume = {97-D}, number = {9}, pages = {2286--2295}, year = {2014}, url = {https://doi.org/10.1587/transinf.2013LOP0010}, doi = {10.1587/TRANSINF.2013LOP0010}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ieicet/OnizawaGHG14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/OnizawaMFH14, author = {Naoya Onizawa and Atsushi Matsumoto and Tomoyoshi Funazaki and Takahiro Hanyu}, title = {High-Throughput Compact Delay-Insensitive Asynchronous NoC Router}, journal = {{IEEE} Trans. Computers}, volume = {63}, number = {3}, pages = {637--649}, year = {2014}, url = {https://doi.org/10.1109/TC.2013.81}, doi = {10.1109/TC.2013.81}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tc/OnizawaMFH14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcas/OnizawaMGGH14, author = {Naoya Onizawa and Shoun Matsunaga and Vincent C. Gaudet and Warren J. Gross and Takahiro Hanyu}, title = {High-Throughput Low-Energy Self-Timed {CAM} Based on Reordered Overlapped Search Mechanism}, journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.}, volume = {61-I}, number = {3}, pages = {865--876}, year = {2014}, url = {https://doi.org/10.1109/TCSI.2013.2283997}, doi = {10.1109/TCSI.2013.2283997}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tcas/OnizawaMGGH14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsisp/OnizawaGHG14, author = {Naoya Onizawa and Warren J. Gross and Takahiro Hanyu and Vincent C. Gaudet}, title = {Clockless Stochastic Decoding of Low-Density Parity-Check Codes: Architecture and Simulation Model}, journal = {J. Signal Process. Syst.}, volume = {76}, number = {2}, pages = {185--194}, year = {2014}, url = {https://doi.org/10.1007/s11265-013-0854-z}, doi = {10.1007/S11265-013-0854-Z}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsisp/OnizawaGHG14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsisp/JarollahiOGG14, author = {Hooman Jarollahi and Naoya Onizawa and Vincent Gripon and Warren J. Gross}, title = {Algorithm and Architecture of Fully-Parallel Associative Memories Based on Sparse Clustered Networks}, journal = {J. Signal Process. Syst.}, volume = {76}, number = {3}, pages = {235--247}, year = {2014}, url = {https://doi.org/10.1007/s11265-014-0886-z}, doi = {10.1007/S11265-014-0886-Z}, timestamp = {Thu, 12 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsisp/JarollahiOGG14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/apccas/MochizukiSOH14, author = {Akira Mochizuki and Hirokatsu Shirahama and Naoya Onizawa and Takahiro Hanyu}, title = {Highly reliable single-ended current-mode circuit for an inter-chip asynchronous communication link}, booktitle = {2014 {IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2014, Ishigaki, Japan, November 17-20, 2014}, pages = {683--686}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/APCCAS.2014.7032873}, doi = {10.1109/APCCAS.2014.7032873}, timestamp = {Wed, 16 Oct 2019 14:14:50 +0200}, biburl = {https://dblp.org/rec/conf/apccas/MochizukiSOH14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/async/OnizawaMH14, author = {Naoya Onizawa and Shoun Matsunaga and Takahiro Hanyu}, title = {A Compact Soft-Error Tolerant Asynchronous {TCAM} Based on a Transistor/Magnetic-Tunnel-Junction Hybrid Dual-Rail Word Structure}, booktitle = {20th {IEEE} International Symposium on Asynchronous Circuits and Systems, {ASYNC} 2014, Potsdam, Germany, May 12-14, 2014}, pages = {1--8}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ASYNC.2014.9}, doi = {10.1109/ASYNC.2014.9}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/async/OnizawaMH14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/JarollahiOHG14, author = {Hooman Jarollahi and Naoya Onizawa and Takahiro Hanyu and Warren J. Gross}, title = {Associative Memories Based on Multiple-Valued Sparse Clustered Networks}, booktitle = {{IEEE} 44th International Symposium on Multiple-Valued Logic, {ISMVL} 2014, Bremen, Germany, May 19-21, 2014}, pages = {208--213}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ISMVL.2014.44}, doi = {10.1109/ISMVL.2014.44}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/JarollahiOHG14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/OnizawaMSNSH14, author = {Naoya Onizawa and Shoun Matsunaga and Noboru Sakimura and Ryusuke Nebashi and Tadahiko Sugibayashi and Takahiro Hanyu}, title = {Soft-Delay-Error Evaluation in Content-Addressable Memory}, booktitle = {{IEEE} 44th International Symposium on Multiple-Valued Logic, {ISMVL} 2014, Bremen, Germany, May 19-21, 2014}, pages = {220--225}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ISMVL.2014.46}, doi = {10.1109/ISMVL.2014.46}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/OnizawaMSNSH14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/nanoarch/OnizawaKGH14, author = {Naoya Onizawa and Daisaku Katagiri and Warren J. Gross and Takahiro Hanyu}, editor = {Jacques{-}Olivier Klein and Csaba Andras Moritz and Sorin Cotofana}, title = {Analog-to-stochastic converter using magnetic-tunnel junction devices}, booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH} 2014, Paris, France, July 8-10, 2014}, pages = {59--64}, publisher = {{IEEE} Computer Society/ACM}, year = {2014}, url = {https://doi.org/10.1109/NANOARCH.2014.6880490}, doi = {10.1109/NANOARCH.2014.6880490}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/nanoarch/OnizawaKGH14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/newcas/OnizawaMH14, author = {Naoya Onizawa and Shoun Matsunaga and Takahiro Hanyu}, title = {Design of a soft-error tolerant 9-transistor/6-magnetic-tunnel-junction hybrid cell based nonvolatile {TCAM}}, booktitle = {{IEEE} 12th International New Circuits and Systems Conference, {NEWCAS} 2014, Trois-Rivieres, QC, Canada, June 22-25, 2014}, pages = {193--196}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/NEWCAS.2014.6934016}, doi = {10.1109/NEWCAS.2014.6934016}, timestamp = {Wed, 16 Oct 2019 14:14:54 +0200}, biburl = {https://dblp.org/rec/conf/newcas/OnizawaMH14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sips/JarollahiOGHG14, author = {Hooman Jarollahi and Naoya Onizawa and Vincent Gripon and Takahiro Hanyu and Warren J. Gross}, title = {Algorithm and architecture for a multiple-field context-driven search engine using fully-parallel clustered associative memories}, booktitle = {2014 {IEEE} Workshop on Signal Processing Systems, SiPS 2014, Belfast, United Kingdom, October 20-22, 2014}, pages = {133--138}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/SiPS.2014.6986075}, doi = {10.1109/SIPS.2014.6986075}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/sips/JarollahiOGHG14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/JarollahiOHG14, author = {Hooman Jarollahi and Naoya Onizawa and Takahiro Hanyu and Warren J. Gross}, title = {Associative Memories Based on Multiple-Valued Sparse Clustered Networks}, journal = {CoRR}, volume = {abs/1402.0808}, year = {2014}, url = {http://arxiv.org/abs/1402.0808}, eprinttype = {arXiv}, eprint = {1402.0808}, timestamp = {Mon, 13 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/JarollahiOHG14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieiceee/OnizawaMGGH13, author = {Naoya Onizawa and Shoun Matsunaga and Vincent C. Gaudet and Warren J. Gross and Takahiro Hanyu}, title = {High-throughput {CAM} based on a synchronous overlapped search scheme}, journal = {{IEICE} Electron. Express}, volume = {10}, number = {7}, pages = {20130148}, year = {2013}, url = {https://doi.org/10.1587/elex.10.20130148}, doi = {10.1587/ELEX.10.20130148}, timestamp = {Fri, 12 Feb 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ieiceee/OnizawaMGGH13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/OnizawaMH13, author = {Naoya Onizawa and Atsushi Matsumoto and Takahiro Hanyu}, title = {Open-Fault Resilient Multiple-Valued Codes for Reliable Asynchronous Global Communication Links}, journal = {{IEICE} Trans. Inf. Syst.}, volume = {96-D}, number = {9}, pages = {1952--1961}, year = {2013}, url = {https://doi.org/10.1587/transinf.E96.D.1952}, doi = {10.1587/TRANSINF.E96.D.1952}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/OnizawaMH13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/asap/JarollahiGOG13, author = {Hooman Jarollahi and Vincent Gripon and Naoya Onizawa and Warren J. Gross}, title = {A low-power Content-Addressable Memory based on clustered-sparse networks}, booktitle = {24th International Conference on Application-Specific Systems, Architectures and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013}, pages = {305--308}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/ASAP.2013.6567594}, doi = {10.1109/ASAP.2013.6567594}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/asap/JarollahiGOG13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/async/OnizawaGH13, author = {Naoya Onizawa and Warren J. Gross and Takahiro Hanyu}, title = {A Low-Energy Variation-Tolerant Asynchronous {TCAM} for Network Intrusion Detection Systems}, booktitle = {19th {IEEE} International Symposium on Asynchronous Circuits and Systems, {ASYNC} 2013, Santa Monica, CA, USA, May 19-22, 2013}, pages = {8--15}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/ASYNC.2013.16}, doi = {10.1109/ASYNC.2013.16}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/async/OnizawaGH13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/OnizawaG13, author = {Naoya Onizawa and Warren J. Gross}, title = {Low-power area-efficient large-scale {IP} lookup engine based on binary-weighted clustered networks}, booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin, TX, USA, May 29 - June 07, 2013}, pages = {55:1--55:6}, publisher = {{ACM}}, year = {2013}, url = {https://doi.org/10.1145/2463209.2488801}, doi = {10.1145/2463209.2488801}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/OnizawaG13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/globalsip/JarollahiOG13, author = {Hooman Jarollahi and Naoya Onizawa and Warren J. Gross}, title = {Selective decoding in associative memories based on Sparse-Clustered Networks}, booktitle = {{IEEE} Global Conference on Signal and Information Processing, GlobalSIP 2013, Austin, TX, USA, December 3-5, 2013}, pages = {1270--1273}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/GlobalSIP.2013.6737140}, doi = {10.1109/GLOBALSIP.2013.6737140}, timestamp = {Wed, 16 Oct 2019 14:14:51 +0200}, biburl = {https://dblp.org/rec/conf/globalsip/JarollahiOG13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icassp/JarollahiOGG13, author = {Hooman Jarollahi and Naoya Onizawa and Vincent Gripon and Warren J. Gross}, title = {Reduced-complexity binary-weight-coded associative memories}, booktitle = {{IEEE} International Conference on Acoustics, Speech and Signal Processing, {ICASSP} 2013, Vancouver, BC, Canada, May 26-31, 2013}, pages = {2523--2527}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/ICASSP.2013.6638110}, doi = {10.1109/ICASSP.2013.6638110}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/icassp/JarollahiOGG13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/OnizawaGHG13, author = {Naoya Onizawa and Warren J. Gross and Takahiro Hanyu and Vincent C. Gaudet}, title = {Lowering Error Floors in Stochastic Decoding of {LDPC} Codes Based on Wire-Delay Dependent Asynchronous Updating}, booktitle = {43rd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL} 2013, Toyama, Japan, May 22-24, 2013}, pages = {254--259}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/ISMVL.2013.35}, doi = {10.1109/ISMVL.2013.35}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/OnizawaGHG13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-1302-4463, author = {Hooman Jarollahi and Vincent Gripon and Naoya Onizawa and Warren J. Gross}, title = {A Low-Power Content-Addressable-Memory Based on Clustered-Sparse-Networks}, journal = {CoRR}, volume = {abs/1302.4463}, year = {2013}, url = {http://arxiv.org/abs/1302.4463}, eprinttype = {arXiv}, eprint = {1302.4463}, timestamp = {Mon, 13 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-1302-4463.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/JarollahiOG13, author = {Hooman Jarollahi and Naoya Onizawa and Warren J. Gross}, title = {Selective Decoding in Associative Memories Based on Sparse-Clustered Networks}, journal = {CoRR}, volume = {abs/1308.6021}, year = {2013}, url = {http://arxiv.org/abs/1308.6021}, eprinttype = {arXiv}, eprint = {1308.6021}, timestamp = {Mon, 13 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/JarollahiOG13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/OnizawaMH12, author = {Naoya Onizawa and Atsushi Matsumoto and Takahiro Hanyu}, title = {Long-Range Asynchronous On-Chip Link Based on Multiple-Valued Single-Track Signaling}, journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.}, volume = {95-A}, number = {6}, pages = {1018--1029}, year = {2012}, url = {https://doi.org/10.1587/transfun.E95.A.1018}, doi = {10.1587/TRANSFUN.E95.A.1018}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/OnizawaMH12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/async/OnizawaMGH12, author = {Naoya Onizawa and Shoun Matsunaga and Vincent C. Gaudet and Takahiro Hanyu}, editor = {Jens Spars{\o} and Montek Singh and Pascal Vivet}, title = {High-Throughput Low-Energy Content-Addressable Memory Based on Self-Timed Overlapped Search Mechanism}, booktitle = {18th {IEEE} International Symposium on Asynchronous Circuits and Systems, {ASYNC} 2012, Kgs. Lyngby, Denmark, May 7-9, 2012}, pages = {41--48}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/ASYNC.2012.25}, doi = {10.1109/ASYNC.2012.25}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/async/OnizawaMGH12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/JarollahiOGG12, author = {Hooman Jarollahi and Naoya Onizawa and Vincent Gripon and Warren J. Gross}, title = {Architecture and implementation of an associative memory using sparse clustered networks}, booktitle = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS} 2012, Seoul, Korea (South), May 20-23, 2012}, pages = {2901--2904}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/ISCAS.2012.6271922}, doi = {10.1109/ISCAS.2012.6271922}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/JarollahiOGG12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/MatsumotoOH12, author = {Atsushi Matsumoto and Naoya Onizawa and Takahiro Hanyu}, editor = {D. Michael Miller and Vincent C. Gaudet}, title = {Systematic Coding Schemes for Low-Power Multiple-Valued Current-Mode Asynchronous Communication Links}, booktitle = {42nd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL} 2012, Victoria, BC, Canada, May 14-16, 2012}, pages = {13--18}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/ISMVL.2012.51}, doi = {10.1109/ISMVL.2012.51}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/MatsumotoOH12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/OnizawaGHG12, author = {Naoya Onizawa and Vincent C. Gaudet and Takahiro Hanyu and Warren J. Gross}, editor = {D. Michael Miller and Vincent C. Gaudet}, title = {Asynchronous Stochastic Decoding of Low-Density Parity-Check Codes}, booktitle = {42nd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL} 2012, Victoria, BC, Canada, May 14-16, 2012}, pages = {92--97}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/ISMVL.2012.35}, doi = {10.1109/ISMVL.2012.35}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/OnizawaGHG12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/prdc/YonedaIOMH12, author = {Tomohiro Yoneda and Masashi Imai and Naoya Onizawa and Atsushi Matsumoto and Takahiro Hanyu}, title = {Multi-chip NoCs for Automotive Applications}, booktitle = {{IEEE} 18th Pacific Rim International Symposium on Dependable Computing, {PRDC} 2012, Niigata, Japan, November 18-19, 2012}, pages = {105--110}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/PRDC.2012.20}, doi = {10.1109/PRDC.2012.20}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/prdc/YonedaIOMH12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sips/OnizawaGHG12, author = {Naoya Onizawa and Warren J. Gross and Takahiro Hanyu and Vincent C. Gaudet}, title = {Clockless Stochastic Decoding of Low-Density Parity-Check Codes}, booktitle = {2012 {IEEE} Workshop on Signal Processing Systems, Quebec City, QC, Canada, October 17-19, 2012}, pages = {143--148}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/SiPS.2012.53}, doi = {10.1109/SIPS.2012.53}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/sips/OnizawaGHG12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcas/OnizawaGH11, author = {Naoya Onizawa and Vincent C. Gaudet and Takahiro Hanyu}, title = {Low-Energy Asynchronous Interleaver for Clockless Fully Parallel {LDPC} Decoding}, journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.}, volume = {58-I}, number = {8}, pages = {1933--1943}, year = {2011}, url = {https://doi.org/10.1109/TCSI.2011.2107271}, doi = {10.1109/TCSI.2011.2107271}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tcas/OnizawaGH11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/OnizawaMH11, author = {Naoya Onizawa and Atsushi Matsumoto and Takahiro Hanyu}, title = {Interconnect-fault-resilient delay-insensitive asynchronous communication link based on current-flow monitoring}, booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France, March 14-18, 2011}, pages = {776--781}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/DATE.2011.5763132}, doi = {10.1109/DATE.2011.5763132}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/OnizawaMH11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/KawanoOMH11, author = {Takao Kawano and Naoya Onizawa and Atsushi Matsumoto and Takahiro Hanyu}, title = {Adjacent-State monitoring based fine-grained power-gating scheme for a low-power asynchronous pipelined system}, booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May 15-19 2011, Rio de Janeiro, Brazil}, pages = {2067--2070}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/ISCAS.2011.5938004}, doi = {10.1109/ISCAS.2011.5938004}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/KawanoOMH11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/MatsumotoOH11, author = {Atsushi Matsumoto and Naoya Onizawa and Takahiro Hanyu}, editor = {Jaakko Astola and Radomir S. Stankovic}, title = {Complementary Multiple-Valued Encoding Scheme for Interconnect-Fault-Resilient Bidirectional Asynchronous Links}, booktitle = {41st {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL} 2011, Tuusula, Finland, May 23-25, 2011}, pages = {236--241}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/ISMVL.2011.30}, doi = {10.1109/ISMVL.2011.30}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/MatsumotoOH11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/OnizawaH10, author = {Naoya Onizawa and Takahiro Hanyu}, title = {Highly Reliable Multiple-Valued One-Phase Signalling for an Asynchronous On-Chip Communication Link}, journal = {{IEICE} Trans. Inf. Syst.}, volume = {93-D}, number = {8}, pages = {2089--2099}, year = {2010}, url = {https://doi.org/10.1587/transinf.E93.D.2089}, doi = {10.1587/TRANSINF.E93.D.2089}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/OnizawaH10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/OnizawaHG10, author = {Naoya Onizawa and Takahiro Hanyu and Vincent C. Gaudet}, title = {Design of High-Throughput Fully Parallel {LDPC} Decoders Based on Wire Partitioning}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {18}, number = {3}, pages = {482--489}, year = {2010}, url = {https://doi.org/10.1109/TVLSI.2008.2011360}, doi = {10.1109/TVLSI.2008.2011360}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/OnizawaHG10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/OnizawaH10, author = {Naoya Onizawa and Takahiro Hanyu}, title = {High-throughput protocol converter based on an independent encoding/decoding scheme for asynchronous Network-on-Chip}, booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2010), May 30 - June 2, 2010, Paris, France}, pages = {157--160}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/ISCAS.2010.5538027}, doi = {10.1109/ISCAS.2010.5538027}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/OnizawaH10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/MatsumotoOH10, author = {Atsushi Matsumoto and Naoya Onizawa and Takahiro Hanyu}, title = {One-Color Two-Phase Asynchronous Communication Links Based on Multiple-Valued Simultaneous Control}, booktitle = {40th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL} 2010, Barcelona, Spain, 26-28 May 2010}, pages = {211--216}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/ISMVL.2010.47}, doi = {10.1109/ISMVL.2010.47}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/MatsumotoOH10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/OnizawaFMH10a, author = {Naoya Onizawa and Tomoyoshi Funazaki and Atsushi Matsumoto and Takahiro Hanyu}, editor = {Nikolaos S. Voros and Amar Mukherjee and Nicolas Sklavos and Konstantinos Masselos and Michael H{\"{u}}bner}, title = {Accurate Asynchronous Network-on-Chip Simulation Based on a Delay-Aware Model}, booktitle = {{VLSI} 2010 Annual Symposium - Selected papers}, series = {Lecture Notes in Electrical Engineering}, volume = {105}, pages = {17--30}, publisher = {Springer}, year = {2010}, url = {https://doi.org/10.1007/978-94-007-1488-5\_2}, doi = {10.1007/978-94-007-1488-5\_2}, timestamp = {Thu, 20 Jan 2022 09:49:09 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/OnizawaFMH10a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/OnizawaFMH10, author = {Naoya Onizawa and Tomoyoshi Funazaki and Atsushi Matsumoto and Takahiro Hanyu}, title = {Accurate Asynchronous Network-on-Chip Simulation Based on a Delay-Aware Model}, booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2010, 5-7 July 2010, Lixouri Kefalonia, Greece}, pages = {357--362}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/ISVLSI.2010.45}, doi = {10.1109/ISVLSI.2010.45}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/OnizawaFMH10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/OnizawaHG09, author = {Naoya Onizawa and Takahiro Hanyu and Vincent C. Gaudet}, title = {High-Throughput Bit-Serial {LDPC} Decoder {LSI} Based on Multiple-Valued Asynchronous Interleaving}, journal = {{IEICE} Trans. Electron.}, volume = {92-C}, number = {6}, pages = {867--874}, year = {2009}, url = {https://doi.org/10.1587/transele.E92.C.867}, doi = {10.1587/TRANSELE.E92.C.867}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ieicet/OnizawaHG09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/OhtakeOH09, author = {Yo Ohtake and Naoya Onizawa and Takahiro Hanyu}, title = {High-performance Asynchronous Intra-chip Communication Link based on a Multiple-valued Current-mode Single-track Scheme}, booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17 May 2009, Taipei, Taiwan}, pages = {1000--1003}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/ISCAS.2009.5117927}, doi = {10.1109/ISCAS.2009.5117927}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/OhtakeOH09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/OnizawaH09, author = {Naoya Onizawa and Takahiro Hanyu}, title = {Robust Multiple-Valued Current-Mode Circuit Components Based on Adaptive Reference-Voltage Control}, booktitle = {{ISMVL} 2009, 39th International Symposium on Multiple-Valued Logic, 21-23 May 2009, Naha, Okinawaw, Japan}, pages = {36--41}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/ISMVL.2009.44}, doi = {10.1109/ISMVL.2009.44}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/OnizawaH09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/MizusawaOH08, author = {Kazuyasu Mizusawa and Naoya Onizawa and Takahiro Hanyu}, title = {Power-Aware Asynchronous Peer-to-Peer Duplex Communication System Based on Multiple-Valued One-Phase Signaling}, journal = {{IEICE} Trans. Electron.}, volume = {91-C}, number = {4}, pages = {581--588}, year = {2008}, url = {https://doi.org/10.1093/ietele/e91-c.4.581}, doi = {10.1093/IETELE/E91-C.4.581}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/MizusawaOH08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/NagaiOH08, author = {Tasuku Nagai and Naoya Onizawa and Takahiro Hanyu}, title = {High-Speed Timing Verification Scheme Using Delay Tables for a Large-Scaled Multiple-Valued Current-Mode Circuit}, booktitle = {38th {IEEE} International Symposium on Multiple-Valued Logic {(ISMVL} 2008), 22-23 May 2008, Dallas, Texas, {USA}}, pages = {70--75}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/ISMVL.2008.12}, doi = {10.1109/ISMVL.2008.12}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/NagaiOH08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/OnizawaH06, author = {Naoya Onizawa and Takahiro Hanyu}, title = {Design and Evaluation of a NULL-Convention Circuit Based on Dual-Rail Current-Mode Differential Logic}, journal = {{IEICE} Trans. Electron.}, volume = {89-C}, number = {11}, pages = {1575--1580}, year = {2006}, url = {https://doi.org/10.1093/ietele/e89-c.11.1575}, doi = {10.1093/IETELE/E89-C.11.1575}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/OnizawaH06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/OnizawaMH05, author = {Naoya Onizawa and Akira Mochizuki and Takahiro Hanyu}, title = {Multiple-Valued Duplex Asynchronous Data Transfer Scheme for Interleaving in {LDPC} Decoders}, booktitle = {35th {IEEE} International Symposium on Multiple-Valued Logic {(ISMVL} 2005), 18-21 May 2005, Calgary, Canada}, pages = {138--143}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/ISMVL.2005.29}, doi = {10.1109/ISMVL.2005.29}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/OnizawaMH05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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