BibTeX records: Tony Nowatzki

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@inproceedings{DBLP:conf/IEEEpact/NowatzkiASW18,
  author    = {Tony Nowatzki and
               Newsha Ardalani and
               Karthikeyan Sankaralingam and
               Jian Weng},
  title     = {Hybrid optimization/heuristic instruction scheduling for programmable
               accelerator codesign},
  booktitle = {Proceedings of the 27th International Conference on Parallel Architectures
               and Compilation Techniques, {PACT} 2018, Limassol, Cyprus, November
               01-04, 2018},
  pages     = {36:1--36:15},
  year      = {2018},
  crossref  = {DBLP:conf/IEEEpact/2018},
  url       = {https://doi.org/10.1145/3243176.3243212},
  doi       = {10.1145/3243176.3243212},
  timestamp = {Wed, 21 Nov 2018 12:44:10 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/NowatzkiASW18},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/GuptaNGS17,
  author    = {Gagan Gupta and
               Tony Nowatzki and
               Vinay Gangadhar and
               Karthikeyan Sankaralingam},
  title     = {Kickstarting Semiconductor Innovation with Open Source Hardware},
  journal   = {{IEEE} Computer},
  volume    = {50},
  number    = {6},
  pages     = {50--59},
  year      = {2017},
  url       = {https://doi.org/10.1109/MC.2017.162},
  doi       = {10.1109/MC.2017.162},
  timestamp = {Thu, 29 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/computer/GuptaNGS17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/NowatzkiGSW17,
  author    = {Tony Nowatzki and
               Vinay Gangadhar and
               Karthikeyan Sankaralingam and
               Greg Wright},
  title     = {Domain Specialization Is Generally Unnecessary for Accelerators},
  journal   = {{IEEE} Micro},
  volume    = {37},
  number    = {3},
  pages     = {40--50},
  year      = {2017},
  url       = {https://doi.org/10.1109/MM.2017.60},
  doi       = {10.1109/MM.2017.60},
  timestamp = {Thu, 29 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/NowatzkiGSW17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/NowatzkiGAS17,
  author    = {Tony Nowatzki and
               Vinay Gangadhar and
               Newsha Ardalani and
               Karthikeyan Sankaralingam},
  title     = {Stream-Dataflow Acceleration},
  booktitle = {Proceedings of the 44th Annual International Symposium on Computer
               Architecture, {ISCA} 2017, Toronto, ON, Canada, June 24-28, 2017},
  pages     = {416--429},
  year      = {2017},
  crossref  = {DBLP:conf/isca/2017},
  url       = {https://doi.org/10.1145/3079856.3080255},
  doi       = {10.1145/3079856.3080255},
  timestamp = {Tue, 06 Nov 2018 11:07:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/isca/NowatzkiGAS17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/NowatzkiGS16,
  author    = {Tony Nowatzki and
               Vinay Gangadhar and
               Karthikeyan Sankaralingam},
  title     = {A Heterogeneous Von Neumann/Explicit Dataflow Processor},
  journal   = {{IEEE} Micro},
  volume    = {36},
  number    = {3},
  pages     = {20--30},
  year      = {2016},
  url       = {https://doi.org/10.1109/MM.2016.34},
  doi       = {10.1109/MM.2016.34},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/NowatzkiGS16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/NowatzkiS16,
  author    = {Tony Nowatzki and
               Karthikeyan Sankaralingam},
  title     = {Analyzing Behavior Specialized Acceleration},
  booktitle = {Proceedings of the Twenty-First International Conference on Architectural
               Support for Programming Languages and Operating Systems, {ASPLOS}
               '16, Atlanta, GA, USA, April 2-6, 2016},
  pages     = {697--711},
  year      = {2016},
  crossref  = {DBLP:conf/asplos/2016},
  url       = {https://doi.org/10.1145/2872362.2872412},
  doi       = {10.1145/2872362.2872412},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/asplos/NowatzkiS16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/NowatzkiS16,
  author    = {Tony Nowatzki and
               Karthikeyan Sankaralingam},
  title     = {Modularizing the microprocessor core to outperform traditional out-of-order},
  booktitle = {2016 {IEEE} Hot Chips 28 Symposium (HCS), Cupertino, CA, USA, August
               21-23, 2016},
  pages     = {1--4},
  year      = {2016},
  crossref  = {DBLP:conf/hotchips/2016},
  url       = {https://doi.org/10.1109/HOTCHIPS.2016.7936230},
  doi       = {10.1109/HOTCHIPS.2016.7936230},
  timestamp = {Sun, 19 Nov 2017 16:27:39 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/hotchips/NowatzkiS16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/NowatzkiGSW16,
  author    = {Tony Nowatzki and
               Vinay Gangadhar and
               Karthikeyan Sankaralingam and
               Greg Wright},
  title     = {Pushing the limits of accelerator efficiency while retaining programmability},
  booktitle = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
  pages     = {27--39},
  year      = {2016},
  crossref  = {DBLP:conf/hpca/2016},
  url       = {https://doi.org/10.1109/HPCA.2016.7446051},
  doi       = {10.1109/HPCA.2016.7446051},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/NowatzkiGSW16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WatkinsNC16,
  author    = {Matthew A. Watkins and
               Tony Nowatzki and
               Anthony Carno},
  title     = {Software transparent dynamic binary translation for coarse-grain reconfigurable
               architectures},
  booktitle = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
  pages     = {138--150},
  year      = {2016},
  crossref  = {DBLP:conf/hpca/2016},
  url       = {https://doi.org/10.1109/HPCA.2016.7446060},
  doi       = {10.1109/HPCA.2016.7446060},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/WatkinsNC16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/GuptaNGS16,
  author    = {Gagan Gupta and
               Tony Nowatzki and
               Vinay Gangadhar and
               Karthikeyan Sankaralingam},
  title     = {Open-source Hardware: Opportunities and Challenges},
  journal   = {CoRR},
  volume    = {abs/1606.01980},
  year      = {2016},
  url       = {http://arxiv.org/abs/1606.01980},
  archivePrefix = {arXiv},
  eprint    = {1606.01980},
  timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/corr/GuptaNGS16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NowatzkiGS15,
  author    = {Tony Nowatzki and
               Venkatraman Govindaraju and
               Karthikeyan Sankaralingam},
  title     = {A Graph-Based Program Representation for Analyzing Hardware Specialization
               Approaches},
  journal   = {Computer Architecture Letters},
  volume    = {14},
  number    = {2},
  pages     = {94--98},
  year      = {2015},
  url       = {https://doi.org/10.1109/LCA.2015.2476801},
  doi       = {10.1109/LCA.2015.2476801},
  timestamp = {Sat, 27 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/cal/NowatzkiGS15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/NowatzkiMHS15,
  author    = {Tony Nowatzki and
               Jaikrishnan Menon and
               Chen{-}Han Ho and
               Karthikeyan Sankaralingam},
  title     = {Architectural Simulators Considered Harmful},
  journal   = {{IEEE} Micro},
  volume    = {35},
  number    = {6},
  pages     = {4--12},
  year      = {2015},
  url       = {https://doi.org/10.1109/MM.2015.74},
  doi       = {10.1109/MM.2015.74},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/NowatzkiMHS15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/YazdanbakhshBNS15,
  author    = {Amir Yazdanbakhsh and
               Raghuraman Balasubramanian and
               Tony Nowatzki and
               Karthikeyan Sankaralingam},
  title     = {Comprehensive Circuit Failure Prediction for Logic and {SRAM} Using
               Virtual Aging},
  journal   = {{IEEE} Micro},
  volume    = {35},
  number    = {6},
  pages     = {24--36},
  year      = {2015},
  url       = {https://doi.org/10.1109/MM.2015.136},
  doi       = {10.1109/MM.2015.136},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/YazdanbakhshBNS15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/NowatzkiGS15,
  author    = {Tony Nowatzki and
               Vinay Gangadhar and
               Karthikeyan Sankaralingam},
  title     = {Exploring the potential of heterogeneous von neumann/dataflow execution
               models},
  booktitle = {Proceedings of the 42nd Annual International Symposium on Computer
               Architecture, Portland, OR, USA, June 13-17, 2015},
  pages     = {298--310},
  year      = {2015},
  crossref  = {DBLP:conf/isca/2015},
  url       = {https://doi.org/10.1145/2749469.2750380},
  doi       = {10.1145/2749469.2750380},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/isca/NowatzkiGS15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/HoGNNMAFCS15,
  author    = {Chen{-}Han Ho and
               Venkatraman Govindaraju and
               Tony Nowatzki and
               Ranjini Nagaraju and
               Zachary Marzec and
               Preeti Agarwal and
               Chris Frericks and
               Ryan Cofell and
               Karthikeyan Sankaralingam},
  title     = {Performance evaluation of a DySER {FPGA} prototype system spanning
               the compiler, microarchitecture, and hardware implementation},
  booktitle = {2015 {IEEE} International Symposium on Performance Analysis of Systems
               and Software, {ISPASS} 2015, Philadelphia, PA, USA, March 29-31, 2015},
  pages     = {203--214},
  year      = {2015},
  crossref  = {DBLP:conf/ispass/2015},
  url       = {https://doi.org/10.1109/ISPASS.2015.7095806},
  doi       = {10.1109/ISPASS.2015.7095806},
  timestamp = {Tue, 23 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/HoGNNMAFCS15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/toplas/NowatzkiSCSER14,
  author    = {Tony Nowatzki and
               Michael Sartin{-}Tarm and
               Lorenzo De Carli and
               Karthikeyan Sankaralingam and
               Cristian Estan and
               Behnam Robatmili},
  title     = {A Scheduling Framework for Spatial Architectures Across Multiple Constraint-Solving
               Theories},
  journal   = {{ACM} Trans. Program. Lang. Syst.},
  volume    = {37},
  number    = {1},
  pages     = {2:1--2:30},
  year      = {2014},
  url       = {https://doi.org/10.1145/2658993},
  doi       = {10.1145/2658993},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/toplas/NowatzkiSCSER14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:series/synthesis/2013Sankaralingam,
  author    = {Tony Nowatzki and
               Michael C. Ferris and
               Karu Sankaralingam and
               Cristian Estan and
               Nilay Vaish and
               David A. Wood},
  title     = {Optimization and Mathematical Modeling in Computer Architecture},
  series    = {Synthesis Lectures on Computer Architecture},
  publisher = {Morgan {\&} Claypool Publishers},
  year      = {2013},
  url       = {https://doi.org/10.2200/S00531ED1V01Y201308CAC026},
  doi       = {10.2200/S00531ED1V01Y201308CAC026},
  isbn      = {9781627052092},
  timestamp = {Mon, 25 Mar 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/series/synthesis/2013Sankaralingam},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/Sartin-TarmNCSE13,
  author    = {Michael Sartin{-}Tarm and
               Tony Nowatzki and
               Lorenzo De Carli and
               Karthikeyan Sankaralingam and
               Cristian Estan},
  title     = {Constraint centric scheduling guide},
  journal   = {{SIGARCH} Computer Architecture News},
  volume    = {41},
  number    = {2},
  pages     = {17--21},
  year      = {2013},
  url       = {https://doi.org/10.1145/2490302.2490306},
  doi       = {10.1145/2490302.2490306},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/sigarch/Sartin-TarmNCSE13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/GovindarajuNS13,
  author    = {Venkatraman Govindaraju and
               Tony Nowatzki and
               Karthikeyan Sankaralingam},
  title     = {Breaking {SIMD} shackles with an exposed flexible microarchitecture
               and the access execute {PDG}},
  booktitle = {Proceedings of the 22nd International Conference on Parallel Architectures
               and Compilation Techniques, Edinburgh, United Kingdom, September 7-11,
               2013},
  pages     = {341--351},
  year      = {2013},
  crossref  = {DBLP:conf/IEEEpact/2013},
  url       = {https://doi.org/10.1109/PACT.2013.6618830},
  doi       = {10.1109/PACT.2013.6618830},
  timestamp = {Mon, 22 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/GovindarajuNS13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pldi/NowatzkiSCSER13,
  author    = {Tony Nowatzki and
               Michael Sartin{-}Tarm and
               Lorenzo De Carli and
               Karthikeyan Sankaralingam and
               Cristian Estan and
               Behnam Robatmili},
  title     = {A general constraint-centric scheduling framework for spatial architectures},
  booktitle = {{ACM} {SIGPLAN} Conference on Programming Language Design and Implementation,
               {PLDI} '13, Seattle, WA, USA, June 16-19, 2013},
  pages     = {495--506},
  year      = {2013},
  crossref  = {DBLP:conf/pldi/2013},
  url       = {https://doi.org/10.1145/2491956.2462163},
  doi       = {10.1145/2491956.2462163},
  timestamp = {Fri, 30 Nov 2018 12:21:40 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/pldi/NowatzkiSCSER13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/GovindarajuHNCSSK12,
  author    = {Venkatraman Govindaraju and
               Chen{-}Han Ho and
               Tony Nowatzki and
               Jatin Chhugani and
               Nadathur Satish and
               Karthikeyan Sankaralingam and
               Changkyu Kim},
  title     = {DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient
               Computing},
  journal   = {{IEEE} Micro},
  volume    = {32},
  number    = {5},
  pages     = {38--51},
  year      = {2012},
  url       = {https://doi.org/10.1109/MM.2012.51},
  doi       = {10.1109/MM.2012.51},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/GovindarajuHNCSSK12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/BensonCFHGNS12,
  author    = {Jesse Benson and
               Ryan Cofell and
               Chris Frericks and
               Chen{-}Han Ho and
               Venkatraman Govindaraju and
               Tony Nowatzki and
               Karthikeyan Sankaralingam},
  title     = {Design, integration and implementation of the DySER hardware accelerator
               into OpenSPARC},
  booktitle = {18th {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2012, New Orleans, LA, USA, 25-29 February, 2012},
  pages     = {115--126},
  year      = {2012},
  crossref  = {DBLP:conf/hpca/2012},
  url       = {https://doi.org/10.1109/HPCA.2012.6168949},
  doi       = {10.1109/HPCA.2012.6168949},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/BensonCFHGNS12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2018,
  editor    = {Skevos Evripidou and
               Per Stenstr{\"{o}}m and
               Michael F. P. O'Boyle},
  title     = {Proceedings of the 27th International Conference on Parallel Architectures
               and Compilation Techniques, {PACT} 2018, Limassol, Cyprus, November
               01-04, 2018},
  publisher = {{ACM}},
  year      = {2018},
  url       = {https://doi.org/10.1145/3243176},
  doi       = {10.1145/3243176},
  timestamp = {Wed, 21 Nov 2018 12:44:10 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/2018},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2017,
  title     = {Proceedings of the 44th Annual International Symposium on Computer
               Architecture, {ISCA} 2017, Toronto, ON, Canada, June 24-28, 2017},
  publisher = {{ACM}},
  year      = {2017},
  url       = {https://doi.org/10.1145/3079856},
  doi       = {10.1145/3079856},
  isbn      = {978-1-4503-4892-8},
  timestamp = {Tue, 06 Nov 2018 11:07:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2017},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asplos/2016,
  editor    = {Tom Conte and
               Yuanyuan Zhou},
  title     = {Proceedings of the Twenty-First International Conference on Architectural
               Support for Programming Languages and Operating Systems, {ASPLOS}
               '16, Atlanta, GA, USA, April 2-6, 2016},
  publisher = {{ACM}},
  year      = {2016},
  url       = {http://dl.acm.org/citation.cfm?id=2872362},
  isbn      = {978-1-4503-4091-5},
  timestamp = {Thu, 31 Mar 2016 17:55:40 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/asplos/2016},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hotchips/2016,
  title     = {2016 {IEEE} Hot Chips 28 Symposium (HCS), Cupertino, CA, USA, August
               21-23, 2016},
  publisher = {{IEEE}},
  year      = {2016},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7932734},
  isbn      = {978-1-5090-6208-9},
  timestamp = {Sun, 19 Nov 2017 16:27:39 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/hotchips/2016},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2016,
  title     = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
  publisher = {{IEEE} Computer Society},
  year      = {2016},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7440961},
  isbn      = {978-1-4673-9211-2},
  timestamp = {Fri, 08 Apr 2016 13:41:18 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2016},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2015,
  editor    = {Deborah T. Marr and
               David H. Albonesi},
  title     = {Proceedings of the 42nd Annual International Symposium on Computer
               Architecture, Portland, OR, USA, June 13-17, 2015},
  publisher = {{ACM}},
  year      = {2015},
  url       = {http://dl.acm.org/citation.cfm?id=2749469},
  isbn      = {978-1-4503-3402-0},
  timestamp = {Wed, 27 May 2015 08:30:30 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2015},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ispass/2015,
  title     = {2015 {IEEE} International Symposium on Performance Analysis of Systems
               and Software, {ISPASS} 2015, Philadelphia, PA, USA, March 29-31, 2015},
  publisher = {{IEEE} Computer Society},
  year      = {2015},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7093633},
  isbn      = {978-1-4799-1957-4},
  timestamp = {Tue, 05 May 2015 08:58:45 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/2015},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2013,
  editor    = {Christian Fensch and
               Michael F. P. O'Boyle and
               Andr{\'{e}} Seznec and
               Fran{\c{c}}ois Bodin},
  title     = {Proceedings of the 22nd International Conference on Parallel Architectures
               and Compilation Techniques, Edinburgh, United Kingdom, September 7-11,
               2013},
  publisher = {{IEEE} Computer Society},
  year      = {2013},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6603429},
  isbn      = {978-1-4799-1018-2},
  timestamp = {Tue, 02 Jun 2015 18:34:40 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/2013},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/pldi/2013,
  editor    = {Hans{-}Juergen Boehm and
               Cormac Flanagan},
  title     = {{ACM} {SIGPLAN} Conference on Programming Language Design and Implementation,
               {PLDI} '13, Seattle, WA, USA, June 16-19, 2013},
  publisher = {{ACM}},
  year      = {2013},
  url       = {https://doi.org/10.1145/2491956},
  doi       = {10.1145/2491956},
  isbn      = {978-1-4503-2014-6},
  timestamp = {Fri, 30 Nov 2018 12:21:40 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/pldi/2013},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2012,
  title     = {18th {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2012, New Orleans, LA, USA, 25-29 February, 2012},
  publisher = {{IEEE} Computer Society},
  year      = {2012},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6165554},
  isbn      = {978-1-4673-0827-4},
  timestamp = {Tue, 07 Oct 2014 17:26:19 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2012},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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