BibTeX records: Feiyin Lu

download as .bib file

@inproceedings{DBLP:conf/iscas/TanHLLC05,
  author       = {Yanzhuo Tan and
                  Yinhe Han and
                  Xiaowei Li and
                  Feiyin Lu and
                  Yuchuan Chen},
  title        = {Validation analysis and test flow optimization of {VLSI} chip},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {5666--5669},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1465923},
  doi          = {10.1109/ISCAS.2005.1465923},
  timestamp    = {Tue, 23 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TanHLLC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.