BibTeX records: Chao Li 0004

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Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
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@inproceedings{DBLP:conf/hpca/DaiLLZWZZ18,
  author       = {Hongwen Dai and
                  Zhen Lin and
                  Chao Li and
                  Chen Zhao and
                  Fei Wang and
                  Nanning Zheng and
                  Huiyang Zhou},
  title        = {Accelerate {GPU} Concurrent Kernel Execution by Mitigating Memory
                  Pipeline Stalls},
  booktitle    = {{IEEE} International Symposium on High Performance Computer Architecture,
                  {HPCA} 2018, Vienna, Austria, February 24-28, 2018},
  pages        = {208--220},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/HPCA.2018.00027},
  doi          = {10.1109/HPCA.2018.00027},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hpca/DaiLLZWZZ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/IEEEpact/DaiLLZWZZ17,
  author       = {Hongwen Dai and
                  Zhen Lin and
                  Chao Li and
                  Chen Zhao and
                  Fei Wang and
                  Nanning Zheng and
                  Huiyang Zhou},
  title        = {{POSTER:} Accelerate {GPU} Concurrent Kernel Execution by Mitigating
                  Memory Pipeline Stalls},
  booktitle    = {26th International Conference on Parallel Architectures and Compilation
                  Techniques, {PACT} 2017, Portland, OR, USA, September 9-13, 2017},
  pages        = {144--145},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/PACT.2017.30},
  doi          = {10.1109/PACT.2017.30},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/IEEEpact/DaiLLZWZZ17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/DaiLZGKM16,
  author       = {Hongwen Dai and
                  Chao Li and
                  Huiyang Zhou and
                  Saurabh Gupta and
                  Christos Kartsaklis and
                  Mike Mantor},
  title        = {A model-driven approach to warp/thread-block level {GPU} cache bypassing},
  booktitle    = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
                  2016, Austin, TX, USA, June 5-9, 2016},
  pages        = {94:1--94:6},
  publisher    = {{ACM}},
  year         = {2016},
  url          = {https://doi.org/10.1145/2897937.2897966},
  doi          = {10.1145/2897937.2897966},
  timestamp    = {Fri, 27 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/DaiLZGKM16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sc/LiYFCZ16,
  author       = {Chao Li and
                  Yi Yang and
                  Min Feng and
                  Srimat T. Chakradhar and
                  Huiyang Zhou},
  editor       = {John West and
                  Cherri M. Pancake},
  title        = {Optimizing memory efficiency for deep convolutional neural networks
                  on GPUs},
  booktitle    = {Proceedings of the International Conference for High Performance Computing,
                  Networking, Storage and Analysis, {SC} 2016, Salt Lake City, UT, USA,
                  November 13-18, 2016},
  pages        = {633--644},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/SC.2016.53},
  doi          = {10.1109/SC.2016.53},
  timestamp    = {Wed, 12 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/sc/LiYFCZ16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/LiYFCZ16,
  author       = {Chao Li and
                  Yi Yang and
                  Min Feng and
                  Srimat T. Chakradhar and
                  Huiyang Zhou},
  title        = {Optimizing Memory Efficiency for Deep Convolutional Neural Networks
                  on GPUs},
  journal      = {CoRR},
  volume       = {abs/1610.03618},
  year         = {2016},
  url          = {http://arxiv.org/abs/1610.03618},
  eprinttype    = {arXiv},
  eprint       = {1610.03618},
  timestamp    = {Wed, 12 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/LiYFCZ16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jcst/YangLZ15,
  author       = {Yi Yang and
                  Chao Li and
                  Huiyang Zhou},
  title        = {{CUDA-NP:} Realizing Nested Thread-Level Parallelism in {GPGPU} Applications},
  journal      = {J. Comput. Sci. Technol.},
  volume       = {30},
  number       = {1},
  pages        = {3--19},
  year         = {2015},
  url          = {https://doi.org/10.1007/s11390-015-1500-y},
  doi          = {10.1007/S11390-015-1500-Y},
  timestamp    = {Fri, 27 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jcst/YangLZ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cgo/LiYLZ15,
  author       = {Chao Li and
                  Yi Yang and
                  Zhen Lin and
                  Huiyang Zhou},
  editor       = {Kunle Olukotun and
                  Aaron Smith and
                  Robert Hundt and
                  Jason Mars},
  title        = {Automatic data placement into {GPU} on-chip memory resources},
  booktitle    = {Proceedings of the 13th Annual {IEEE/ACM} International Symposium
                  on Code Generation and Optimization, {CGO} 2015, San Francisco, CA,
                  USA, February 07 - 11, 2015},
  pages        = {23--33},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/CGO.2015.7054184},
  doi          = {10.1109/CGO.2015.7054184},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/cgo/LiYLZ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ics/LiSDSHZ15,
  author       = {Chao Li and
                  Shuaiwen Leon Song and
                  Hongwen Dai and
                  Albert Sidelnik and
                  Siva Kumar Sastry Hari and
                  Huiyang Zhou},
  editor       = {Laxmi N. Bhuyan and
                  Fred Chong and
                  Vivek Sarkar},
  title        = {Locality-Driven Dynamic {GPU} Cache Bypassing},
  booktitle    = {Proceedings of the 29th {ACM} on International Conference on Supercomputing,
                  ICS'15, Newport Beach/Irvine, CA, USA, June 08 - 11, 2015},
  pages        = {67--77},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {https://doi.org/10.1145/2751205.2751237},
  doi          = {10.1145/2751205.2751237},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ics/LiSDSHZ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/3dic/FranzonRTZDDHKL14,
  author       = {Paul D. Franzon and
                  Eric Rotenberg and
                  James Tuck and
                  Huiyang Zhou and
                  W. Rhett Davis and
                  Hongwen Dai and
                  Joonmoo Huh and
                  Sungkwan Ku and
                  Steve Lipa and
                  Chao Li and
                  Jong Beom Park and
                  Joshua Schabel},
  title        = {3D-enabled customizable embedded computer {(3DECC)}},
  booktitle    = {2014 International 3D Systems Integration Conference, 3DIC 2014, Kinsdale,
                  Ireland, December 1-3, 2014},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/3DIC.2014.7152143},
  doi          = {10.1109/3DIC.2014.7152143},
  timestamp    = {Tue, 23 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/3dic/FranzonRTZDDHKL14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispass/LiYDYMZ14,
  author       = {Chao Li and
                  Yi Yang and
                  Hongwen Dai and
                  Shengen Yan and
                  Frank Mueller and
                  Huiyang Zhou},
  title        = {Understanding the tradeoffs between software-managed vs. hardware-managed
                  caches in GPUs},
  booktitle    = {2014 {IEEE} International Symposium on Performance Analysis of Systems
                  and Software, {ISPASS} 2014, Monterey, CA, USA, March 23-25, 2014},
  pages        = {231--242},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISPASS.2014.6844487},
  doi          = {10.1109/ISPASS.2014.6844487},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispass/LiYDYMZ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ppopp/YanLZZ14,
  author       = {Shengen Yan and
                  Chao Li and
                  Yunquan Zhang and
                  Huiyang Zhou},
  editor       = {Jos{\'{e}} E. Moreira and
                  James R. Larus},
  title        = {yaSpMV: yet another SpMV framework on GPUs},
  booktitle    = {{ACM} {SIGPLAN} Symposium on Principles and Practice of Parallel Programming,
                  PPoPP '14, Orlando, FL, USA, February 15-19, 2014},
  pages        = {107--118},
  publisher    = {{ACM}},
  year         = {2014},
  url          = {https://doi.org/10.1145/2555243.2555255},
  doi          = {10.1145/2555243.2555255},
  timestamp    = {Sun, 12 Jun 2022 19:46:08 +0200},
  biburl       = {https://dblp.org/rec/conf/ppopp/YanLZZ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sbac-pad/DaiKLJZ14,
  author       = {Hongwen Dai and
                  Christos Kartsaklis and
                  Chao Li and
                  Tomislav Janjusic and
                  Huiyang Zhou},
  title        = {{RACB:} Resource Aware Cache Bypass on GPUs},
  booktitle    = {26th {IEEE} International Symposium on Computer Architecture and High
                  Performance Computing Workshop, {SBAC-PAD} Workshop 2014, Paris, France,
                  October 22-24, 2014},
  pages        = {24--29},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/SBAC-PADW.2014.14},
  doi          = {10.1109/SBAC-PADW.2014.14},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/sbac-pad/DaiKLJZ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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