BibTeX records: Jaushin Lee

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@article{DBLP:journals/tcad/LeeP96,
  author       = {Jaushin Lee and
                  Janak H. Patel},
  title        = {Hierarchical test generation under architectural level functional
                  constraints},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {15},
  number       = {9},
  pages        = {1144--1151},
  year         = {1996},
  url          = {https://doi.org/10.1109/43.536720},
  doi          = {10.1109/43.536720},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/LeeP96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/ChickermaneLP94,
  author       = {Vivek Chickermane and
                  Jaushin Lee and
                  Janak H. Patel},
  title        = {Addressing design for testability at the architectural level},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {13},
  number       = {7},
  pages        = {920--934},
  year         = {1994},
  url          = {https://doi.org/10.1109/43.293949},
  doi          = {10.1109/43.293949},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/ChickermaneLP94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/LeeP94,
  author       = {Jaushin Lee and
                  Janak H. Patel},
  title        = {Architectural level test generation for microprocessors},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {13},
  number       = {10},
  pages        = {1288--1300},
  year         = {1994},
  url          = {https://doi.org/10.1109/43.317464},
  doi          = {10.1109/43.317464},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/LeeP94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/et/LeeP93,
  author       = {Jaushin Lee and
                  Janak H. Patel},
  title        = {An architectural level test generator based on nonlinear equation
                  solving},
  journal      = {J. Electron. Test.},
  volume       = {4},
  number       = {2},
  pages        = {137--150},
  year         = {1993},
  url          = {https://doi.org/10.1007/BF00971643},
  doi          = {10.1007/BF00971643},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/et/LeeP93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/LeeP93,
  author       = {Jaushin Lee and
                  Janak H. Patel},
  title        = {Testability analysis based on structural and behavioral information},
  booktitle    = {11th {IEEE} {VLSI} Test Symposium (VTS'93), 6 Apr 1993-8 Apr 1993,
                  Atlantic City, NJ, {USA}},
  pages        = {139--146},
  publisher    = {{IEEE} Computer Society},
  year         = {1993},
  url          = {https://doi.org/10.1109/VTEST.1993.313335},
  doi          = {10.1109/VTEST.1993.313335},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/LeeP93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/LeeCP93,
  author       = {Jaushin Lee and
                  Vivek Chickermane and
                  Janak H. Patel},
  title        = {Impact of high level functional constraints on testability},
  booktitle    = {11th {IEEE} {VLSI} Test Symposium (VTS'93), 6 Apr 1993-8 Apr 1993,
                  Atlantic City, NJ, {USA}},
  pages        = {309--312},
  publisher    = {{IEEE} Computer Society},
  year         = {1993},
  url          = {https://doi.org/10.1109/VTEST.1993.313364},
  doi          = {10.1109/VTEST.1993.313364},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/LeeCP93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@phdthesis{DBLP:phd/us/Lee92,
  author       = {Jaushin Lee},
  title        = {Architectural Level Test Generation and Fault Simulation},
  school       = {University of Illinois Urbana-Champaign, {USA}},
  year         = {1992},
  url          = {https://hdl.handle.net/2142/71982},
  timestamp    = {Thu, 07 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/phd/us/Lee92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/LeeP92,
  author       = {Jaushin Lee and
                  Janak H. Patel},
  editor       = {Daniel G. Schweikert},
  title        = {Hierarchical Test Generation under Intensive Global Functional Constraints},
  booktitle    = {Proceedings of the 29th Design Automation Conference, Anaheim, California,
                  USA, June 8-12, 1992},
  pages        = {261--266},
  publisher    = {{IEEE} Computer Society Press},
  year         = {1992},
  url          = {http://portal.acm.org/citation.cfm?id=113938.149433},
  timestamp    = {Thu, 16 Mar 2017 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/LeeP92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/ChickermaneLP92,
  author       = {Vivek Chickermane and
                  Jaushin Lee and
                  Janak H. Patel},
  editor       = {Louise Trevillyan and
                  Michael R. Lightner},
  title        = {A comparative study of design for testability methods using high-level
                  and gate-level descriptions},
  booktitle    = {1992 {IEEE/ACM} International Conference on Computer-Aided Design,
                  {ICCAD} 1992, Santa Clara, CA, USA, November 8-12, 1992. Digest of
                  Technical Papers},
  pages        = {620--624},
  publisher    = {{IEEE} Computer Society / {ACM}},
  year         = {1992},
  url          = {https://doi.org/10.1109/ICCAD.1992.279302},
  doi          = {10.1109/ICCAD.1992.279302},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/ChickermaneLP92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/LeeP92,
  author       = {Jaushin Lee and
                  Janak H. Patel},
  title        = {An Instruction Sequence Assembling Methodology for Testing Microprocessors},
  booktitle    = {Proceedings {IEEE} International Test Conference 1992, Discover the
                  New World of Test and Design, Baltimore, Maryland, USA, September
                  20-24, 1992},
  pages        = {49--58},
  publisher    = {{IEEE} Computer Society},
  year         = {1992},
  url          = {https://doi.org/10.1109/TEST.1992.527803},
  doi          = {10.1109/TEST.1992.527803},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/LeeP92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/ChickermaneLP92,
  author       = {Vivek Chickermane and
                  Jaushin Lee and
                  Janak H. Patel},
  title        = {Design for Testability Using Architectural Descriptions},
  booktitle    = {Proceedings {IEEE} International Test Conference 1992, Discover the
                  New World of Test and Design, Baltimore, Maryland, USA, September
                  20-24, 1992},
  pages        = {752--761},
  publisher    = {{IEEE} Computer Society},
  year         = {1992},
  url          = {https://doi.org/10.1109/TEST.1992.527897},
  doi          = {10.1109/TEST.1992.527897},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/ChickermaneLP92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ftcs/LeeP91,
  author       = {Jaushin Lee and
                  Janak H. Patel},
  title        = {An Architectural Level Test Generator for a Hierarchical Design Environment},
  booktitle    = {Proceedings of the 1991 International Symposium on Fault-Tolerant
                  Computing, Montreal, Canada},
  pages        = {44--51},
  publisher    = {{IEEE} Computer Society},
  year         = {1991},
  url          = {https://doi.org/10.1109/FTCS.1991.146631},
  doi          = {10.1109/FTCS.1991.146631},
  timestamp    = {Wed, 16 Oct 2019 14:14:57 +0200},
  biburl       = {https://dblp.org/rec/conf/ftcs/LeeP91.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/LeeP91,
  author       = {Jaushin Lee and
                  Janak H. Patel},
  title        = {A Signal-Driven Discrete Relaxation Technique for Architectural Level
                  Test Generation},
  booktitle    = {1991 {IEEE/ACM} International Conference on Computer-Aided Design,
                  {ICCAD} 1993, Santa Clara, CA, USA, November 11-14, 1991. Digest of
                  Technical Papers},
  pages        = {458--461},
  publisher    = {{IEEE} Computer Society},
  year         = {1991},
  url          = {https://doi.org/10.1109/ICCAD.1991.185303},
  doi          = {10.1109/ICCAD.1991.185303},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/LeeP91.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/LeeP91,
  author       = {Jaushin Lee and
                  Janak H. Patel},
  title        = {{ARTEST:} An Architectural Level Test Generator for Data Path Faults
                  and Control Faults},
  booktitle    = {Proceedings {IEEE} International Test Conference 1991, Test: Faster,
                  Better, Sooner, Nashville, TN, USA, October 26-30, 1991},
  pages        = {729--738},
  publisher    = {{IEEE} Computer Society},
  year         = {1991},
  url          = {https://doi.org/10.1109/TEST.1991.519738},
  doi          = {10.1109/TEST.1991.519738},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/itc/LeeP91.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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