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ORCIDBibTeX records: Nam Sung Kim
@article{DBLP:journals/cal/KimYWYK24,
author = {Hyungyo Kim and
Gaohan Ye and
Nachuan Wang and
Amir Yazdanbakhsh and
Nam Sung Kim},
title = {Exploiting Intel Advanced Matrix Extensions {(AMX)} for Large Language
Model Inference},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {23},
number = {1},
pages = {117--120},
year = {2024},
url = {https://doi.org/10.1109/LCA.2024.3397747},
doi = {10.1109/LCA.2024.3397747},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/KimYWYK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esl/JeongJKY24,
author = {Ipoom Jeong and
Eunbi Jeong and
Nam Sung Kim and
Myung Kuk Yoon},
title = {Triple-A: Early Operand Collector Allocation for Maximizing {GPU}
Register Bank Utilization},
journal = {{IEEE} Embed. Syst. Lett.},
volume = {16},
number = {2},
pages = {206--209},
year = {2024},
url = {https://doi.org/10.1109/LES.2023.3307622},
doi = {10.1109/LES.2023.3307622},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esl/JeongJKY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/KuperJY0RRHKLK24,
author = {Reese Kuper and
Ipoom Jeong and
Yifan Yuan and
Ren Wang and
Narayan Ranganathan and
Nikhil Rao and
Jiayu Hu and
Sanjay Kumar and
Philip Lantz and
Nam Sung Kim},
editor = {Rajiv Gupta and
Nael B. Abu{-}Ghazaleh and
Madan Musuvathi and
Dan Tsafrir},
title = {A Quantitative Analysis and Guidelines of Data Streaming Accelerator
in Modern Intel Xeon Scalable Processors},
booktitle = {Proceedings of the 29th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 2,
{ASPLOS} 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024},
pages = {37--54},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3620665.3640401},
doi = {10.1145/3620665.3640401},
timestamp = {Sat, 04 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/KuperJY0RRHKLK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/0006CKKKKA24,
author = {Jaehyun Park and
Jaewan Choi and
Kwanhee Kyung and
Michael Jaemin Kim and
Yongsuk Kwon and
Nam Sung Kim and
Jung Ho Ahn},
editor = {Rajiv Gupta and
Nael B. Abu{-}Ghazaleh and
Madan Musuvathi and
Dan Tsafrir},
title = {AttAcc! Unleashing the Power of {PIM} for Batched Transformer-based
Generative Model Inference},
booktitle = {Proceedings of the 29th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 2,
{ASPLOS} 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024},
pages = {103--119},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3620665.3640422},
doi = {10.1145/3620665.3640422},
timestamp = {Sat, 04 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/0006CKKKKA24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/SongKWJHJ0NWAK24,
author = {Chihun Song and
Michael Jaemin Kim and
Tianchen Wang and
Houxiang Ji and
Jinghan Huang and
Ipoom Jeong and
Jaehyun Park and
Hwayong Nam and
Minbok Wi and
Jung Ho Ahn and
Nam Sung Kim},
editor = {Rajiv Gupta and
Nael B. Abu{-}Ghazaleh and
Madan Musuvathi and
Dan Tsafrir},
title = {{TAROT:} {A} {CXL} SmartNIC-Based Defense Against Multi-bit Errors
by Row-Hammer Attacks},
booktitle = {Proceedings of the 29th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 3,
{ASPLOS} 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024},
pages = {981--998},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3620666.3651325},
doi = {10.1145/3620666.3651325},
timestamp = {Fri, 26 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/SongKWJHJ0NWAK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/GhodratiKXMKAWK24,
author = {Soroush Ghodrati and
Sean Kinzer and
Hanyang Xu and
Rohan Mahapatra and
Yoonsung Kim and
Byung Hoon Ahn and
Dong Kai Wang and
Lavanya Karthikeyan and
Amir Yazdanbakhsh and
Jongse Park and
Nam Sung Kim and
Hadi Esmaeilzadeh},
editor = {Rajiv Gupta and
Nael B. Abu{-}Ghazaleh and
Madan Musuvathi and
Dan Tsafrir},
title = {Tandem Processor: Grappling with Emerging Operators in Neural Networks},
booktitle = {Proceedings of the 29th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 2,
{ASPLOS} 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024},
pages = {1165--1182},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3620665.3640365},
doi = {10.1145/3620665.3640365},
timestamp = {Sat, 04 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/GhodratiKXMKAWK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurosys/PhamCLNYJLKS24,
author = {Kiet Tuan Pham and
Seokjoo Cho and
Sangjin Lee and
Lan Anh Nguyen and
Hyeongi Yeo and
Ipoom Jeong and
Sungjin Lee and
Nam Sung Kim and
Yongseok Son},
title = {ScaleCache: {A} Scalable Page Cache for Multiple Solid-State Drives},
booktitle = {Proceedings of the Nineteenth European Conference on Computer Systems,
EuroSys 2024, Athens, Greece, April 22-25, 2024},
pages = {641--656},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3627703.3629588},
doi = {10.1145/3627703.3629588},
timestamp = {Mon, 29 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eurosys/PhamCLNYJLKS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LeePKYLCKKC24,
author = {Minjae Lee and
Seongmin Park and
Hyungmin Kim and
Minyong Yoon and
Janghwan Lee and
Jun Won Choi and
Nam Sung Kim and
Mingu Kang and
Jungwook Choi},
title = {{SPADE:} Sparse Pillar-based 3D Object Detection Accelerator for Autonomous
Driving},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2024, Edinburgh, United Kingdom, March 2-6, 2024},
pages = {454--467},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/HPCA57654.2024.00041},
doi = {10.1109/HPCA57654.2024.00041},
timestamp = {Tue, 03 Sep 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/LeePKYLCKKC24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChoiPKKA24,
author = {Jaewan Choi and
Jaehyun Park and
Kwanhee Kyung and
Nam Sung Kim and
Jung Ho Ahn},
title = {Unleashing the Potential of {PIM:} Accelerating Large Batched Inference
of Transformer-Based Generative Models},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2024, Edinburgh, United Kingdom, March 2-6, 2024},
pages = {614},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/HPCA57654.2024.00052},
doi = {10.1109/HPCA57654.2024.00052},
timestamp = {Thu, 18 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/ChoiPKKA24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ParkKSJLWKLKKKLCTCSAK24,
author = {Sangsoo Park and
KyungSoo Kim and
Jinin So and
Jin Jung and
Jonggeon Lee and
Kyoungwan Woo and
Nayeon Kim and
Younghyun Lee and
Hyungyo Kim and
Yongsuk Kwon and
Jinhyun Kim and
Jieun Lee and
YeonGon Cho and
Yongmin Tai and
Jeonghyeon Cho and
Hoyoung Song and
Jung Ho Ahn and
Nam Sung Kim},
title = {An LPDDR-based {CXL-PNM} Platform for TCO-efficient Inference of Transformer-based
Large Language Models},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2024, Edinburgh, United Kingdom, March 2-6, 2024},
pages = {970--982},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/HPCA57654.2024.00078},
doi = {10.1109/HPCA57654.2024.00078},
timestamp = {Wed, 01 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/ParkKSJLWKLKKKLCTCSAK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HuangLVKJJZLK24,
author = {Jinghan Huang and
Jiaqi Lou and
Srikar Vanavasam and
Xinhao Kong and
Houxiang Ji and
Ipoom Jeong and
Danyang Zhuo and
Eun Kyung Lee and
Nam Sung Kim},
title = {{HAL:} Hardware-assisted Load Balancing for Energy-efficient SNIC-Host
Cooperative Computing},
booktitle = {51st {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2024, Buenos Aires, Argentina, June 29 - July 3, 2024},
pages = {613--627},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISCA59077.2024.00051},
doi = {10.1109/ISCA59077.2024.00051},
timestamp = {Fri, 16 Aug 2024 20:48:15 +0200},
biburl = {https://dblp.org/rec/conf/isca/HuangLVKJJZLK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/YuanWRRKLSCKSJK24,
author = {Yifan Yuan and
Ren Wang and
Narayan Ranganathan and
Nikhil Rao and
Sanjay Kumar and
Philip Lantz and
Vivekananthan Sanjeepan and
Jorge Cabrera and
Atul Kwatra and
Rajesh Sankaran and
Ipoom Jeong and
Nam Sung Kim},
title = {Intel Accelerators Ecosystem: An SoC-Oriented Perspective : Industry
Product},
booktitle = {51st {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2024, Buenos Aires, Argentina, June 29 - July 3, 2024},
pages = {848--862},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISCA59077.2024.00066},
doi = {10.1109/ISCA59077.2024.00066},
timestamp = {Thu, 05 Sep 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/YuanWRRKLSCKSJK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/NamBWKPSKA24,
author = {Hwayong Nam and
Seungmin Baek and
Minbok Wi and
Michael Jaemin Kim and
Jaehyun Park and
Chihun Song and
Nam Sung Kim and
Jung Ho Ahn},
title = {DRAMScope: Uncovering {DRAM} Microarchitecture and Characteristics
by Issuing Memory Commands},
booktitle = {51st {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2024, Buenos Aires, Argentina, June 29 - July 3, 2024},
pages = {1097--1111},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISCA59077.2024.00083},
doi = {10.1109/ISCA59077.2024.00083},
timestamp = {Fri, 16 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/NamBWKPSKA24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nsdi/LouKH0KZ24,
author = {Jiaqi Lou and
Xinhao Kong and
Jinghan Huang and
Wei Bai and
Nam Sung Kim and
Danyang Zhuo},
editor = {Laurent Vanbever and
Irene Zhang},
title = {Harmonic: Hardware-assisted {RDMA} Performance Isolation for Public
Clouds},
booktitle = {21st {USENIX} Symposium on Networked Systems Design and Implementation,
{NSDI} 2024, Santa Clara, CA, April 15-17, 2024},
publisher = {{USENIX} Association},
year = {2024},
url = {https://www.usenix.org/conference/nsdi24/presentation/lou},
timestamp = {Fri, 26 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nsdi/LouKH0KZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2405-02499,
author = {Hwayong Nam and
Seungmin Baek and
Minbok Wi and
Michael Jaemin Kim and
Jaehyun Park and
Chihun Song and
Nam Sung Kim and
Jung Ho Ahn},
title = {DRAMScope: Uncovering {DRAM} Microarchitecture and Characteristics
by Issuing Memory Commands},
journal = {CoRR},
volume = {abs/2405.02499},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2405.02499},
doi = {10.48550/ARXIV.2405.02499},
eprinttype = {arXiv},
eprint = {2405.02499},
timestamp = {Fri, 07 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2405-02499.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JeongLSPYK23,
author = {Ipoom Jeong and
Jiaqi Lou and
Yongseok Son and
Yongjoo Park and
Yifan Yuan and
Nam Sung Kim},
title = {{LADIO:} Leakage-Aware Direct {I/O} for I/O-Intensive Workloads},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {22},
number = {2},
pages = {77--80},
year = {2023},
url = {https://doi.org/10.1109/LCA.2023.3290427},
doi = {10.1109/LCA.2023.3290427},
timestamp = {Fri, 18 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/JeongLSPYK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NamBWKPSKA23,
author = {Hwayong Nam and
Seungmin Baek and
Minbok Wi and
Michael Jaemin Kim and
Jaehyun Park and
Chihun Song and
Nam Sung Kim and
Jung Ho Ahn},
title = {X-ray: Discovering {DRAM} Internal Structure and Error Characteristics
by Issuing Memory Commands},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {22},
number = {2},
pages = {89--92},
year = {2023},
url = {https://doi.org/10.1109/LCA.2023.3296153},
doi = {10.1109/LCA.2023.3296153},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/NamBWKPSKA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChoiPKKA23,
author = {Jaewan Choi and
Jaehyun Park and
Kwanhee Kyung and
Nam Sung Kim and
Jung Ho Ahn},
title = {Unleashing the Potential of {PIM:} Accelerating Large Batched Inference
of Transformer-Based Generative Models},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {22},
number = {2},
pages = {113--116},
year = {2023},
url = {https://doi.org/10.1109/LCA.2023.3305386},
doi = {10.1109/LCA.2023.3305386},
timestamp = {Wed, 01 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ChoiPKKA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/KimK23,
author = {John Kim and
Nam Sung Kim},
title = {Special Issue on Emerging System Interconnects},
journal = {{IEEE} Micro},
volume = {43},
number = {2},
pages = {6--8},
year = {2023},
url = {https://doi.org/10.1109/MM.2023.3240453},
doi = {10.1109/MM.2023.3240453},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/KimK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/OhAKADM23,
author = {Byoungchan Oh and
Nilmini Abeyratne and
Nam Sung Kim and
Jeongseob Ahn and
Ronald G. Dreslinski and
Trevor N. Mudge},
title = {Rethinking DRAM's Page Mode With {STT-MRAM}},
journal = {{IEEE} Trans. Computers},
volume = {72},
number = {5},
pages = {1503--1517},
year = {2023},
url = {https://doi.org/10.1109/TC.2022.3207131},
doi = {10.1109/TC.2022.3207131},
timestamp = {Sat, 29 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/OhAKADM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotos/KongLBKZ23,
author = {Xinhao Kong and
Jiaqi Lou and
Wei Bai and
Nam Sung Kim and
Danyang Zhuo},
editor = {Malte Schwarzkopf and
Andrew Baumann and
Natacha Crooks},
title = {Towards a Manageable Intra-Host Network},
booktitle = {Proceedings of the 19th Workshop on Hot Topics in Operating Systems,
{HOTOS} 2023, Providence, RI, USA, June 22-24, 2023},
pages = {206--213},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3593856.3595890},
doi = {10.1145/3593856.3595890},
timestamp = {Tue, 11 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hotos/KongLBKZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WiPKKKLA23,
author = {Minbok Wi and
Jaehyun Park and
Seoyoung Ko and
Michael Jaemin Kim and
Nam Sung Kim and
Eojin Lee and
Jung Ho Ahn},
title = {{SHADOW:} Preventing Row Hammer in {DRAM} with Intra-Subarray Row
Shuffling},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2023, Montreal, QC, Canada, February 25 - March 1, 2023},
pages = {333--346},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/HPCA56546.2023.10070966},
doi = {10.1109/HPCA56546.2023.10070966},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/WiPKKKLA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/YuanHSWNPWWTK23,
author = {Yifan Yuan and
Jinghan Huang and
Yan Sun and
Tianchen Wang and
Jacob Nelson and
Dan R. K. Ports and
Yipeng Wang and
Ren Wang and
Charlie Tai and
Nam Sung Kim},
title = {Rambda: RDMA-driven Acceleration Framework for Memory-intensive {\(\mathrm{\mu}\)}s-scale
Datacenter Applications},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2023, Montreal, QC, Canada, February 25 - March 1, 2023},
pages = {499--515},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/HPCA56546.2023.10071127},
doi = {10.1109/HPCA56546.2023.10071127},
timestamp = {Fri, 26 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/YuanHSWNPWWTK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/HuangLSWLK23,
author = {Jinghan Huang and
Jiaqi Lou and
Yan Sun and
Tianchen Wang and
Eun Kyung Lee and
Nam Sung Kim},
title = {Making Sense of Using a SmartNIC to Reduce Datacenter Tax from {SLO}
and {TCO} Perspectives},
booktitle = {{IEEE} International Symposium on Workload Characterization, {IISWC}
2023, Ghent, Belgium, October 1-3, 2023},
pages = {28--42},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/IISWC59245.2023.00025},
doi = {10.1109/IISWC59245.2023.00025},
timestamp = {Fri, 26 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iiswc/HuangLSWLK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/WangLJMMKGYEK23,
author = {Dong Kai Wang and
Jiaqi Lou and
Naiyin Jin and
Edwin Mascarenhas and
Rohan Mahapatra and
Sean Kinzer and
Soroush Ghodrati and
Amir Yazdanbakhsh and
Hadi Esmaeilzadeh and
Nam Sung Kim},
editor = {Yan Solihin and
Mark A. Heinrich},
title = {{MESA:} Microarchitecture Extensions for Spatial Architecture Generation},
booktitle = {Proceedings of the 50th Annual International Symposium on Computer
Architecture, {ISCA} 2023, Orlando, FL, USA, June 17-21, 2023},
pages = {49:1--49:14},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3579371.3589084},
doi = {10.1145/3579371.3589084},
timestamp = {Fri, 07 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/WangLJMMKGYEK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/HuangLSWLK23,
author = {Jinghan Huang and
Jiaqi Lou and
Yan Sun and
Tianchen Wang and
Eun Kyung Lee and
Nam Sung Kim},
title = {Analyzing Energy Efficiency of a Server with a SmartNIC under {SLO}
Constraints},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2023, Raleigh, NC, USA, April 23-25, 2023},
pages = {334--336},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISPASS57527.2023.00044},
doi = {10.1109/ISPASS57527.2023.00044},
timestamp = {Fri, 26 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispass/HuangLSWLK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SunYYKSHJALJ0AX23,
author = {Yan Sun and
Yifan Yuan and
Zeduo Yu and
Reese Kuper and
Chihun Song and
Jinghan Huang and
Houxiang Ji and
Siddharth Agarwal and
Jiaqi Lou and
Ipoom Jeong and
Ren Wang and
Jung Ho Ahn and
Tianyin Xu and
Nam Sung Kim},
title = {Demystifying {CXL} Memory with Genuine CXL-Ready Systems and Devices},
booktitle = {Proceedings of the 56th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2023, Toronto, ON, Canada, 28 October
2023 - 1 November 2023},
pages = {105--121},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3613424.3614256},
doi = {10.1145/3613424.3614256},
timestamp = {Fri, 26 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/SunYYKSHJALJ0AX23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KimW0KCNKAL23,
author = {Michael Jaemin Kim and
Minbok Wi and
Jaehyun Park and
Seoyoung Ko and
Jaeyoung Choi and
Hwayong Nam and
Nam Sung Kim and
Jung Ho Ahn and
Eojin Lee},
title = {How to Kill the Second Bird with One {ECC:} The Pursuit of Row Hammer
Resilient {DRAM}},
booktitle = {Proceedings of the 56th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2023, Toronto, ON, Canada, 28 October
2023 - 1 November 2023},
pages = {986--1001},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3613424.3623777},
doi = {10.1145/3613424.3623777},
timestamp = {Mon, 24 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/KimW0KCNKAL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/usenix/JiMSYHKSK23,
author = {Houxiang Ji and
Mark Mansi and
Yan Sun and
Yifan Yuan and
Jinghan Huang and
Reese Kuper and
Michael M. Swift and
Nam Sung Kim},
editor = {Julia Lawall and
Dan Williams},
title = {{STYX:} Exploiting SmartNIC Capability to Reduce Datacenter Memory
Tax},
booktitle = {Proceedings of the 2023 {USENIX} Annual Technical Conference, {USENIX}
{ATC} 2023, Boston, MA, USA, July 10-12, 2023},
pages = {619--633},
publisher = {{USENIX} Association},
year = {2023},
url = {https://www.usenix.org/conference/atc23/presentation/ji},
timestamp = {Fri, 26 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/usenix/JiMSYHKSK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2302-01474,
author = {Hyoungwook Nam and
Raghavendra Pradyumna Pothukuchi and
Bo Li and
Nam Sung Kim and
Josep Torrellas},
title = {Defensive {ML:} Defending Architectural Side-channels with Adversarial
Obfuscation},
journal = {CoRR},
volume = {abs/2302.01474},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2302.01474},
doi = {10.48550/ARXIV.2302.01474},
eprinttype = {arXiv},
eprint = {2302.01474},
timestamp = {Thu, 09 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2302-01474.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2302-13394,
author = {Ahmed H. M. O. Abulila and
Izzat El Hajj and
Myoungsoo Jung and
Nam Sung Kim},
title = {Asynchronous Persistence with {ASAP}},
journal = {CoRR},
volume = {abs/2302.13394},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2302.13394},
doi = {10.48550/ARXIV.2302.13394},
eprinttype = {arXiv},
eprint = {2302.13394},
timestamp = {Tue, 28 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2302-13394.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2303-15375,
author = {Yan Sun and
Yifan Yuan and
Zeduo Yu and
Reese Kuper and
Ipoom Jeong and
Ren Wang and
Nam Sung Kim},
title = {Demystifying {CXL} Memory with Genuine CXL-Ready Systems and Devices},
journal = {CoRR},
volume = {abs/2303.15375},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2303.15375},
doi = {10.48550/ARXIV.2303.15375},
eprinttype = {arXiv},
eprint = {2303.15375},
timestamp = {Fri, 14 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2303-15375.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2305-02480,
author = {Reese Kuper and
Ipoom Jeong and
Yifan Yuan and
Jiayu Hu and
Ren Wang and
Narayan Ranganathan and
Nam Sung Kim},
title = {A Quantitative Analysis and Guideline of Data Streaming Accelerator
in Intel 4th Gen Xeon Scalable Processors},
journal = {CoRR},
volume = {abs/2305.02480},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2305.02480},
doi = {10.48550/ARXIV.2305.02480},
eprinttype = {arXiv},
eprint = {2305.02480},
timestamp = {Wed, 10 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2305-02480.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2306-03366,
author = {Hwayong Nam and
Seungmin Baek and
Minbok Wi and
Michael Jaemin Kim and
Jaehyun Park and
Chihun Song and
Nam Sung Kim and
Jung Ho Ahn},
title = {X-ray: Discovering {DRAM} Internal Structure and Error Characteristics
by Issuing Memory Commands},
journal = {CoRR},
volume = {abs/2306.03366},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2306.03366},
doi = {10.48550/ARXIV.2306.03366},
eprinttype = {arXiv},
eprint = {2306.03366},
timestamp = {Tue, 13 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2306-03366.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/LiuZSLKLHCKKKJY22,
author = {Liu Ke and
Xuan Zhang and
Jinin So and
Jong{-}Geon Lee and
Shinhaeng Kang and
Sukhan Lee and
Songyi Han and
YeonGon Cho and
Jin Hyun Kim and
Yongsuk Kwon and
KyungSoo Kim and
Jin Jung and
IlKwon Yun and
Sung Joo Park and
Hyunsun Park and
Joon{-}Ho Song and
Jeonghyeon Cho and
Kyomin Sohn and
Nam Sung Kim and
Hsien{-}Hsin S. Lee},
title = {Near-Memory Processing in Action: Accelerating Personalized Recommendation
With AxDIMM},
journal = {{IEEE} Micro},
volume = {42},
number = {1},
pages = {116--127},
year = {2022},
url = {https://doi.org/10.1109/MM.2021.3097700},
doi = {10.1109/MM.2021.3097700},
timestamp = {Wed, 01 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/LiuZSLKLHCKKKJY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/KimKLKRLWCSCSCS22,
author = {Jin Hyun Kim and
Shinhaeng Kang and
Sukhan Lee and
Hyeonsu Kim and
Yuhwan Ro and
Seungwon Lee and
David Wang and
Jihyun Choi and
Jinin So and
YeonGon Cho and
Joon{-}Ho Song and
Jeonghyeon Cho and
Kyomin Sohn and
Nam Sung Kim},
title = {Aquabolt-XL HBM2-PIM, {LPDDR5-PIM} With In-Memory Processing, and
{AXDIMM} With Acceleration Buffer},
journal = {{IEEE} Micro},
volume = {42},
number = {3},
pages = {20--30},
year = {2022},
url = {https://doi.org/10.1109/MM.2022.3164651},
doi = {10.1109/MM.2022.3164651},
timestamp = {Mon, 13 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/KimKLKRLWCSCSCS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pvldb/LiPMTK22,
author = {Youjie Li and
Amar Phanishayee and
Derek Murray and
Jakub Tarnawski and
Nam Sung Kim},
title = {Harmony: Overcoming the hurdles of {GPU} memory capacity to train
massive {DNN} models on commodity servers},
journal = {Proc. {VLDB} Endow.},
volume = {15},
number = {11},
pages = {2747--2760},
year = {2022},
url = {https://www.vldb.org/pvldb/vol15/p2747-li.pdf},
doi = {10.14778/3551793.3551828},
timestamp = {Mon, 23 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pvldb/LiPMTK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BeiKHY22,
author = {Zhendong Bei and
Nam Sung Kim and
Kai Hwang and
Zhibin Yu},
title = {{OSC:} An Online Self-Configuring Big Data Framework for Optimization
of QoS},
journal = {{IEEE} Trans. Computers},
volume = {71},
number = {4},
pages = {809--823},
year = {2022},
url = {https://doi.org/10.1109/TC.2021.3063278},
doi = {10.1109/TC.2021.3063278},
timestamp = {Fri, 01 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BeiKHY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/DharRYZWKC22,
author = {Ashutosh Dhar and
Edward Richter and
Mang Yu and
Wei Zuo and
Xiaohao Wang and
Nam Sung Kim and
Deming Chen},
title = {{DML:} Dynamic Partial Reconfiguration With Scalable Task Scheduling
for Multi-Applications on FPGAs},
journal = {{IEEE} Trans. Computers},
volume = {71},
number = {10},
pages = {2577--2591},
year = {2022},
url = {https://doi.org/10.1109/TC.2021.3137785},
doi = {10.1109/TC.2021.3137785},
timestamp = {Thu, 22 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/DharRYZWKC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Kang0KKSKL22,
author = {Shinhaeng Kang and
Sukhan Lee and
Byeongho Kim and
Hweesoo Kim and
Kyomin Sohn and
Nam Sung Kim and
Eojin Lee},
editor = {Michael Adler and
Paolo Ienne},
title = {An FPGA-based {RNN-T} Inference Accelerator with {PIM-HBM}},
booktitle = {{FPGA} '22: The 2022 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022},
pages = {146--152},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3490422.3502355},
doi = {10.1145/3490422.3502355},
timestamp = {Mon, 14 Feb 2022 10:33:28 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Kang0KKSKL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iclr/WanLWKKL22,
author = {Cheng Wan and
Youjie Li and
Cameron R. Wolfe and
Anastasios Kyrillidis and
Nam Sung Kim and
Yingyan Lin},
title = {PipeGCN: Efficient Full-Graph Training of Graph Convolutional Networks
with Pipelined Feature Communication},
booktitle = {The Tenth International Conference on Learning Representations, {ICLR}
2022, Virtual Event, April 25-29, 2022},
publisher = {OpenReview.net},
year = {2022},
url = {https://openreview.net/forum?id=kSwqMH0zn1F},
timestamp = {Mon, 19 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iclr/WanLWKKL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/AbulilaHJK22,
author = {Ahmed H. M. O. Abulila and
Izzat El Hajj and
Myoungsoo Jung and
Nam Sung Kim},
editor = {Valentina Salapura and
Mohamed Zahran and
Fred Chong and
Lingjia Tang},
title = {{ASAP:} architecture support for asynchronous persistence},
booktitle = {{ISCA} '22: The 49th Annual International Symposium on Computer Architecture,
New York, New York, USA, June 18 - 22, 2022},
pages = {306--319},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3470496.3527399},
doi = {10.1145/3470496.3527399},
timestamp = {Wed, 01 Jun 2022 14:28:13 +0200},
biburl = {https://dblp.org/rec/conf/isca/AbulilaHJK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/AlianASPYK0K22,
author = {Mohammad Alian and
Siddharth Agarwal and
Jongmin Shin and
Neel Patel and
Yifan Yuan and
Daehoon Kim and
Ren Wang and
Nam Sung Kim},
title = {{IDIO:} Network-Driven, Inbound Network Data Orchestration on Server
Processors},
booktitle = {55th {IEEE/ACM} International Symposium on Microarchitecture, {MICRO}
2022, Chicago, IL, USA, October 1-5, 2022},
pages = {480--493},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/MICRO56248.2022.00042},
doi = {10.1109/MICRO56248.2022.00042},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/AlianASPYK0K22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mlsys/WanLLKL22,
author = {Cheng Wan and
Youjie Li and
Ang Li and
Nam Sung Kim and
Yingyan Lin},
editor = {Diana Marculescu and
Yuejie Chi and
Carole{-}Jean Wu},
title = {{BNS-GCN:} Efficient Full-Graph Training of Graph Convolutional Networks
with Partition-Parallelism and Random Boundary Node Sampling},
booktitle = {Proceedings of the Fifth Conference on Machine Learning and Systems,
MLSys 2022, Santa Clara, CA, USA, August 29 - September 1, 2022},
publisher = {mlsys.org},
year = {2022},
url = {https://proceedings.mlsys.org/paper\_files/paper/2022/hash/676638b91bc90529e09b22e58abb01d6-Abstract.html},
timestamp = {Mon, 19 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mlsys/WanLLKL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nsdi/YuanAFNPSCK22,
author = {Yifan Yuan and
Omar Alama and
Jiawei Fei and
Jacob Nelson and
Dan R. K. Ports and
Amedeo Sapio and
Marco Canini and
Nam Sung Kim},
editor = {Amar Phanishayee and
Vyas Sekar},
title = {Unlocking the Power of Inline Floating-Point Operations on Programmable
Switches},
booktitle = {19th {USENIX} Symposium on Networked Systems Design and Implementation,
{NSDI} 2022, Renton, WA, USA, April 4-6, 2022},
pages = {683--700},
publisher = {{USENIX} Association},
year = {2022},
url = {https://www.usenix.org/conference/nsdi22/presentation/yuan},
timestamp = {Fri, 11 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nsdi/YuanAFNPSCK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2202-01306,
author = {Youjie Li and
Amar Phanishayee and
Derek Murray and
Jakub Tarnawski and
Nam Sung Kim},
title = {Harmony: Overcoming the hurdles of {GPU} memory capacity to train
massive {DNN} models on commodity servers},
journal = {CoRR},
volume = {abs/2202.01306},
year = {2022},
url = {https://arxiv.org/abs/2202.01306},
eprinttype = {arXiv},
eprint = {2202.01306},
timestamp = {Wed, 09 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2202-01306.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2203-08906,
author = {Yifan Yuan and
Jinghan Huang and
Yan Sun and
Tianchen Wang and
Jacob Nelson and
Dan R. K. Ports and
Yipeng Wang and
Ren Wang and
Charlie Tai and
Nam Sung Kim},
title = {{ORCA:} {A} Network and Architecture Co-design for Offloading us-scale
Datacenter Applications},
journal = {CoRR},
volume = {abs/2203.08906},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2203.08906},
doi = {10.48550/ARXIV.2203.08906},
eprinttype = {arXiv},
eprint = {2203.08906},
timestamp = {Fri, 26 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2203-08906.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2203-10428,
author = {Cheng Wan and
Youjie Li and
Cameron R. Wolfe and
Anastasios Kyrillidis and
Nam Sung Kim and
Yingyan Lin},
title = {PipeGCN: Efficient Full-Graph Training of Graph Convolutional Networks
with Pipelined Feature Communication},
journal = {CoRR},
volume = {abs/2203.10428},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2203.10428},
doi = {10.48550/ARXIV.2203.10428},
eprinttype = {arXiv},
eprint = {2203.10428},
timestamp = {Mon, 19 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2203-10428.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2203-10983,
author = {Cheng Wan and
Youjie Li and
Ang Li and
Nam Sung Kim and
Yingyan Lin},
title = {{BNS-GCN:} Efficient Full-Graph Training of Graph Convolutional Networks
with Partition-Parallelism and Random Boundary Node Sampling},
journal = {CoRR},
volume = {abs/2203.10983},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2203.10983},
doi = {10.48550/ARXIV.2203.10983},
eprinttype = {arXiv},
eprint = {2203.10983},
timestamp = {Mon, 19 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2203-10983.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-08974,
author = {Klara Nahrstedt and
Naresh R. Shanbhag and
Vikram S. Adve and
Nancy M. Amato and
Romit Roy Choudhury and
Carl A. Gunter and
Nam Sung Kim and
Olgica Milenkovic and
Sayan Mitra and
Lav R. Varshney and
Yurii Vlasov and
Sarita V. Adve and
Rashid Bashir and
Andreas Cangellaris and
James DiCarlo and
Katie Driggs Campbell and
Nick Feamster and
Mattia Gazzola and
Karrie Karahalios and
Sanmi Koyejo and
Paul G. Kwiat and
Bo Li and
Negar Mehr and
Ravish Mehra and
Andrew Miller and
Daniela Rus and
Alexander G. Schwing and
Anshumali Shrivastava},
title = {Coordinated Science Laboratory 70th Anniversary Symposium: The Future
of Computing},
journal = {CoRR},
volume = {abs/2210.08974},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.08974},
doi = {10.48550/ARXIV.2210.08974},
eprinttype = {arXiv},
eprint = {2210.08974},
timestamp = {Mon, 18 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-08974.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AlianSKWDKK21,
author = {Mohammad Alian and
Jongmin Shin and
Ki{-}Dong Kang and
Ren Wang and
Alexandros Daglis and
Daehoon Kim and
Nam Sung Kim},
title = {{IDIO:} Orchestrating Inbound Network Data on Server Processors},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {20},
number = {1},
pages = {30--33},
year = {2021},
url = {https://doi.org/10.1109/LCA.2020.3044923},
doi = {10.1109/LCA.2020.3044923},
timestamp = {Thu, 16 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/AlianSKWDKK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChunKRPOBKSLHPC21,
author = {Ki Chul Chun and
Yong{-}Ki Kim and
Yesin Ryu and
Jaewon Park and
Chi Sung Oh and
Young{-}Yong Byun and
So{-}Young Kim and
Dong{-}Hak Shin and
Jun Gyu Lee and
Byung{-}Kyu Ho and
Min{-}Sang Park and
Seong{-}Jin Cho and
Seunghan Woo and
Byoung{-}Mo Moon and
Beomyong Kil and
Sungoh Ahn and
Jae Hoon Lee and
Sooyoung Kim and
Seouk{-}Kyu Choi and
Jae{-}Seung Jeong and
Sung{-}Gi Ahn and
Jihye Kim and
Jun Jin Kong and
Kyomin Sohn and
Nam Sung Kim and
Jung{-}Bae Lee},
title = {A 16-GB 640-GB/s {HBM2E} {DRAM} With a Data-Bus Window Extension Technique
and a Synergetic On-Die {ECC} Scheme},
journal = {{IEEE} J. Solid State Circuits},
volume = {56},
number = {1},
pages = {199--211},
year = {2021},
url = {https://doi.org/10.1109/JSSC.2020.3027360},
doi = {10.1109/JSSC.2020.3027360},
timestamp = {Mon, 11 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/ChunKRPOBKSLHPC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LeeCHPJLJLKKKPL21,
author = {Chang{-}Kyo Lee and
Hyung{-}Joon Chi and
Jin{-}Seok Heo and
Junghwan Park and
Jin{-}Hun Jang and
Dongkeon Lee and
Jaehoon Jung and
Dong{-}Hun Lee and
Dae{-}Hyun Kim and
Kihan Kim and
Sang{-}Yun Kim and
Dukha Park and
Youngil Lim and
Geuntae Park and
Seungjun Lee and
Seungki Hong and
Dae{-}Hyun Kwon and
Isak Hwang and
Byongwook Na and
Kyungryun Kim and
Seouk{-}Kyu Choi and
Hye{-}In Choi and
Hangi{-}Jung and
Wonil Bae and
Jeong{-}Don Ihm and
Seung{-}Jun Bae and
Nam Sung Kim and
Jung{-}Bae Lee},
title = {An 8.5-Gb/s/Pin 12-Gb {LPDDR5} {SDRAM} With a Hybrid-Bank Architecture,
Low Power, and Speed-Boosting Techniques},
journal = {{IEEE} J. Solid State Circuits},
volume = {56},
number = {1},
pages = {212--224},
year = {2021},
url = {https://doi.org/10.1109/JSSC.2020.3017775},
doi = {10.1109/JSSC.2020.3017775},
timestamp = {Tue, 05 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/LeeCHPJLJLKKKPL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/LiWK21,
author = {Bingchao Li and
Jizeng Wei and
Nam Sung Kim},
title = {Virtual-Cache: {A} cache-line borrowing technique for efficient {GPU}
cache architectures},
journal = {Microprocess. Microsystems},
volume = {85},
pages = {104301},
year = {2021},
url = {https://doi.org/10.1016/j.micpro.2021.104301},
doi = {10.1016/J.MICPRO.2021.104301},
timestamp = {Wed, 17 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/LiWK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/SkarlatosDGKT21,
author = {Dimitrios Skarlatos and
Umur Darbaz and
Bhargava Gopireddy and
Nam Sung Kim and
Josep Torrellas},
title = {BabelFish: Fusing Address Translations for Containers},
journal = {{IEEE} Micro},
volume = {41},
number = {3},
pages = {57--62},
year = {2021},
url = {https://doi.org/10.1109/MM.2021.3073194},
doi = {10.1109/MM.2021.3073194},
timestamp = {Tue, 15 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/SkarlatosDGKT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/WangK21,
author = {Dong Kai Wang and
Nam Sung Kim},
editor = {Tim Sherwood and
Emery D. Berger and
Christos Kozyrakis},
title = {DiAG: a dataflow-inspired architecture for general-purpose processors},
booktitle = {{ASPLOS} '21: 26th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Virtual Event,
USA, April 19-23, 2021},
pages = {93--106},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3445814.3446703},
doi = {10.1145/3445814.3446703},
timestamp = {Sat, 30 Sep 2023 09:34:47 +0200},
biburl = {https://dblp.org/rec/conf/asplos/WangK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/KimKLKSRLWSPCSC21,
author = {Jin Hyun Kim and
Shinhaeng Kang and
Sukhan Lee and
Hyeonsu Kim and
Woongjae Song and
Yuhwan Ro and
Seungwon Lee and
David Wang and
Hyunsung Shin and
BengSeng Phuah and
Jihyun Choi and
Jinin So and
YeonGon Cho and
Joon{-}Ho Song and
Jangseok Choi and
Jeonghyeon Cho and
Kyomin Sohn and
Young{-}Soo Sohn and
Kwang{-}Il Park and
Nam Sung Kim},
title = {Aquabolt-XL: Samsung {HBM2-PIM} with in-memory processing for {ML}
accelerators and beyond},
booktitle = {{IEEE} Hot Chips 33 Symposium, {HCS} 2021, Palo Alto, CA, USA, August
22-24, 2021},
pages = {1--26},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/HCS52781.2021.9567191},
doi = {10.1109/HCS52781.2021.9567191},
timestamp = {Thu, 02 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hotchips/KimKLKSRLWSPCSC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotos/LiPMK21,
author = {Youjie Li and
Amar Phanishayee and
Derek Murray and
Nam Sung Kim},
editor = {Sebastian Angel and
Baris Kasikci and
Eddie Kohler},
title = {Doing more with less: training large {DNN} models on commodity servers
for the masses},
booktitle = {HotOS '21: Workshop on Hot Topics in Operating Systems, Ann Arbor,
Michigan, USA, June, 1-3, 2021},
pages = {119--127},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3458336.3465289},
doi = {10.1145/3458336.3465289},
timestamp = {Mon, 07 Jun 2021 14:50:08 +0200},
biburl = {https://dblp.org/rec/conf/hotos/LiPMK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Yuan00CTK21,
author = {Yifan Yuan and
Yipeng Wang and
Ren Wang and
Rangeen Basu Roy Chowdhury and
Charlie Tai and
Nam Sung Kim},
title = {{QEI:} Query Acceleration Can be Generic and Efficient in the Cloud},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2021, Seoul, South Korea, February 27 - March 3, 2021},
pages = {385--398},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/HPCA51647.2021.00040},
doi = {10.1109/HPCA51647.2021.00040},
timestamp = {Sat, 25 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/Yuan00CTK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LeeKLKLSYLLSKOI21,
author = {Suk Han Lee and
Shinhaeng Kang and
Jaehoon Lee and
Hyeonsu Kim and
Eojin Lee and
Seungwoo Seo and
Hosang Yoon and
Seungwon Lee and
Kyounghwan Lim and
Hyunsung Shin and
Jinhyun Kim and
Seongil O and
Anand Iyer and
David Wang and
Kyomin Sohn and
Nam Sung Kim},
title = {Hardware Architecture and Software Stack for {PIM} Based on Commercial
{DRAM} Technology : Industrial Product},
booktitle = {48th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2021, Virtual Event / Valencia, Spain, June 14-18, 2021},
pages = {43--56},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCA52012.2021.00013},
doi = {10.1109/ISCA52012.2021.00013},
timestamp = {Mon, 19 Feb 2024 07:32:07 +0100},
biburl = {https://dblp.org/rec/conf/isca/LeeKLKLSYLLSKOI21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/YuanA00KTK21,
author = {Yifan Yuan and
Mohammad Alian and
Yipeng Wang and
Ren Wang and
Ilia Kurakin and
Charlie Tai and
Nam Sung Kim},
title = {Don't Forget the {I/O} When Allocating Your {LLC}},
booktitle = {48th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2021, Virtual Event / Valencia, Spain, June 14-18, 2021},
pages = {112--125},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCA52012.2021.00018},
doi = {10.1109/ISCA52012.2021.00018},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/YuanA00KTK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/0048KGKKKJ21,
author = {Jie Zhang and
Miryeong Kwon and
Donghyun Gouk and
Sungjoon Koh and
Nam Sung Kim and
Mahmut Taylan Kandemir and
Myoungsoo Jung},
title = {Revamping Storage Class Memory With Hardware Automated Memory-Over-Storage
Solution},
booktitle = {48th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2021, Virtual Event / Valencia, Spain, June 14-18, 2021},
pages = {762--775},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCA52012.2021.00065},
doi = {10.1109/ISCA52012.2021.00065},
timestamp = {Fri, 06 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/0048KGKKKJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/KimKCALCPPJKCYJ21,
author = {Yong{-}Hun Kim and
Hyung{-}Jin Kim and
Jaemin Choi and
Min{-}Su Ahn and
Dongkeon Lee and
Seung{-}Hyun Cho and
Dong{-}Yeon Park and
Young{-}Jae Park and
Min{-}Soo Jang and
Yong{-}Jun Kim and
Jinyong Choi and
Sung{-}Woo Yoon and
Jae{-}Woo Jung and
Jae{-}Koo Park and
Jae{-}Woo Lee and
Dae{-}Hyun Kwon and
Hyung{-}Seok Cha and
Si{-}Hyeong Cho and
Seong{-}Hoon Kim and
Jihwa You and
Kyoung{-}Ho Kim and
Dae{-}Hyun Kim and
Byung{-}Cheol Kim and
Young{-}Kwan Kim and
Jun{-}Ho Kim and
Seouk{-}Kyu Choi and
Chanyoung Kim and
Byongwook Na and
Hye{-}In Choi and
Reum Oh and
Jeong{-}Don Ihm and
Seung{-}Jun Bae and
Nam Sung Kim and
Jung{-}Bae Lee},
title = {25.2 {A} 16Gb Sub-1V 7.14Gb/s/pin {LPDDR5} {SDRAM} Applying a Mosaic
Architecture with a Short-Feedback 1-Tap DFE, an {FSS} Bus with Low-Level
Swing and an Adaptively Controlled Body Biasing in a 3\({}^{\mbox{rd}}\)-Generation
10nm {DRAM}},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {346--348},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9366050},
doi = {10.1109/ISSCC42613.2021.9366050},
timestamp = {Sun, 30 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/KimKCALCPPJKCYJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/KwonLLKRSOYLKCK21,
author = {Young{-}Cheon Kwon and
Suk Han Lee and
Jaehoon Lee and
Sang{-}Hyuk Kwon and
Je{-}Min Ryu and
Jong{-}Pil Son and
Seongil O and
Hak{-}soo Yu and
Haesuk Lee and
Soo Young Kim and
Youngmin Cho and
Jin Guk Kim and
Jongyoon Choi and
Hyunsung Shin and
Jin Kim and
BengSeng Phuah and
Hyoungmin Kim and
Myeong Jun Song and
Ahn Choi and
Daeho Kim and
Sooyoung Kim and
Eun{-}Bong Kim and
David Wang and
Shinhaeng Kang and
Yuhwan Ro and
Seungwoo Seo and
Joon{-}Ho Song and
Jaeyoun Youn and
Kyomin Sohn and
Nam Sung Kim},
title = {25.4 {A} 20nm 6GB Function-In-Memory DRAM, Based on {HBM2} with a
1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism,
for Machine Learning Applications},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {350--352},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9365862},
doi = {10.1109/ISSCC42613.2021.9365862},
timestamp = {Thu, 18 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/KwonLLKRSOYLKCK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LeeKLPSKK21,
author = {Seunghak Lee and
Ki{-}Dong Kang and
Hwanjun Lee and
Hyungwon Park and
Young Hoon Son and
Nam Sung Kim and
Daehoon Kim},
title = {GreenDIMM: OS-assisted {DRAM} Power Management for {DRAM} with a Sub-array
Granularity Power-Down State},
booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
Virtual Event, Greece, October 18-22, 2021},
pages = {131--142},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3466752.3480089},
doi = {10.1145/3466752.3480089},
timestamp = {Tue, 19 Oct 2021 15:51:04 +0200},
biburl = {https://dblp.org/rec/conf/micro/LeeKLPSKK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KangPKAKK21,
author = {Ki{-}Dong Kang and
Gyeongseo Park and
Hyosang Kim and
Mohammad Alian and
Nam Sung Kim and
Daehoon Kim},
title = {{NMAP:} Power Management Based on Network Packet Processing Mode Transition
for Latency-Critical Workloads},
booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
Virtual Event, Greece, October 18-22, 2021},
pages = {143--154},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3466752.3480098},
doi = {10.1145/3466752.3480098},
timestamp = {Tue, 19 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/KangPKAKK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2106-14241,
author = {Jie Zhang and
Miryeong Kwon and
Donghyun Gouk and
Sungjoon Koh and
Nam Sung Kim and
Mahmut Taylan Kandemir and
Myoungsoo Jung},
title = {Revamping Storage Class Memory With Hardware Automated Memory-Over-Storage
Solution},
journal = {CoRR},
volume = {abs/2106.14241},
year = {2021},
url = {https://arxiv.org/abs/2106.14241},
eprinttype = {arXiv},
eprint = {2106.14241},
timestamp = {Wed, 30 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2106-14241.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2112-06095,
author = {Yifan Yuan and
Omar Alama and
Amedeo Sapio and
Jiawei Fei and
Jacob Nelson and
Dan R. K. Ports and
Marco Canini and
Nam Sung Kim},
title = {Unlocking the Power of Inline Floating-Point Operations on Programmable
Switches},
journal = {CoRR},
volume = {abs/2112.06095},
year = {2021},
url = {https://arxiv.org/abs/2112.06095},
eprinttype = {arXiv},
eprint = {2112.06095},
timestamp = {Fri, 11 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2112-06095.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KangPKK20,
author = {Ki{-}Dong Kang and
Gyeongseo Park and
Nam Sung Kim and
Daehoon Kim},
title = {Network Packet Processing Mode-Aware Power Management for Data Center
Servers},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {19},
number = {1},
pages = {1--4},
year = {2020},
url = {https://doi.org/10.1109/LCA.2019.2926079},
doi = {10.1109/LCA.2019.2926079},
timestamp = {Thu, 16 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/KangPKK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangKHKKJ20,
author = {Jie Zhang and
Miryeong Kwon and
Sanghyun Han and
Nam Sung Kim and
Mahmut T. Kandemir and
Myoungsoo Jung},
title = {FastDrain: Removing Page Victimization Overheads in NVMe Storage Stack},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {19},
number = {2},
pages = {92--96},
year = {2020},
url = {https://doi.org/10.1109/LCA.2020.3005507},
doi = {10.1109/LCA.2020.3005507},
timestamp = {Sat, 14 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ZhangKHKKJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tkde/SonKKYKH20,
author = {Yongseok Son and
Moonsub Kim and
Sunggon Kim and
Heon Young Yeom and
Nam Sung Kim and
Hyuck Han},
title = {Design and Implementation of SSD-Assisted Backup and Recovery for
Database Systems},
journal = {{IEEE} Trans. Knowl. Data Eng.},
volume = {32},
number = {2},
pages = {260--274},
year = {2020},
url = {https://doi.org/10.1109/TKDE.2018.2884466},
doi = {10.1109/TKDE.2018.2884466},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tkde/SonKKYKH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/KohZKYDKJ20,
author = {Sungjoon Koh and
Jie Zhang and
Miryeong Kwon and
Jungyeon Yoon and
David Donofrio and
Nam Sung Kim and
Myoungsoo Jung},
title = {Errata to "Exploring Fault-Tolerant Erasure Codes for Scalable
All-Flash Array Clusters"},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {31},
number = {6},
pages = {1460},
year = {2020},
url = {https://doi.org/10.1109/TPDS.2020.2971074},
doi = {10.1109/TPDS.2020.2971074},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/KohZKYDKJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/GhodratiSKYPKBE20,
author = {Soroush Ghodrati and
Hardik Sharma and
Sean Kinzer and
Amir Yazdanbakhsh and
Jongse Park and
Nam Sung Kim and
Doug Burger and
Hadi Esmaeilzadeh},
editor = {Vivek Sarkar and
Hyesoon Kim},
title = {Mixed-Signal Charge-Domain Acceleration of Deep Neural Networks through
Interleaved Bit-Partitioned Arithmetic},
booktitle = {{PACT} '20: International Conference on Parallel Architectures and
Compilation Techniques, Virtual Event, GA, USA, October 3-7, 2020},
pages = {399--411},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3410463.3414634},
doi = {10.1145/3410463.3414634},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/GhodratiSKYPKBE20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/GhodratiSYKE20,
author = {Soroush Ghodrati and
Hardik Sharma and
Cliff Young and
Nam Sung Kim and
Hadi Esmaeilzadeh},
title = {Bit-Parallel Vector Composability for Neural Acceleration},
booktitle = {57th {ACM/IEEE} Design Automation Conference, {DAC} 2020, San Francisco,
CA, USA, July 20-24, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DAC18072.2020.9218656},
doi = {10.1109/DAC18072.2020.9218656},
timestamp = {Wed, 14 Oct 2020 10:56:17 +0200},
biburl = {https://dblp.org/rec/conf/dac/GhodratiSYKE20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SkarlatosDGKT20,
author = {Dimitrios Skarlatos and
Umur Darbaz and
Bhargava Gopireddy and
Nam Sung Kim and
Josep Torrellas},
title = {BabelFish: Fusing Address Translations for Containers},
booktitle = {47th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020},
pages = {501--514},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCA45697.2020.00049},
doi = {10.1109/ISCA45697.2020.00049},
timestamp = {Mon, 19 Feb 2024 07:32:24 +0100},
biburl = {https://dblp.org/rec/conf/isca/SkarlatosDGKT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/AlianY00JK20,
author = {Mohammad Alian and
Yifan Yuan and
Jie Zhang and
Ren Wang and
Myoungsoo Jung and
Nam Sung Kim},
title = {Data Direct {I/O} Characterization for Future {I/O} System Exploration},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2020, Boston, MA, USA, August 23-25, 2020},
pages = {160--169},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISPASS48437.2020.00031},
doi = {10.1109/ISPASS48437.2020.00031},
timestamp = {Thu, 23 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispass/AlianY00JK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/OhCBKKRPKCSLSHC20,
author = {Chi{-}Sung Oh and
Ki Chul Chun and
Young{-}Yong Byun and
Yong{-}Ki Kim and
So{-}Young Kim and
Yesin Ryu and
Jaewon Park and
Sinho Kim and
Sang{-}uhn Cha and
Dong{-}Hak Shin and
Jungyu Lee and
Jong{-}Pil Son and
Byung{-}Kyu Ho and
Seong{-}Jin Cho and
Beomyong Kil and
Sungoh Ahn and
Baekmin Lim and
Yong{-}Sik Park and
Kijun Lee and
Myung{-}Kyu Lee and
Seungduk Baek and
Junyong Noh and
Jae{-}Wook Lee and
Seungseob Lee and
Sooyoung Kim and
Bo{-}Tak Lim and
Seouk{-}Kyu Choi and
Jin{-}Guk Kim and
Hye{-}In Choi and
Hyuk{-}Jun Kwon and
Jun Jin Kong and
Kyomin Sohn and
Nam Sung Kim and
Kwang{-}Il Park and
Jung{-}Bae Lee},
title = {22.1 {A} 1.1V 16GB 640GB/s {HBM2E} {DRAM} with a Data-Bus Window-Extension
Technique and a Synergetic On-Die {ECC} Scheme},
booktitle = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC}
2020, San Francisco, CA, USA, February 16-20, 2020},
pages = {330--332},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISSCC19947.2020.9063110},
doi = {10.1109/ISSCC19947.2020.9063110},
timestamp = {Mon, 11 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/OhCBKKRPKCSLSHC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/DharWFXHHKC20,
author = {Ashutosh Dhar and
Xiaohao Wang and
Hubertus Franke and
Jinjun Xiong and
Jian Huang and
Wen{-}Mei W. Hwu and
Nam Sung Kim and
Deming Chen},
title = {FReaC Cache: Folded-logic Reconfigurable Computing in the Last Level
Cache},
booktitle = {53rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2020, Athens, Greece, October 17-21, 2020},
pages = {102--117},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/MICRO50266.2020.00021},
doi = {10.1109/MICRO50266.2020.00021},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/DharWFXHHKC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/GhodratiAKKYASA20,
author = {Soroush Ghodrati and
Byung Hoon Ahn and
Joon Kyung Kim and
Sean Kinzer and
Brahmendra Reddy Yatham and
Navateja Alla and
Hardik Sharma and
Mohammad Alian and
Eiman Ebrahimi and
Nam Sung Kim and
Cliff Young and
Hadi Esmaeilzadeh},
title = {Planaria: Dynamic Architecture Fission for Spatial Multi-Tenant Acceleration
of Deep Neural Networks},
booktitle = {53rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2020, Athens, Greece, October 17-21, 2020},
pages = {681--697},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/MICRO50266.2020.00062},
doi = {10.1109/MICRO50266.2020.00062},
timestamp = {Thu, 23 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/GhodratiAKKYASA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DharYZWKC20,
author = {Ashutosh Dhar and
Mang Yu and
Wei Zuo and
Xiaohao Wang and
Nam Sung Kim and
Deming Chen},
title = {Leveraging Dynamic Partial Reconfiguration with Scalable {ILP} Based
Task Scheduling},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {201--206},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00052},
doi = {10.1109/VLSID49098.2020.00052},
timestamp = {Mon, 14 Nov 2022 15:28:08 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DharYZWKC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2004-05333,
author = {Soroush Ghodrati and
Hardik Sharma and
Cliff Young and
Nam Sung Kim and
Hadi Esmaeilzadeh},
title = {Bit-Parallel Vector Composability for Neural Acceleration},
journal = {CoRR},
volume = {abs/2004.05333},
year = {2020},
url = {https://arxiv.org/abs/2004.05333},
eprinttype = {arXiv},
eprint = {2004.05333},
timestamp = {Tue, 14 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2004-05333.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2006-08966,
author = {Jie Zhang and
Miryeong Kwon and
Sanghyun Han and
Nam Sung Kim and
Mahmut T. Kandemir and
Myoungsoo Jung},
title = {FastDrain: Removing Page Victimization Overheads in NVMe Storage Stack},
journal = {CoRR},
volume = {abs/2006.08966},
year = {2020},
url = {https://arxiv.org/abs/2006.08966},
eprinttype = {arXiv},
eprint = {2006.08966},
timestamp = {Fri, 13 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2006-08966.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2007-04552,
author = {Yifan Yuan and
Mohammad Alian and
Yipeng Wang and
Ilia Kurakin and
Ren Wang and
Tsung{-}Yuan Charlie Tai and
Nam Sung Kim},
title = {{IOCA:} High-Speed I/O-Aware {LLC} Management for Network-Centric
Multi-Tenant Platform},
journal = {CoRR},
volume = {abs/2007.04552},
year = {2020},
url = {https://arxiv.org/abs/2007.04552},
eprinttype = {arXiv},
eprint = {2007.04552},
timestamp = {Thu, 13 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2007-04552.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeKK19,
author = {Seunghak Lee and
Nam Sung Kim and
Daehoon Kim},
title = {Exploiting OS-Level Memory Offlining for {DRAM} Power Management},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {18},
number = {2},
pages = {141--144},
year = {2019},
url = {https://doi.org/10.1109/LCA.2019.2942914},
doi = {10.1109/LCA.2019.2942914},
timestamp = {Wed, 26 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/LeeKK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/KangSAKS19,
author = {Mingu Kang and
Prakalp Srivastava and
Vikram S. Adve and
Nam Sung Kim and
Naresh R. Shanbhag},
title = {An Energy-Efficient Programmable Mixed-Signal Accelerator for Machine
Learning Algorithms},
journal = {{IEEE} Micro},
volume = {39},
number = {5},
pages = {64--72},
year = {2019},
url = {https://doi.org/10.1109/MM.2019.2929502},
doi = {10.1109/MM.2019.2929502},
timestamp = {Wed, 18 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/KangSAKS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/LiWSAK19,
author = {Bingchao Li and
Jizeng Wei and
Jizhou Sun and
Murali Annavaram and
Nam Sung Kim},
title = {An Efficient {GPU} Cache Architecture for Applications with Irregular
Memory Access Patterns},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {16},
number = {3},
pages = {20:1--20:24},
year = {2019},
url = {https://doi.org/10.1145/3322127},
doi = {10.1145/3322127},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/LiWSAK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/KohZKYDKJ19,
author = {Sungjoon Koh and
Jie Zhang and
Miryeong Kwon and
Jungyeon Yoon and
David Donofrio and
Nam Sung Kim and
Myoungsoo Jung},
title = {Exploring Fault-Tolerant Erasure Codes for Scalable All-Flash Array
Clusters},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {30},
number = {6},
pages = {1312--1330},
year = {2019},
url = {https://doi.org/10.1109/TPDS.2018.2884722},
doi = {10.1109/TPDS.2018.2884722},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/KohZKYDKJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/AbulilaMQHKXH19,
author = {Ahmed H. M. O. Abulila and
Vikram Sharma Mailthody and
Zaid Qureshi and
Jian Huang and
Nam Sung Kim and
Jinjun Xiong and
Wen{-}Mei W. Hwu},
editor = {Iris Bahar and
Maurice Herlihy and
Emmett Witchel and
Alvin R. Lebeck},
title = {FlatFlash: Exploiting the Byte-Accessibility of SSDs within a Unified
Memory-Storage Hierarchy},
booktitle = {Proceedings of the Twenty-Fourth International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2019, Providence, RI, USA, April 13-17, 2019},
pages = {971--985},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3297858.3304061},
doi = {10.1145/3297858.3304061},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asplos/AbulilaMQHKXH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KimSCHJ19,
author = {Nam Sung Kim and
Choungki Song and
Woo Young Cho and
Jian Huang and
Myoungsoo Jung},
title = {{LL-PCM:} Low-Latency Phase Change Memory Architecture},
booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019,
{DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
pages = {14},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3316781.3317853},
doi = {10.1145/3316781.3317853},
timestamp = {Sun, 08 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/KimSCHJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KimM19,
author = {Nam Sung Kim and
Pankaj Mehra},
title = {Practical Near-Data Processing to Evolve Memory and Storage Devices
into Mainstream Heterogeneous Computing Systems},
booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019,
{DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
pages = {22},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3316781.3323484},
doi = {10.1145/3316781.3323484},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/KimM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LiuYWEK19,
author = {Zhenhong Liu and
Amir Yazdanbakhsh and
Dong Kai Wang and
Hadi Esmaeilzadeh and
Nam Sung Kim},
editor = {Srilatha Bobbie Manne and
Hillery C. Hunter and
Erik R. Altman},
title = {AxMemo: hardware-compiler co-design for approximate code memoization},
booktitle = {Proceedings of the 46th International Symposium on Computer Architecture,
{ISCA} 2019, Phoenix, AZ, USA, June 22-26, 2019},
pages = {685--697},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3307650.3322215},
doi = {10.1145/3307650.3322215},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/LiuYWEK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/WangK19,
author = {Dong Kai Wang and
Nam Sung Kim},
title = {A\({}^{\mbox{2}}\)M: Approximate Algebraic Memory Using Polynomials
Rings},
booktitle = {2019 {IEEE/ACM} International Symposium on Low Power Electronics and
Design, {ISLPED} 2019, Lausanne, Switzerland, July 29-31, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISLPED.2019.8824846},
doi = {10.1109/ISLPED.2019.8824846},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/WangK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/DharHXJM0KHC19,
author = {Ashutosh Dhar and
Sitao Huang and
Jinjun Xiong and
Damir A. Jamsek and
Bruno Mesnet and
Jian Huang and
Nam Sung Kim and
Wen{-}Mei W. Hwu and
Deming Chen},
title = {Near-Memory and In-Storage {FPGA} Acceleration for Emerging Cognitive
Computing Workloads},
booktitle = {2019 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2019,
Miami, FL, USA, July 15-17, 2019},
pages = {68--75},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISVLSI.2019.00021},
doi = {10.1109/ISVLSI.2019.00021},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/DharHXJM0KHC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/OhAKDM19,
author = {Byoungchan Oh and
Nilmini Abeyratne and
Nam Sung Kim and
Ronald G. Dreslinski and
Trevor N. Mudge},
title = {{SMART:} {STT-MRAM} architecture for smart activation and sensing},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2019, Washington, DC, USA, September 30 - October 03, 2019},
pages = {316--330},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3357526.3357529},
doi = {10.1145/3357526.3357529},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/OhAKDM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/AlianK19,
author = {Mohammad Alian and
Nam Sung Kim},
title = {NetDIMM: Low-Latency Near-Memory Network Interface Architecture},
booktitle = {Proceedings of the 52nd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2019, Columbus, OH, USA, October 12-16,
2019},
pages = {699--711},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3352460.3358278},
doi = {10.1145/3352460.3358278},
timestamp = {Thu, 23 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/AlianK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/SonK0KK19,
author = {Hyojun Son and
Hanjoon Kim and
Hao Wang and
Nam Sung Kim and
John Kim},
editor = {Paul Bogdan and
Cristina Silvano},
title = {Ghost routers: energy-efficient asymmetric multicore processors with
symmetric NoCs},
booktitle = {Proceedings of the 13th {IEEE/ACM} International Symposium on Networks-on-Chip,
{NOCS} 2019, New York, NY, USA, October 17-18, 2019},
pages = {2:1--2:7},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3313231.3352360},
doi = {10.1145/3313231.3352360},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nocs/SonK0KK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/19/KimK19,
author = {Nam Sung Kim and
Ulya R. Karpuzcu},
editor = {Sherief Reda and
Muhammad Shafique},
title = {Approximate Ultra-Low Voltage Many-Core Processor Design},
booktitle = {Approximate Circuits, Methodologies and {CAD}},
pages = {371--382},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-319-99322-5\_18},
doi = {10.1007/978-3-319-99322-5\_18},
timestamp = {Sun, 02 Feb 2020 18:57:32 +0100},
biburl = {https://dblp.org/rec/books/sp/19/KimK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1906-08602,
author = {Sungjoon Koh and
Jie Zhang and
Miryeong Kwon and
Jungyeon Yoon and
David Donofrio and
Nam Sung Kim and
Myoungsoo Jung},
title = {Exploring Fault-Tolerant Erasure Codes for Scalable All-Flash Array
Clusters},
journal = {CoRR},
volume = {abs/1906.08602},
year = {2019},
url = {http://arxiv.org/abs/1906.08602},
eprinttype = {arXiv},
eprint = {1906.08602},
timestamp = {Mon, 24 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1906-08602.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1906-11915,
author = {Soroush Ghodrati and
Hardik Sharma and
Sean Kinzer and
Amir Yazdanbakhsh and
Kambiz Samadi and
Nam Sung Kim and
Doug Burger and
Hadi Esmaeilzadeh},
title = {Mixed-Signal Charge-Domain Acceleration of Deep Neural networks through
Interleaved Bit-Partitioned Arithmetic},
journal = {CoRR},
volume = {abs/1906.11915},
year = {2019},
url = {http://arxiv.org/abs/1906.11915},
eprinttype = {arXiv},
eprint = {1906.11915},
timestamp = {Mon, 01 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1906-11915.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/LeeCSRKA18,
author = {Sukhan Lee and
Hyunyoon Cho and
Young Hoon Son and
Yuhwan Ro and
Nam Sung Kim and
Jung Ho Ahn},
title = {Leveraging Power-Performance Relationship of Energy-Efficient Modern
{DRAM} Devices},
journal = {{IEEE} Access},
volume = {6},
pages = {31387--31398},
year = {2018},
url = {https://doi.org/10.1109/ACCESS.2018.2845861},
doi = {10.1109/ACCESS.2018.2845861},
timestamp = {Fri, 24 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/LeeCSRKA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JungZAKSSKK18,
author = {Myoungsoo Jung and
Jie Zhang and
Ahmed H. M. O. Abulila and
Miryeong Kwon and
Narges Shahidi and
John Shalf and
Nam Sung Kim and
Mahmut T. Kandemir},
title = {SimpleSSD: Modeling Solid State Drives for Holistic System Simulation},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {37--41},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2750658},
doi = {10.1109/LCA.2017.2750658},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/JungZAKSSKK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MinAHK18,
author = {Seungwon Min and
Mohammad Alian and
Wen{-}Mei Hwu and
Nam Sung Kim},
title = {Semi-Coherent {DMA:} An Alternative {I/O} Coherency Management for
Embedded Systems},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {221--224},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2866568},
doi = {10.1109/LCA.2018.2866568},
timestamp = {Thu, 23 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/MinAHK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/LiuYPEK18,
author = {Zhenhong Liu and
Amir Yazdanbakhsh and
Taejoon Park and
Hadi Esmaeilzadeh and
Nam Sung Kim},
title = {SiMul: An Algorithm-Driven Approximate Multiplier Design for Machine
Learning},
journal = {{IEEE} Micro},
volume = {38},
number = {4},
pages = {50--59},
year = {2018},
url = {https://doi.org/10.1109/MM.2018.043191125},
doi = {10.1109/MM.2018.043191125},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/LiuYPEK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JiangLJKGL18,
author = {Li Jiang and
Tianjian Li and
Naifeng Jing and
Nam Sung Kim and
Minyi Guo and
Xiaoyao Liang},
title = {CNFET-Based High Throughput {SIMD} Architecture},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {37},
number = {7},
pages = {1331--1344},
year = {2018},
url = {https://doi.org/10.1109/TCAD.2017.2695899},
doi = {10.1109/TCAD.2017.2695899},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JiangLJKGL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/LeeLSAKCOOAK18,
author = {Sukhan Lee and
Kiwon Lee and
Min Chul Sung and
Mohammad Alian and
Chankyung Kim and
Wooyeong Cho and
Reum Oh and
Seongil O and
Jung Ho Ahn and
Nam Sung Kim},
editor = {Skevos Evripidou and
Per Stenstr{\"{o}}m and
Michael F. P. O'Boyle},
title = {3D-Xpath: high-density managed {DRAM} architecture with cost-effective
alternative paths for memory transactions},
booktitle = {Proceedings of the 27th International Conference on Parallel Architectures
and Compilation Techniques, {PACT} 2018, Limassol, Cyprus, November
01-04, 2018},
pages = {22:1--22:12},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3243176.3243191},
doi = {10.1145/3243176.3243191},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/LeeLSAKCOOAK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/YazdanbakhshSSL18,
author = {Amir Yazdanbakhsh and
Choungki Song and
Jacob Sacks and
Pejman Lotfi{-}Kamran and
Hadi Esmaeilzadeh and
Nam Sung Kim},
editor = {Skevos Evripidou and
Per Stenstr{\"{o}}m and
Michael F. P. O'Boyle},
title = {In-DRAM near-data approximate acceleration for GPUs},
booktitle = {Proceedings of the 27th International Conference on Parallel Architectures
and Compilation Techniques, {PACT} 2018, Limassol, Cyprus, November
01-04, 2018},
pages = {34:1--34:14},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3243176.3243188},
doi = {10.1145/3243176.3243188},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/YazdanbakhshSSL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/Kim18,
author = {Nam Sung Kim},
title = {Practical Challenges in Supporting Function in Memory},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2018, Tainan,
Taiwan, November 5-7, 2018},
pages = {9--12},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ASSCC.2018.8579261},
doi = {10.1109/ASSCC.2018.8579261},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/asscc/Kim18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cloud/KangAKHK18,
author = {Ki{-}Dong Kang and
Mohammad Alian and
Daehoon Kim and
Jaehyuk Huh and
Nam Sung Kim},
title = {{VIP:} Virtual Performance-State for Efficient Power Management of
Virtual Machines},
booktitle = {Proceedings of the {ACM} Symposium on Cloud Computing, SoCC 2018,
Carlsbad, CA, USA, October 11-13, 2018},
pages = {237--248},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3267809.3267816},
doi = {10.1145/3267809.3267816},
timestamp = {Thu, 02 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cloud/KangAKHK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/YazdanbakhshBKG18,
author = {Amir Yazdanbakhsh and
Michael Brzozowski and
Behnam Khaleghi and
Soroush Ghodrati and
Kambiz Samadi and
Nam Sung Kim and
Hadi Esmaeilzadeh},
title = {FlexiGAN: An End-to-End Solution for {FPGA} Acceleration of Generative
Adversarial Networks},
booktitle = {26th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2018, Boulder, CO, USA, April 29 - May
1, 2018},
pages = {65--72},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FCCM.2018.00019},
doi = {10.1109/FCCM.2018.00019},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/YazdanbakhshBKG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/AlianSK18,
author = {Mohammad Alian and
Krishna Parasuram Srinivasan and
Nam Sung Kim},
title = {Simulating PCI-Express Interconnect for Future System Exploration},
booktitle = {2018 {IEEE} International Symposium on Workload Characterization,
{IISWC} 2018, Raleigh, NC, USA, September 30 - October 2, 2018},
pages = {168--178},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/IISWC.2018.8573496},
doi = {10.1109/IISWC.2018.8573496},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iiswc/AlianSK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/KooJLKA18,
author = {Gunjae Koo and
Hyeran Jeon and
Zhenhong Liu and
Nam Sung Kim and
Murali Annavaram},
title = {CTA-Aware Prefetching and Scheduling for {GPU}},
booktitle = {2018 {IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} 2018, Vancouver, BC, Canada, May 21-25, 2018},
pages = {137--148},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/IPDPS.2018.00024},
doi = {10.1109/IPDPS.2018.00024},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ipps/KooJLKA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/ZhangGKJ18,
author = {Jie Zhang and
Shuwen Gao and
Nam Sung Kim and
Myoungsoo Jung},
title = {{CIAO:} Cache Interference-Aware Throughput-Oriented Architecture
and Scheduling for GPUs},
booktitle = {2018 {IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} 2018, Vancouver, BC, Canada, May 21-25, 2018},
pages = {149--159},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/IPDPS.2018.00025},
doi = {10.1109/IPDPS.2018.00025},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/ZhangGKJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SrivastavaKGLCA18,
author = {Prakalp Srivastava and
Mingu Kang and
Sujan K. Gonugondla and
Sungmin Lim and
Jungwook Choi and
Vikram S. Adve and
Nam Sung Kim and
Naresh R. Shanbhag},
editor = {Murali Annavaram and
Timothy Mark Pinkston and
Babak Falsafi},
title = {{PROMISE:} An End-to-End Design of a Programmable Mixed-Signal Accelerator
for Machine-Learning Algorithms},
booktitle = {45th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2018, Los Angeles, CA, USA, June 1-6, 2018},
pages = {43--56},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISCA.2018.00015},
doi = {10.1109/ISCA.2018.00015},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/SrivastavaKGLCA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/YazdanbakhshSKE18,
author = {Amir Yazdanbakhsh and
Kambiz Samadi and
Nam Sung Kim and
Hadi Esmaeilzadeh},
editor = {Murali Annavaram and
Timothy Mark Pinkston and
Babak Falsafi},
title = {{GANAX:} {A} Unified {MIMD-SIMD} Acceleration for Generative Adversarial
Networks},
booktitle = {45th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2018, Los Angeles, CA, USA, June 1-6, 2018},
pages = {650--661},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISCA.2018.00060},
doi = {10.1109/ISCA.2018.00060},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/YazdanbakhshSKE18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/LiuWK18,
author = {Zhenhong Liu and
Daniel Wong and
Nam Sung Kim},
title = {Load-Triggered Warp Approximation on {GPU}},
booktitle = {Proceedings of the International Symposium on Low Power Electronics
and Design, {ISLPED} 2018, Seattle, WA, USA, July 23-25, 2018},
pages = {26:1--26:6},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3218603.3218626},
doi = {10.1145/3218603.3218626},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/LiuWK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/OhKALDM18,
author = {Byoungchan Oh and
Nam Sung Kim and
Jeongseob Ahn and
Bingchao Li and
Ronald G. Dreslinski and
Trevor N. Mudge},
editor = {Bruce L. Jacob},
title = {A load balancing technique for memory channels},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2018, Old Town Alexandria, VA, USA, October 01-04, 2018},
pages = {55--66},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3240302.3240306},
doi = {10.1145/3240302.3240306},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/OhKALDM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LiPAYQPWSEK18,
author = {Youjie Li and
Jongse Park and
Mohammad Alian and
Yifan Yuan and
Zheng Qu and
Peitian Pan and
Ren Wang and
Alexander G. Schwing and
Hadi Esmaeilzadeh and
Nam Sung Kim},
title = {A Network-Centric Hardware/Algorithm Co-Design to Accelerate Distributed
Training of Deep Neural Networks},
booktitle = {51st Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2018, Fukuoka, Japan, October 20-24, 2018},
pages = {175--188},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/MICRO.2018.00023},
doi = {10.1109/MICRO.2018.00023},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/LiPAYQPWSEK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/GoukK0KCKKJ18,
author = {Donghyun Gouk and
Miryeong Kwon and
Jie Zhang and
Sungjoon Koh and
Wonil Choi and
Nam Sung Kim and
Mahmut T. Kandemir and
Myoungsoo Jung},
title = {Amber*: Enabling Precise Full-System Simulation with Detailed Modeling
of All {SSD} Resources},
booktitle = {51st Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2018, Fukuoka, Japan, October 20-24, 2018},
pages = {469--481},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/MICRO.2018.00045},
doi = {10.1109/MICRO.2018.00045},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/GoukK0KCKKJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/AlianMADWRMOCXK18,
author = {Mohammad Alian and
Seungwon Min and
Hadi Asgharimoghaddam and
Ashutosh Dhar and
Dong Kai Wang and
Thomas Roewer and
Adam J. McPadden and
Oliver O'Halloran and
Deming Chen and
Jinjun Xiong and
Daehoon Kim and
Wen{-}Mei W. Hwu and
Nam Sung Kim},
title = {Application-Transparent Near-Memory Processing Architecture with Memory
Channel Network},
booktitle = {51st Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2018, Fukuoka, Japan, October 20-24, 2018},
pages = {802--814},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/MICRO.2018.00070},
doi = {10.1109/MICRO.2018.00070},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/AlianMADWRMOCXK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nips/YuLNLLKSAA18,
author = {Mingchao Yu and
Zhifeng Lin and
Krishna Narra and
Songze Li and
Youjie Li and
Nam Sung Kim and
Alexander G. Schwing and
Murali Annavaram and
Salman Avestimehr},
editor = {Samy Bengio and
Hanna M. Wallach and
Hugo Larochelle and
Kristen Grauman and
Nicol{\`{o}} Cesa{-}Bianchi and
Roman Garnett},
title = {GradiVeQ: Vector Quantization for Bandwidth-Efficient Gradient Aggregation
in Distributed {CNN} Training},
booktitle = {Advances in Neural Information Processing Systems 31: Annual Conference
on Neural Information Processing Systems 2018, NeurIPS 2018, December
3-8, 2018, Montr{\'{e}}al, Canada},
pages = {5129--5139},
year = {2018},
url = {https://proceedings.neurips.cc/paper/2018/hash/cf05968255451bdefe3c5bc64d550517-Abstract.html},
timestamp = {Mon, 16 May 2022 15:41:51 +0200},
biburl = {https://dblp.org/rec/conf/nips/YuLNLLKSAA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nips/LiYLAKS18,
author = {Youjie Li and
Mingchao Yu and
Songze Li and
Salman Avestimehr and
Nam Sung Kim and
Alexander G. Schwing},
editor = {Samy Bengio and
Hanna M. Wallach and
Hugo Larochelle and
Kristen Grauman and
Nicol{\`{o}} Cesa{-}Bianchi and
Roman Garnett},
title = {Pipe-SGD: {A} Decentralized Pipelined {SGD} Framework for Distributed
Deep Net Training},
booktitle = {Advances in Neural Information Processing Systems 31: Annual Conference
on Neural Information Processing Systems 2018, NeurIPS 2018, December
3-8, 2018, Montr{\'{e}}al, Canada},
pages = {8056--8067},
year = {2018},
url = {https://proceedings.neurips.cc/paper/2018/hash/2c6a0bae0f071cbbf0bb3d5b11d90a82-Abstract.html},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nips/LiYLAKS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/osdi/0048KGKLACKKKJ18,
author = {Jie Zhang and
Miryeong Kwon and
Donghyun Gouk and
Sungjoon Koh and
Changlim Lee and
Mohammad Alian and
Myoungjun Chun and
Mahmut Taylan Kandemir and
Nam Sung Kim and
Jihong Kim and
Myoungsoo Jung},
editor = {Andrea C. Arpaci{-}Dusseau and
Geoff Voelker},
title = {FlashShare: Punching Through Server Storage Stack from Kernel to Firmware
for Ultra-Low Latency SSDs},
booktitle = {13th {USENIX} Symposium on Operating Systems Design and Implementation,
{OSDI} 2018, Carlsbad, CA, USA, October 8-10, 2018},
pages = {477--492},
publisher = {{USENIX} Association},
year = {2018},
url = {https://www.usenix.org/conference/osdi18/presentation/zhang},
timestamp = {Tue, 02 Feb 2021 08:06:02 +0100},
biburl = {https://dblp.org/rec/conf/osdi/0048KGKLACKKKJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1805-07718,
author = {Jie Zhang and
Shuwen Gao and
Nam Sung Kim and
Myoungsoo Jung},
title = {{CIAO:} Cache Interference-Aware Throughput-Oriented Architecture
and Scheduling for GPUs},
journal = {CoRR},
volume = {abs/1805.07718},
year = {2018},
url = {http://arxiv.org/abs/1805.07718},
eprinttype = {arXiv},
eprint = {1805.07718},
timestamp = {Tue, 04 Sep 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1805-07718.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1806-01107,
author = {Amir Yazdanbakhsh and
Hajar Falahati and
Philip J. Wolfe and
Kambiz Samadi and
Nam Sung Kim and
Hadi Esmaeilzadeh},
title = {{GANAX:} {A} Unified {MIMD-SIMD} Acceleration for Generative Adversarial
Networks},
journal = {CoRR},
volume = {abs/1806.01107},
year = {2018},
url = {http://arxiv.org/abs/1806.01107},
eprinttype = {arXiv},
eprint = {1806.01107},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1806-01107.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1811-01544,
author = {Donghyun Gouk and
Miryeong Kwon and
Jie Zhang and
Sungjoon Koh and
Wonil Choi and
Nam Sung Kim and
Mahmut T. Kandemir and
Myoungsoo Jung},
title = {Amber: Enabling Precise Full-System Simulation with Detailed Modeling
of All {SSD} Resources},
journal = {CoRR},
volume = {abs/1811.01544},
year = {2018},
url = {http://arxiv.org/abs/1811.01544},
eprinttype = {arXiv},
eprint = {1811.01544},
timestamp = {Thu, 22 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1811-01544.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1811-03617,
author = {Mingchao Yu and
Zhifeng Lin and
Krishna Narra and
Songze Li and
Youjie Li and
Nam Sung Kim and
Alexander G. Schwing and
Murali Annavaram and
Salman Avestimehr},
title = {GradiVeQ: Vector Quantization for Bandwidth-Efficient Gradient Aggregation
in Distributed {CNN} Training},
journal = {CoRR},
volume = {abs/1811.03617},
year = {2018},
url = {http://arxiv.org/abs/1811.03617},
eprinttype = {arXiv},
eprint = {1811.03617},
timestamp = {Fri, 23 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1811-03617.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1811-03619,
author = {Youjie Li and
Mingchao Yu and
Songze Li and
Salman Avestimehr and
Nam Sung Kim and
Alexander G. Schwing},
title = {Pipe-SGD: {A} Decentralized Pipelined {SGD} Framework for Distributed
Deep Net Training},
journal = {CoRR},
volume = {abs/1811.03619},
year = {2018},
url = {http://arxiv.org/abs/1811.03619},
eprinttype = {arXiv},
eprint = {1811.03619},
timestamp = {Fri, 23 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1811-03619.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/KimCXH17,
author = {Nam Sung Kim and
Deming Chen and
Jinjun Xiong and
Wen{-}mei W. Hwu},
title = {Heterogeneous Computing Meets Near-Memory Acceleration and High-Level
Synthesis in the Post-Moore Era},
journal = {{IEEE} Micro},
volume = {37},
number = {4},
pages = {10--18},
year = {2017},
url = {https://doi.org/10.1109/MM.2017.3211105},
doi = {10.1109/MM.2017.3211105},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/micro/KimCXH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tbe/AhnCLKKKP17,
author = {DaeHan Ahn and
Hyerim Chung and
Ho{-}Won Lee and
Kyunghun Kang and
Pan{-}Woo Ko and
Nam Sung Kim and
Taejoon Park},
title = {Smart Gait-Aid Glasses for Parkinson's Disease Patients},
journal = {{IEEE} Trans. Biomed. Eng.},
volume = {64},
number = {10},
pages = {2394--2402},
year = {2017},
url = {https://doi.org/10.1109/TBME.2017.2655344},
doi = {10.1109/TBME.2017.2655344},
timestamp = {Wed, 02 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tbe/AhnCLKKKP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cloud/KimAHK17,
author = {Daehoon Kim and
Mohammad Alian and
Jaehyuk Huh and
Nam Sung Kim},
title = {Janus: supporting heterogeneous power management in virtualized environments},
booktitle = {Proceedings of the 2017 Symposium on Cloud Computing, SoCC 2017, Santa
Clara, CA, USA, September 24-27, 2017},
pages = {652},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3127479.3132566},
doi = {10.1145/3127479.3132566},
timestamp = {Thu, 02 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cloud/KimAHK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AlianAJKK17,
author = {Mohammad Alian and
Ahmed H. M. O. Abulila and
Lokesh Jindal and
Daehoon Kim and
Nam Sung Kim},
title = {{NCAP:} Network-Driven, Packet Context-Aware Power Management for
Client-Server Architecture},
booktitle = {2017 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2017, Austin, TX, USA, February 4-8, 2017},
pages = {25--36},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/HPCA.2017.57},
doi = {10.1109/HPCA.2017.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/AlianAJKK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChaOSHPJCJSCAK17,
author = {Sang{-}uhn Cha and
Seongil O and
Hyunsung Shin and
Sangjoon Hwang and
Kwang{-}Il Park and
Seong{-}Jin Jang and
Joo{-}Sun Choi and
Gyo{-}Young Jin and
Young Hoon Son and
Hyunyoon Cho and
Jung Ho Ahn and
Nam Sung Kim},
title = {Defect Analysis and Cost-Effective Resilience Architecture for Future
{DRAM} Devices},
booktitle = {2017 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2017, Austin, TX, USA, February 4-8, 2017},
pages = {61--72},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/HPCA.2017.30},
doi = {10.1109/HPCA.2017.30},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ChaOSHPJCJSCAK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LiuGAK17,
author = {Zhenhong Liu and
Syed Zohaib Gilani and
Murali Annavaram and
Nam Sung Kim},
title = {G-Scalar: Cost-Effective Generalized Scalar Execution Architecture
for Power-Efficient GPUs},
booktitle = {2017 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2017, Austin, TX, USA, February 4-8, 2017},
pages = {601--612},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/HPCA.2017.51},
doi = {10.1109/HPCA.2017.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/LiuGAK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpec/DateFNXKH17,
author = {Ketan Date and
Keven Feng and
Rakesh Nagi and
Jinjun Xiong and
Nam Sung Kim and
Wen{-}Mei W. Hwu},
title = {Collaborative {(CPU} + {GPU)} algorithms for triangle counting and
truss decomposition on the Minsky architecture: Static graph challenge:
Subgraph isomorphism},
booktitle = {2017 {IEEE} High Performance Extreme Computing Conference, {HPEC}
2017, Waltham, MA, USA, September 12-14, 2017},
pages = {1--7},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/HPEC.2017.8091042},
doi = {10.1109/HPEC.2017.8091042},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpec/DateFNXKH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icrc/HwuHGPKCXS17,
author = {Wen{-}mei W. Hwu and
Izzat El Hajj and
Simon Garcia De Gonzalo and
Carl Pearson and
Nam Sung Kim and
Deming Chen and
Jinjun Xiong and
Zehra Sura},
title = {Rebooting the Data Access Hierarchy of Computing Systems},
booktitle = {{IEEE} International Conference on Rebooting Computing, {ICRC} 2017,
Washington, DC, USA, November 8-9, 2017},
pages = {1--4},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ICRC.2017.8123667},
doi = {10.1109/ICRC.2017.8123667},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icrc/HwuHGPKCXS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/KohZKYDKJ17,
author = {Sungjoon Koh and
Jie Zhang and
Miryeong Kwon and
Jungyeon Yoon and
David Donofrio and
Nam Sung Kim and
Myoungsoo Jung},
title = {Understanding system characteristics of online erasure coding on scalable,
distributed and large-scale {SSD} array systems},
booktitle = {2017 {IEEE} International Symposium on Workload Characterization,
{IISWC} 2017, Seattle, WA, USA, October 1-3, 2017},
pages = {76--86},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/IISWC.2017.8167758},
doi = {10.1109/IISWC.2017.8167758},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iiswc/KohZKYDKJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/LeeRSCKA17,
author = {Sukhan Lee and
Yuhwan Ro and
Young Hoon Son and
Hyunyoon Cho and
Nam Sung Kim and
Jung Ho Ahn},
title = {Understanding power-performance relationship of energy-efficient modern
{DRAM} devices},
booktitle = {2017 {IEEE} International Symposium on Workload Characterization,
{IISWC} 2017, Seattle, WA, USA, October 1-3, 2017},
pages = {110--111},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/IISWC.2017.8167762},
doi = {10.1109/IISWC.2017.8167762},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iiswc/LeeRSCKA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/LiSAK17,
author = {Bingchao Li and
Jizhou Sun and
Murali Annavaram and
Nam Sung Kim},
title = {Elastic-Cache: {GPU} Cache Architecture for Efficient Fine- and Coarse-Grained
Cache-Line Management},
booktitle = {2017 {IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} 2017, Orlando, FL, USA, May 29 - June 2, 2017},
pages = {82--91},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/IPDPS.2017.81},
doi = {10.1109/IPDPS.2017.81},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/LiSAK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/MishkinKL17,
author = {Michael Mishkin and
Nam Sung Kim and
Mikko H. Lipasti},
title = {Temporal codes in on-chip interconnects},
booktitle = {2017 {IEEE/ACM} International Symposium on Low Power Electronics and
Design, {ISLPED} 2017, Taipei, Taiwan, July 24-26, 2017},
pages = {1--6},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISLPED.2017.8009158},
doi = {10.1109/ISLPED.2017.8009158},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/islped/MishkinKL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/AlianDDDKK17,
author = {Mohammad Alian and
Umur Darbaz and
G{\'{a}}bor D{\'{o}}zsa and
Stephan Diestelhorst and
Daehoon Kim and
Nam Sung Kim},
title = {dist-gem5: Distributed simulation of computer clusters},
booktitle = {2017 {IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2017, Santa Rosa, CA, USA, April 24-25, 2017},
pages = {153--162},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ISPASS.2017.7975287},
doi = {10.1109/ISPASS.2017.7975287},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/AlianDDDKK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SkarlatosKT17,
author = {Dimitrios Skarlatos and
Nam Sung Kim and
Josep Torrellas},
editor = {Hillery C. Hunter and
Jaime Moreno and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {Pageforge: a near-memory content-aware page-merging architecture},
booktitle = {Proceedings of the 50th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2017, Cambridge, MA, USA, October 14-18,
2017},
pages = {302--314},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3123939.3124540},
doi = {10.1145/3123939.3124540},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/SkarlatosKT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/JungZAKSSKK17,
author = {Myoungsoo Jung and
Jie Zhang and
Ahmed H. M. O. Abulila and
Miryeong Kwon and
Narges Shahidi and
John Shalf and
Nam Sung Kim and
Mahmut T. Kandemir},
title = {SimpleSSD: Modeling Solid State Drives for Holistic System Simulation},
journal = {CoRR},
volume = {abs/1705.06419},
year = {2017},
url = {http://arxiv.org/abs/1705.06419},
eprinttype = {arXiv},
eprint = {1705.06419},
timestamp = {Tue, 04 Sep 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/JungZAKSSKK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1709-05365,
author = {Sungjoon Koh and
Jie Zhang and
Miryeong Kwon and
Jungyeon Yoon and
David Donofrio and
Nam Sung Kim and
Myoungsoo Jung},
title = {Understanding System Characteristics of Online Erasure Coding on Scalable,
Distributed and Large-Scale {SSD} Array Systems},
journal = {CoRR},
volume = {abs/1709.05365},
year = {2017},
url = {http://arxiv.org/abs/1709.05365},
eprinttype = {arXiv},
eprint = {1709.05365},
timestamp = {Tue, 04 Sep 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1709-05365.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AlianKK16,
author = {Mohammad Alian and
Daehoon Kim and
Nam Sung Kim},
title = {pd-gem5: Simulation Infrastructure for Parallel/Distributed Computer
Systems},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {15},
number = {1},
pages = {41--44},
year = {2016},
url = {https://doi.org/10.1109/LCA.2015.2438295},
doi = {10.1109/LCA.2015.2438295},
timestamp = {Thu, 23 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/AlianKK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/XuMK16,
author = {Qiang Xu and
Todd Mytkowicz and
Nam Sung Kim},
title = {Guest Editors' Introduction: Approximate Computing},
journal = {{IEEE} Des. Test},
volume = {33},
number = {1},
pages = {6--7},
year = {2016},
url = {https://doi.org/10.1109/MDAT.2015.2509607},
doi = {10.1109/MDAT.2015.2509607},
timestamp = {Thu, 30 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/XuMK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/XuMK16a,
author = {Qiang Xu and
Todd Mytkowicz and
Nam Sung Kim},
title = {Approximate Computing: {A} Survey},
journal = {{IEEE} Des. Test},
volume = {33},
number = {1},
pages = {8--22},
year = {2016},
url = {https://doi.org/10.1109/MDAT.2015.2505723},
doi = {10.1109/MDAT.2015.2505723},
timestamp = {Thu, 30 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/XuMK16a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/LiSWAK16,
author = {Bingchao Li and
Choungki Song and
Jizeng Wei and
Jung Ho Ahn and
Nam Sung Kim},
title = {Exploring new features of high-bandwidth memory for GPUs},
journal = {{IEICE} Electron. Express},
volume = {13},
number = {14},
pages = {20160527},
year = {2016},
url = {https://doi.org/10.1587/elex.13.20160527},
doi = {10.1587/ELEX.13.20160527},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/LiSWAK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/MoghaddamFMAK16,
author = {Hadi Asghari Moghaddam and
Amin Farmahini Farahani and
Katherine Morrow and
Jung Ho Ahn and
Nam Sung Kim},
title = {Near-DRAM Acceleration with Single-ISA Heterogeneous Processing in
Standard Memory Modules},
journal = {{IEEE} Micro},
volume = {36},
number = {1},
pages = {24--34},
year = {2016},
url = {https://doi.org/10.1109/MM.2016.8},
doi = {10.1109/MM.2016.8},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/micro/MoghaddamFMAK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/Asgharimoghaddam16,
author = {Hadi Asgharimoghaddam and
Nam Sung Kim},
title = {SpinWise: {A} Practical Energy-Efficient Synchronization Technique
for CMPs},
journal = {{SIGARCH} Comput. Archit. News},
volume = {44},
number = {1},
pages = {1--8},
year = {2016},
url = {https://doi.org/10.1145/2971331.2971333},
doi = {10.1145/2971331.2971333},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/Asgharimoghaddam16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/JangWKLK16,
author = {Jae Young Jang and
Hao Wang and
Euijin Kwon and
Jae W. Lee and
Nam Sung Kim},
title = {Workload-Aware Optimal Power Allocation on Single-Chip Heterogeneous
Processors},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {27},
number = {6},
pages = {1838--1851},
year = {2016},
url = {https://doi.org/10.1109/TPDS.2015.2453965},
doi = {10.1109/TPDS.2015.2453965},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/JangWKLK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/MoghaddamGSPK16,
author = {Hadi Asghari Moghaddam and
Hamid Reza Ghasemi and
Abhishek Arvind Sinkar and
Indrani Paul and
Nam Sung Kim},
title = {VR-scale: runtime dynamic phase scaling of processor voltage regulators
for improving power efficiency},
booktitle = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
2016, Austin, TX, USA, June 5-9, 2016},
pages = {151:1--151:6},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2897937.2898109},
doi = {10.1145/2897937.2898109},
timestamp = {Tue, 06 Nov 2018 16:58:19 +0100},
biburl = {https://dblp.org/rec/conf/dac/MoghaddamGSPK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/0001KA16,
author = {Daniel Wong and
Nam Sung Kim and
Murali Annavaram},
title = {Approximating warps with intra-warp operand value similarity},
booktitle = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
pages = {176--187},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/HPCA.2016.7446063},
doi = {10.1109/HPCA.2016.7446063},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/0001KA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WangZSPJK16,
author = {Hao Wang and
Jie Zhang and
Sharmila Shridhar and
Gieseo Park and
Myoungsoo Jung and
Nam Sung Kim},
title = {{DUANG:} Fast and lightweight page migration in asymmetric memory
systems},
booktitle = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
pages = {481--493},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/HPCA.2016.7446088},
doi = {10.1109/HPCA.2016.7446088},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/WangZSPJK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/GopireddySTKAM16,
author = {Bhargava Gopireddy and
Choungki Song and
Josep Torrellas and
Nam Sung Kim and
Aditya Agrawal and
Asit K. Mishra},
title = {ScalCore: Designing a core for voltage scalability},
booktitle = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
pages = {681--693},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/HPCA.2016.7446104},
doi = {10.1109/HPCA.2016.7446104},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/GopireddySTKAM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KhatamifardRKK16,
author = {S. Karen Khatamifard and
Michael Resch and
Nam Sung Kim and
Ulya R. Karpuzcu},
title = {{VARIUS-TC:} {A} modular architecture-level model of parametric variation
for thin-channel switches},
booktitle = {34th {IEEE} International Conference on Computer Design, {ICCD} 2016,
Scottsdale, AZ, USA, October 2-5, 2016},
pages = {654--661},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ICCD.2016.7753353},
doi = {10.1109/ICCD.2016.7753353},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KhatamifardRKK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LiJJKL16,
author = {Tianjian Li and
Li Jiang and
Naifeng Jing and
Nam Sung Kim and
Xiaoyao Liang},
title = {CNFET-based high throughput register file architecture},
booktitle = {34th {IEEE} International Conference on Computer Design, {ICCD} 2016,
Scottsdale, AZ, USA, October 2-5, 2016},
pages = {662--669},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ICCD.2016.7753354},
doi = {10.1109/ICCD.2016.7753354},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LiJJKL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/AguileraZKJ16,
author = {Paula Aguilera and
Dong Ping Zhang and
Nam Sung Kim and
Nuwan Jayasena},
title = {Fine-Grained Task Migration for Graph Algorithms Using Processing
in Memory},
booktitle = {2016 {IEEE} International Parallel and Distributed Processing Symposium
Workshops, {IPDPS} Workshops 2016, Chicago, IL, USA, May 23-27, 2016},
pages = {489--498},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/IPDPSW.2016.205},
doi = {10.1109/IPDPSW.2016.205},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/AguileraZKJ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/WangZKX16,
author = {Ting Wang and
Qian Zhang and
Nam Sung Kim and
Qiang Xu},
title = {On Effective and Efficient Quality Management for Approximate Computing},
booktitle = {Proceedings of the 2016 International Symposium on Low Power Electronics
and Design, {ISLPED} 2016, San Francisco Airport, CA, USA, August
08 - 10, 2016},
pages = {156--161},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2934583.2934608},
doi = {10.1145/2934583.2934608},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/WangZKX16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/TomeiDK016,
author = {Matthew Tomei and
Henry Duwe and
Nam Sung Kim and
Rakesh Kumar},
title = {Bit Serializing a Microprocessor for Ultra-low-power},
booktitle = {Proceedings of the 2016 International Symposium on Low Power Electronics
and Design, {ISLPED} 2016, San Francisco Airport, CA, USA, August
08 - 10, 2016},
pages = {200--205},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2934583.2934597},
doi = {10.1145/2934583.2934597},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/TomeiDK016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/MoghaddamSAK16,
author = {Hadi Asghari Moghaddam and
Young Hoon Son and
Jung Ho Ahn and
Nam Sung Kim},
title = {Chameleon: Versatile and practical near-DRAM acceleration architecture
for large memory systems},
booktitle = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
pages = {50:1--50:13},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/MICRO.2016.7783753},
doi = {10.1109/MICRO.2016.7783753},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/MoghaddamSAK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SkarlatosTAQPKT16,
author = {Dimitrios Skarlatos and
Renji Thomas and
Aditya Agrawal and
Shibin Qin and
Robert C. N. Pilawa{-}Podgurski and
Ulya R. Karpuzcu and
Radu Teodorescu and
Nam Sung Kim and
Josep Torrellas},
title = {Snatch: Opportunistically reassigning power allocation between processor
and memory in 3D stacks},
booktitle = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
pages = {54:1--54:12},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/MICRO.2016.7783757},
doi = {10.1109/MICRO.2016.7783757},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/SkarlatosTAQPKT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FarahaniAMK15,
author = {Amin Farmahini Farahani and
Jung Ho Ahn and
Katherine Morrow and
Nam Sung Kim},
title = {{DRAMA:} An Architecture for Accelerated Processing Near Memory},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {14},
number = {1},
pages = {26--29},
year = {2015},
url = {https://doi.org/10.1109/LCA.2014.2333735},
doi = {10.1109/LCA.2014.2333735},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/FarahaniAMK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/AkturkKK15,
author = {Ismail Akturk and
Nam Sung Kim and
Ulya R. Karpuzcu},
title = {Decoupled Control and Data Processing for Approximate Near-Threshold
Voltage Computing},
journal = {{IEEE} Micro},
volume = {35},
number = {4},
pages = {70--78},
year = {2015},
url = {https://doi.org/10.1109/MM.2015.85},
doi = {10.1109/MM.2015.85},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/AkturkKK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Narayanamoorthy15,
author = {Srinivasan Narayanamoorthy and
Hadi Asghari Moghaddam and
Zhenhong Liu and
Taejoon Park and
Nam Sung Kim},
title = {Energy-Efficient Approximate Multiplication for Digital Signal Processing
and Classification Applications},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {23},
number = {6},
pages = {1180--1184},
year = {2015},
url = {https://doi.org/10.1109/TVLSI.2014.2333366},
doi = {10.1109/TVLSI.2014.2333366},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Narayanamoorthy15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YazdanbakhshPDK15,
author = {Amir Yazdanbakhsh and
David J. Palframan and
Azadeh Davoodi and
Nam Sung Kim and
Mikko H. Lipasti},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Online and Operand-Aware Detection of Failures Utilizing False Alarm
Vectors},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {149--154},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742097},
doi = {10.1145/2742060.2742097},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YazdanbakhshPDK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/FarahaniAMK15,
author = {Amin Farmahini Farahani and
Jung Ho Ahn and
Katherine Morrow and
Nam Sung Kim},
title = {{NDA:} Near-DRAM acceleration architecture leveraging commodity {DRAM}
devices and standard memory modules},
booktitle = {21st {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
pages = {283--295},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HPCA.2015.7056040},
doi = {10.1109/HPCA.2015.7056040},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/FarahaniAMK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WangPBAK15,
author = {Hao Wang and
Chang{-}Jae Park and
Gyungsu Byun and
Jung Ho Ahn and
Nam Sung Kim},
title = {Alloy: Parallel-serial memory channel architecture for single-chip
heterogeneous processor systems},
booktitle = {21st {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
pages = {296--308},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HPCA.2015.7056041},
doi = {10.1109/HPCA.2015.7056041},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/WangPBAK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/PalframanKL15,
author = {David J. Palframan and
Nam Sung Kim and
Mikko H. Lipasti},
title = {iPatch: Intelligent fault patching to improve energy efficiency},
booktitle = {21st {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
pages = {428--438},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HPCA.2015.7056052},
doi = {10.1109/HPCA.2015.7056052},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/PalframanKL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SonLSKKA15,
author = {Young Hoon Son and
Sukhan Lee and
Seongil O and
Sanghyuk Kwon and
Nam Sung Kim and
Jung Ho Ahn},
title = {CiDRA: {A} cache-inspired {DRAM} resilience architecture},
booktitle = {21st {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
pages = {502--513},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HPCA.2015.7056058},
doi = {10.1109/HPCA.2015.7056058},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SonLSKKA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GhasemiKK15,
author = {Hamid Reza Ghasemi and
Ulya R. Karpuzcu and
Nam Sung Kim},
title = {Comparison of single-ISA heterogeneous versus wide dynamic range processors
for mobile applications},
booktitle = {33rd {IEEE} International Conference on Computer Design, {ICCD} 2015,
New York City, NY, USA, October 18-21, 2015},
pages = {304--310},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICCD.2015.7357118},
doi = {10.1109/ICCD.2015.7357118},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GhasemiKK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PalframanKL15,
author = {David J. Palframan and
Nam Sung Kim and
Mikko H. Lipasti},
editor = {Deborah T. Marr and
David H. Albonesi},
title = {{COP:} to compress and protect main memory},
booktitle = {Proceedings of the 42nd Annual International Symposium on Computer
Architecture, Portland, OR, USA, June 13-17, 2015},
pages = {682--693},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2749469.2750377},
doi = {10.1145/2749469.2750377},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/PalframanKL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/JeonRKA15,
author = {Hyeran Jeon and
Gokul Subramanian Ravi and
Nam Sung Kim and
Murali Annavaram},
editor = {Milos Prvulovic},
title = {{GPU} register file virtualization},
booktitle = {Proceedings of the 48th International Symposium on Microarchitecture,
{MICRO} 2015, Waikiki, HI, USA, December 5-9, 2015},
pages = {420--432},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2830772.2830784},
doi = {10.1145/2830772.2830784},
timestamp = {Sun, 17 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/JeonRKA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KimKKH15,
author = {Daehoon Kim and
Hwanju Kim and
Nam Sung Kim and
Jaehyuk Huh},
editor = {Milos Prvulovic},
title = {vCache: architectural support for transparent and isolated virtual
LLCs in virtualized environments},
booktitle = {Proceedings of the 48th International Symposium on Microarchitecture,
{MICRO} 2015, Waikiki, HI, USA, December 5-9, 2015},
pages = {623--634},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2830772.2830825},
doi = {10.1145/2830772.2830825},
timestamp = {Thu, 02 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/KimKKH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/usenix/PanneerselvamSK15,
author = {Sankaralingam Panneerselvam and
Michael M. Swift and
Nam Sung Kim},
editor = {Shan Lu and
Erik Riedel},
title = {Bolt: Faster Reconfiguration in Operating Systems},
booktitle = {Proceedings of the 2015 {USENIX} Annual Technical Conference, {USENIX}
{ATC} 2015, July 8-10, Santa Clara, CA, {USA}},
pages = {511--516},
publisher = {{USENIX} Association},
year = {2015},
url = {https://www.usenix.org/conference/atc15/technical-session/presentation/panneerselvam},
timestamp = {Tue, 16 Jul 2024 09:12:32 +0200},
biburl = {https://dblp.org/rec/conf/usenix/PanneerselvamSK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/GilaniPK14,
author = {Syed Zohaib Gilani and
Taejoon Park and
Nam Sung Kim},
title = {Low-cost scratchpad memory organizations using heterogeneous cell
sizes for low-voltage operations},
journal = {Microprocess. Microsystems},
volume = {38},
number = {7},
pages = {707--716},
year = {2014},
url = {https://doi.org/10.1016/j.micpro.2014.06.002},
doi = {10.1016/J.MICPRO.2014.06.002},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/GilaniPK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/AhnKMPS14,
author = {DaeHan Ahn and
Nam Sung Kim and
Sang Jun Moon and
Taejoon Park and
Sang Hyuk Son},
title = {Optimization of a Cell Counting Algorithm for Mobile Point-of-Care
Testing Platforms},
journal = {Sensors},
volume = {14},
number = {8},
pages = {15244--15261},
year = {2014},
url = {https://doi.org/10.3390/s140815244},
doi = {10.3390/S140815244},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/sensors/AhnKMPS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/GilaniKS14,
author = {Syed Zohaib Gilani and
Nam Sung Kim and
Michael J. Schulte},
title = {Energy-Efficient Pixel-Arithmetic},
journal = {{IEEE} Trans. Computers},
volume = {63},
number = {8},
pages = {1882--1894},
year = {2014},
url = {https://doi.org/10.1109/TC.2014.2325827},
doi = {10.1109/TC.2014.2325827},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/GilaniKS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SinkarGSKK14,
author = {Abhishek A. Sinkar and
Hamid Reza Ghasemi and
Michael J. Schulte and
Ulya R. Karpuzcu and
Nam Sung Kim},
title = {Low-Cost Per-Core Voltage Domain Support for Power-Constrained High-Performance
Processors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {22},
number = {4},
pages = {747--758},
year = {2014},
url = {https://doi.org/10.1109/TVLSI.2013.2257900},
doi = {10.1109/TVLSI.2013.2257900},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/SinkarGSKK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/GhasemiK14,
author = {Hamid Reza Ghasemi and
Nam Sung Kim},
editor = {Jos{\'{e}} Nelson Amaral and
Josep Torrellas},
title = {{RCS:} runtime resource and core scaling for power-constrained multi-core
processors},
booktitle = {International Conference on Parallel Architectures and Compilation,
{PACT} '14, Edmonton, AB, Canada, August 24-27, 2014},
pages = {251--262},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2628071.2628095},
doi = {10.1145/2628071.2628095},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/GhasemiK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/WangSSK14,
author = {Hao Wang and
Ripudaman Singh and
Michael J. Schulte and
Nam Sung Kim},
editor = {Jos{\'{e}} Nelson Amaral and
Josep Torrellas},
title = {Memory scheduling towards high-throughput cooperative heterogeneous
computing},
booktitle = {International Conference on Parallel Architectures and Compilation,
{PACT} '14, Edmonton, AB, Canada, August 24-27, 2014},
pages = {331--342},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2628071.2628096},
doi = {10.1145/2628071.2628096},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/WangSSK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/AguileraMK14,
author = {Paula Aguilera and
Katherine Morrow and
Nam Sung Kim},
title = {QoS-aware dynamic resource allocation for spatial-multitasking GPUs},
booktitle = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2014, Singapore, January 20-23, 2014},
pages = {726--731},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ASPDAC.2014.6742976},
doi = {10.1109/ASPDAC.2014.6742976},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/AguileraMK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AguileraLFMSK14,
author = {Paula Aguilera and
Jungseob Lee and
Amin Farmahini Farahani and
Katherine Morrow and
Michael J. Schulte and
Nam Sung Kim},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Process variation-aware workload partitioning algorithms for GPUs
supporting spatial-multitasking},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--6},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.189},
doi = {10.7873/DATE.2014.189},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/AguileraLFMSK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/PalframanKL14,
author = {David J. Palframan and
Nam Sung Kim and
Mikko H. Lipasti},
title = {Precision-aware soft error protection for GPUs},
booktitle = {20th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2014, Orlando, FL, USA, February 15-19, 2014},
pages = {49--59},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/HPCA.2014.6835966},
doi = {10.1109/HPCA.2014.6835966},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/PalframanKL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KarpuzcuAK14,
author = {Ulya R. Karpuzcu and
Ismail Akturk and
Nam Sung Kim},
title = {Accordion: Toward soft Near-Threshold Voltage Computing},
booktitle = {20th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2014, Orlando, FL, USA, February 15-19, 2014},
pages = {72--83},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/HPCA.2014.6835977},
doi = {10.1109/HPCA.2014.6835977},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KarpuzcuAK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AguileraMK14,
author = {Paula Aguilera and
Katherine Morrow and
Nam Sung Kim},
title = {Fair share: Allocation of {GPU} resources for both performance and
fairness},
booktitle = {32nd {IEEE} International Conference on Computer Design, {ICCD} 2014,
Seoul, South Korea, October 19-22, 2014},
pages = {440--447},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ICCD.2014.6974717},
doi = {10.1109/ICCD.2014.6974717},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AguileraMK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LiuDK14,
author = {Yanpei Liu and
Stark C. Draper and
Nam Sung Kim},
title = {SleepScale: Runtime joint speed scaling and sleep states management
for power efficient data centers},
booktitle = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
{ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
pages = {313--324},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISCA.2014.6853235},
doi = {10.1109/ISCA.2014.6853235},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/LiuDK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/OSKA14,
author = {Seongil O and
Young Hoon Son and
Nam Sung Kim and
Jung Ho Ahn},
title = {Row-buffer decoupling: {A} case for low-latency {DRAM} microarchitecture},
booktitle = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
{ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
pages = {337--348},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISCA.2014.6853230},
doi = {10.1109/ISCA.2014.6853230},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/OSKA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimRSK14,
author = {Hoyoung Kim and
Soojung Ryu and
Abhishek A. Sinkar and
Nam Sung Kim},
title = {Quantitative comparison of the power reduction techniques for samsung
reconfigurable processor},
booktitle = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
Melbourne, Victoria, Australia, June 1-5, 2014},
pages = {1736--1739},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISCAS.2014.6865490},
doi = {10.1109/ISCAS.2014.6865490},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KimRSK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/FarahaniKM14,
author = {Amin Farmahini Farahani and
Nam Sung Kim and
Katherine Morrow},
title = {Energy-efficient reconfigurable cache architectures for accelerator-enabled
embedded systems},
booktitle = {2014 {IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2014, Monterey, CA, USA, March 23-25, 2014},
pages = {211--220},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISPASS.2014.6844485},
doi = {10.1109/ISPASS.2014.6844485},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/FarahaniKM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SinkarWK14,
author = {Abhishek A. Sinkar and
Hao Wang and
Nam Sung Kim},
title = {Maximizing throughput of power/thermal-constrained processors by balancing
power consumption of cores},
booktitle = {Fifteenth International Symposium on Quality Electronic Design, {ISQED}
2014, Santa Clara, CA, USA, March 3-5, 2014},
pages = {633--638},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISQED.2014.6783386},
doi = {10.1109/ISQED.2014.6783386},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/SinkarWK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/LiuDK14,
author = {Yanpei Liu and
Stark C. Draper and
Nam Sung Kim},
title = {SleepScale: Runtime Joint Speed Scaling and Sleep States Management
for Power Efficient Data Centers},
journal = {CoRR},
volume = {abs/1404.5121},
year = {2014},
url = {http://arxiv.org/abs/1404.5121},
eprinttype = {arXiv},
eprint = {1404.5121},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/LiuDK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/KarpuzcuKT13,
author = {Ulya R. Karpuzcu and
Nam Sung Kim and
Josep Torrellas},
title = {Coping with Parametric Variation at Near-Threshold Voltages},
journal = {{IEEE} Micro},
volume = {33},
number = {4},
pages = {6--14},
year = {2013},
url = {https://doi.org/10.1109/MM.2013.71},
doi = {10.1109/MM.2013.71},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/KarpuzcuKT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/WangK13,
author = {Hao Wang and
Nam Sung Kim},
title = {Improving Throughput of Power-Constrained Many-Core Processors Based
on Unreliable Devices},
journal = {{IEEE} Micro},
volume = {33},
number = {4},
pages = {16--24},
year = {2013},
url = {https://doi.org/10.1109/MM.2013.69},
doi = {10.1109/MM.2013.69},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/WangK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/PalframanKL13,
author = {David J. Palframan and
Nam Sung Kim and
Mikko H. Lipasti},
title = {Resilient High-Performance Processors with Spare RIBs},
journal = {{IEEE} Micro},
volume = {33},
number = {4},
pages = {26--34},
year = {2013},
url = {https://doi.org/10.1109/MM.2013.72},
doi = {10.1109/MM.2013.72},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/PalframanKL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SinkarPK13,
author = {Abhishek A. Sinkar and
Taejoon Park and
Nam Sung Kim},
title = {Clamping Virtual Supply Voltage of Power-Gated Circuits for Active
Leakage Reduction and Gate-Oxide Reliability},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {3},
pages = {580--584},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2189422},
doi = {10.1109/TVLSI.2012.2189422},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/SinkarPK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChangBKARKS13,
author = {Daniel W. Chang and
Gyungsu Byun and
Hoyoung Kim and
Minwook Ahn and
Soojung Ryu and
Nam Sung Kim and
Michael J. Schulte},
title = {Reevaluating the latency claims of 3D stacked memories},
booktitle = {18th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2013, Yokohama, Japan, January 22-25, 2013},
pages = {657--662},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ASPDAC.2013.6509675},
doi = {10.1109/ASPDAC.2013.6509675},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ChangBKARKS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/GilaniKS13,
author = {Syed Zohaib Gilani and
Nam Sung Kim and
Michael J. Schulte},
title = {Power-efficient computing for compute-intensive {GPGPU} applications},
booktitle = {19th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2013, Shenzhen, China, February 23-27, 2013},
pages = {330--341},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/HPCA.2013.6522330},
doi = {10.1109/HPCA.2013.6522330},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/GilaniKS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KarpuzcuSKT13,
author = {Ulya R. Karpuzcu and
Abhishek A. Sinkar and
Nam Sung Kim and
Josep Torrellas},
title = {EnergySmart: Toward energy-efficient manycores for Near-Threshold
Computing},
booktitle = {19th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2013, Shenzhen, China, February 23-27, 2013},
pages = {542--553},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/HPCA.2013.6522348},
doi = {10.1109/HPCA.2013.6522348},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KarpuzcuSKT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/WangSK13,
author = {Hao Wang and
Abhishek A. Sinkar and
Nam Sung Kim},
editor = {J{\"{o}}rg Henkel},
title = {Improving platform energy: chip area trade-off in near-threshold computing
environment},
booktitle = {The {IEEE/ACM} International Conference on Computer-Aided Design,
ICCAD'13, San Jose, CA, USA, November 18-21, 2013},
pages = {318--325},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ICCAD.2013.6691138},
doi = {10.1109/ICCAD.2013.6691138},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iccad/WangSK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChangSAKASK13,
author = {Daniel W. Chang and
Young Hoon Son and
Jung Ho Ahn and
Hoyoung Kim and
Minwook Ahn and
Michael J. Schulte and
Nam Sung Kim},
editor = {J{\"{o}}rg Henkel},
title = {Dynamic bandwidth scaling for embedded DSPs with 3D-stacked {DRAM}
and wide I/Os},
booktitle = {The {IEEE/ACM} International Conference on Computer-Aided Design,
ICCAD'13, San Jose, CA, USA, November 18-21, 2013},
pages = {747--754},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ICCAD.2013.6691198},
doi = {10.1109/ICCAD.2013.6691198},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChangSAKASK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LengHEGKAR13,
author = {Jingwen Leng and
Tayler H. Hetherington and
Ahmed ElTantawy and
Syed Zohaib Gilani and
Nam Sung Kim and
Tor M. Aamodt and
Vijay Janapa Reddi},
editor = {Avi Mendelson},
title = {GPUWattch: enabling energy optimizations in GPGPUs},
booktitle = {The 40th Annual International Symposium on Computer Architecture,
ISCA'13, Tel-Aviv, Israel, June 23-27, 2013},
pages = {487--498},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2485922.2485964},
doi = {10.1145/2485922.2485964},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/LengHEGKAR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/ReddyGGKSL13,
author = {Vignyan Reddy and
Syed Zohaib Gilani and
Erika Gunadi and
Nam Sung Kim and
Michael J. Schulte and
Mikko H. Lipasti},
editor = {Pai H. Chou and
Ru Huang and
Yuan Xie and
Tanay Karnik},
title = {{REEL:} Reducing effective execution latency of floating point operations},
booktitle = {International Symposium on Low Power Electronics and Design (ISLPED),
Beijing, China, September 4-6, 2013},
pages = {187--192},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISLPED.2013.6629292},
doi = {10.1109/ISLPED.2013.6629292},
timestamp = {Thu, 06 Jun 2024 10:53:08 +0200},
biburl = {https://dblp.org/rec/conf/islped/ReddyGGKSL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/GilaniKS13,
author = {Syed Zohaib Gilani and
Nam Sung Kim and
Michael J. Schulte},
editor = {Matthew K. Farrens and
Christos Kozyrakis},
title = {Exploiting {GPU} peak-power and performance tradeoffs through reduced
effective pipeline latency},
booktitle = {The 46th Annual {IEEE/ACM} International Symposium on Microarchitecture,
MICRO-46, Davis, CA, USA, December 7-11, 2013},
pages = {74--85},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2540708.2540716},
doi = {10.1145/2540708.2540716},
timestamp = {Wed, 11 Aug 2021 11:51:26 +0200},
biburl = {https://dblp.org/rec/conf/micro/GilaniKS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1303-1561,
author = {Yanpei Liu and
Stark C. Draper and
Nam Sung Kim},
title = {Queuing Theoretic Analysis of Power-performance Tradeoff in Power-efficient
Computing},
journal = {CoRR},
volume = {abs/1303.1561},
year = {2013},
url = {http://arxiv.org/abs/1303.1561},
eprinttype = {arXiv},
eprint = {1303.1561},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1303-1561.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LeeK12,
author = {Jungseob Lee and
Nam Sung Kim},
title = {Analyzing Potential Throughput Improvement of Power- and Thermal-Constrained
Multicore Processors by Exploiting {DVFS} and {PCPG}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {2},
pages = {225--235},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2010.2092795},
doi = {10.1109/TVLSI.2010.2092795},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/LeeK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/KimSSS12,
author = {Nam Sung Kim and
Abhishek A. Sinkar and
Jun Seomun and
Youngsoo Shin},
title = {Maximizing Frequency and Yield of Power-Constrained Designs Using
Programmable Power-Gating},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {10},
pages = {1885--1890},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2011.2163533},
doi = {10.1109/TVLSI.2011.2163533},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/KimSSS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/KimDZKGP12,
author = {Nam Sung Kim and
Stark C. Draper and
Shi{-}Ting Zhou and
Sumeet Katariya and
Hamid Reza Ghasemi and
Taejoon Park},
title = {Analyzing the Impact of Joint Optimization of Cell Size, Redundancy,
and {ECC} on Low-Voltage {SRAM} Array Total Area},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {12},
pages = {2333--2337},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2011.2173220},
doi = {10.1109/TVLSI.2011.2173220},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/KimDZKGP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/SathishaSK12,
author = {Vijay Sathish and
Michael J. Schulte and
Nam Sung Kim},
editor = {Pen{-}Chung Yew and
Sangyeun Cho and
Luiz DeRose and
David J. Lilja},
title = {Lossless and lossy memory {I/O} link compression for improving performance
of {GPGPU} workloads},
booktitle = {International Conference on Parallel Architectures and Compilation
Techniques, {PACT} '12, Minneapolis, MN, {USA} - September 19 - 23,
2012},
pages = {325--334},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2370816.2370864},
doi = {10.1145/2370816.2370864},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/SathishaSK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/WangSSSK12,
author = {Hao Wang and
Vijay Sathish and
Ripudaman Singh and
Michael J. Schulte and
Nam Sung Kim},
editor = {Pen{-}Chung Yew and
Sangyeun Cho and
Luiz DeRose and
David J. Lilja},
title = {Workload and power budget partitioning for single-chip heterogeneous
processors},
booktitle = {International Conference on Parallel Architectures and Compilation
Techniques, {PACT} '12, Minneapolis, MN, {USA} - September 19 - 23,
2012},
pages = {401--410},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2370816.2370873},
doi = {10.1145/2370816.2370873},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/WangSSSK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/GilaniKS12,
author = {Syed Zohaib Gilani and
Nam Sung Kim and
Michael J. Schulte},
editor = {Pen{-}Chung Yew and
Sangyeun Cho and
Luiz DeRose and
David J. Lilja},
title = {Power-efficient computing for compute-intensive {GPGPU} applications},
booktitle = {International Conference on Parallel Architectures and Compilation
Techniques, {PACT} '12, Minneapolis, MN, {USA} - September 19 - 23,
2012},
pages = {445--446},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2370816.2370888},
doi = {10.1145/2370816.2370888},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/GilaniKS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GilaniKS12,
author = {Syed Zohaib Gilani and
Nam Sung Kim and
Michael J. Schulte},
title = {Virtual Floating-Point Units for Low-Power Embedded Processors},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {61--68},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.28},
doi = {10.1109/ASAP.2012.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GilaniKS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PedramGKGSG12,
author = {Ardavan Pedram and
Syed Zohaib Gilani and
Nam Sung Kim and
Robert A. van de Geijn and
Michael J. Schulte and
Andreas Gerstlauer},
title = {A Linear Algebra Core Design for Efficient Level-3 {BLAS}},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {149--152},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.18},
doi = {10.1109/ASAP.2012.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PedramGKGSG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/GhasemiSSK12,
author = {Hamid Reza Ghasemi and
Abhishek A. Sinkar and
Michael J. Schulte and
Nam Sung Kim},
editor = {Patrick Groeneveld and
Donatella Sciuto and
Soha Hassoun},
title = {Cost-effective power delivery to support per-core voltage domains
for power-constrained processors},
booktitle = {The 49th Annual Design Automation Conference 2012, {DAC} '12, San
Francisco, CA, USA, June 3-7, 2012},
pages = {56--61},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2228360.2228372},
doi = {10.1145/2228360.2228372},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/GhasemiSSK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SinkarWK12,
author = {Abhishek A. Sinkar and
Hao Wang and
Nam Sung Kim},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Workload-aware voltage regulator optimization for power efficient
multi-core processors},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {1134--1137},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176667},
doi = {10.1109/DATE.2012.6176667},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SinkarWK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsn/KarpuzcuKKT12,
author = {Ulya R. Karpuzcu and
Krishna B. Kolluru and
Nam Sung Kim and
Josep Torrellas},
editor = {Robert S. Swarz and
Philip Koopman and
Michel Cukier},
title = {{VARIUS-NTV:} {A} microarchitectural model to capture the increased
sensitivity of manycores to process variations at near-threshold voltages},
booktitle = {{IEEE/IFIP} International Conference on Dependable Systems and Networks,
{DSN} 2012, Boston, MA, USA, June 25-28, 2012},
pages = {1--11},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DSN.2012.6263951},
doi = {10.1109/DSN.2012.6263951},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsn/KarpuzcuKKT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsn/PalframanKL12,
author = {David J. Palframan and
Nam Sung Kim and
Mikko H. Lipasti},
editor = {Robert S. Swarz and
Philip Koopman and
Michel Cukier},
title = {Mitigating random variation with spare RIBs: Redundant intermediate
bitslices},
booktitle = {{IEEE/IFIP} International Conference on Dependable Systems and Networks,
{DSN} 2012, Boston, MA, USA, June 25-28, 2012},
pages = {1--11},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DSN.2012.6263952},
doi = {10.1109/DSN.2012.6263952},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsn/PalframanKL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AdriaensCKS12,
author = {Jacob Adriaens and
Katherine Compton and
Nam Sung Kim and
Michael J. Schulte},
title = {The case for {GPGPU} spatial multitasking},
booktitle = {18th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2012, New Orleans, LA, USA, 25-29 February, 2012},
pages = {79--90},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/HPCA.2012.6168946},
doi = {10.1109/HPCA.2012.6168946},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/AdriaensCKS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/LeeSSCK11,
author = {Jungseob Lee and
Vijay Sathish and
Michael J. Schulte and
Katherine Compton and
Nam Sung Kim},
editor = {Lawrence Rauchwerger and
Vivek Sarkar},
title = {Improving Throughput of Power-Constrained GPUs Using Dynamic Voltage/Frequency
and Core Scaling},
booktitle = {2011 International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
pages = {111--120},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/PACT.2011.17},
doi = {10.1109/PACT.2011.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/LeeSSCK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acssc/GilaniKS11,
author = {Syed Zohaib Gilani and
Nam Sung Kim and
Michael J. Schulte},
editor = {Michael B. Matthews},
title = {Energy-efficient floating-point arithmetic for digital signal processors},
booktitle = {Conference Record of the Forty Fifth Asilomar Conference on Signals,
Systems and Computers, {ACSCC} 2011, Pacific Grove, CA, USA, November
6-9, 2011},
pages = {1823--1827},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ACSSC.2011.6190337},
doi = {10.1109/ACSSC.2011.6190337},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/acssc/GilaniKS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GilaniKS11,
author = {Syed Zohaib Gilani and
Nam Sung Kim and
Michael J. Schulte},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Energy-efficient floating-point arithmetic for software-defined radio
architectures},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {122--129},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043260},
doi = {10.1109/ASAP.2011.6043260},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GilaniKS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SinkarK11,
author = {Abhishek A. Sinkar and
Nam Sung Kim},
title = {AVS-aware power-gate sizing for maximum performance and power efficiency
of power-constrained processors},
booktitle = {Proceedings of the 16th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2011, Yokohama, Japan, January 25-27, 2011},
pages = {725--730},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASPDAC.2011.5722282},
doi = {10.1109/ASPDAC.2011.5722282},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SinkarK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PalframanKL11,
author = {David J. Palframan and
Nam Sung Kim and
Mikko H. Lipasti},
title = {Time redundant parity for low-cost transient error detection},
booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
March 14-18, 2011},
pages = {52--57},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/DATE.2011.5763017},
doi = {10.1109/DATE.2011.5763017},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/PalframanKL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GilaniKS11,
author = {Syed Zohaib Gilani and
Nam Sung Kim and
Michael J. Schulte},
title = {Scratchpad memory optimizations for digital signal processing applications},
booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
March 14-18, 2011},
pages = {974--979},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/DATE.2011.5763158},
doi = {10.1109/DATE.2011.5763158},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/GilaniKS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/GhasemiDK11,
author = {Hamid Reza Ghasemi and
Stark C. Draper and
Nam Sung Kim},
title = {Low-voltage on-chip cache architecture using heterogeneous cell sizes
for high-performance processors},
booktitle = {17th International Conference on High-Performance Computer Architecture
{(HPCA-17} 2011), February 12-16 2011, San Antonio, Texas, {USA}},
pages = {38--49},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/HPCA.2011.5749715},
doi = {10.1109/HPCA.2011.5749715},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/GhasemiDK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/LeeAK11,
author = {Jungseob Lee and
Paritosh Pratap Ajgaonkar and
Nam Sung Kim},
title = {Analyzing throughput of GPGPUs exploiting within-die core-to-core
frequency variation},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2011, 10-12 April, 2011, Austin, TX, {USA}},
pages = {237--246},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ISPASS.2011.5762740},
doi = {10.1109/ISPASS.2011.5762740},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/LeeAK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/BharathYKRS11,
author = {Krishna Bharath and
Chunhua Yao and
Nam Sung Kim and
Parameswaran Ramanathan and
Kewal K. Saluja},
title = {A low cost approach to calibrate on-chip thermal sensors},
booktitle = {Proceedings of the 12th International Symposium on Quality Electronic
Design, {ISQED} 2011, Santa Clara, California, USA, 14-16 March 2011},
pages = {572--576},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISQED.2011.5770785},
doi = {10.1109/ISQED.2011.5770785},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/BharathYKRS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/ChangKS11,
author = {Daniel W. Chang and
Nam Sung Kim and
Michael J. Schulte},
editor = {Luigi Carro and
Andy D. Pimentel},
title = {Analyzing the performance and energy impact of 3D memory integration
on embedded DSPs},
booktitle = {2011 International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} XI, Samos, Greece, July 18-21, 2011},
pages = {303--310},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/SAMOS.2011.6045476},
doi = {10.1109/SAMOS.2011.6045476},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/samos/ChangKS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeeZK10,
author = {Jungseob Lee and
Shi{-}Ting Zhou and
Nam Sung Kim},
title = {Analyzing impact of multiple {ABB} and {AVS} domains on throughput
of power and thermal-constrained multi-core processors},
booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
pages = {229--234},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ASPDAC.2010.5419889},
doi = {10.1109/ASPDAC.2010.5419889},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LeeZK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/OhKCDH10,
author = {Dongkeun Oh and
Nam Sung Kim and
Charlie Chung{-}Ping Chen and
Azadeh Davoodi and
Yu Hen Hu},
title = {Runtime temperature-based power estimation for optimizing throughput
of thermal-constrained multi-core processors},
booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
pages = {593--599},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ASPDAC.2010.5419815},
doi = {10.1109/ASPDAC.2010.5419815},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/OhKCDH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ParkLKK10,
author = {Danbee Park and
Jungseob Lee and
Nam Sung Kim and
Taewhan Kim},
editor = {Louis Scheffer and
Joel R. Phillips and
Alan J. Hu},
title = {Optimal algorithm for profile-based power gating: {A} compiler technique
for reducing leakage on execution units in microprocessors},
booktitle = {2010 International Conference on Computer-Aided Design, {ICCAD} 2010,
San Jose, CA, USA, November 7-11, 2010},
pages = {361--364},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICCAD.2010.5653652},
doi = {10.1109/ICCAD.2010.5653652},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ParkLKK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ZhouKGDK10,
author = {Shi{-}Ting Zhou and
Sumeet Katariya and
Hamid Reza Ghasemi and
Stark C. Draper and
Nam Sung Kim},
title = {Minimizing total area of low-voltage {SRAM} arrays through joint optimization
of cell size, redundancy, and {ECC}},
booktitle = {28th International Conference on Computer Design, {ICCD} 2010, 3-6
October 2010, Amsterdam, The Netherlands, Proceedings},
pages = {112--117},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ICCD.2010.5647605},
doi = {10.1109/ICCD.2010.5647605},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ZhouKGDK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/LeeWGBCK10,
author = {Jungseob Lee and
Chi{-}Chao Wang and
Hamid Reza Ghasemi and
Lloyd Bircher and
Yu Cao and
Nam Sung Kim},
editor = {Vojin G. Oklobdzija and
Barry Pangle and
Naehyuck Chang and
Naresh R. Shanbhag and
Chris H. Kim},
title = {Workload-adaptive process tuning strategy for power-efficient multi-core
processors},
booktitle = {Proceedings of the 2010 International Symposium on Low Power Electronics
and Design, 2010, Austin, Texas, USA, August 18-20, 2010},
pages = {225--230},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1840845.1840889},
doi = {10.1145/1840845.1840889},
timestamp = {Thu, 15 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/LeeWGBCK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SinkarK10,
author = {Abhishek A. Sinkar and
Nam Sung Kim},
title = {Analyzing and minimizing effects of temperature variation and {NBTI}
on active leakage power of power-gated circuits},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {791--796},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450491},
doi = {10.1109/ISQED.2010.5450491},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/SinkarK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/OhCKH10,
author = {Dongkeun Oh and
Charlie Chung{-}Ping Chen and
Nam Sung Kim and
Yu Hen Hu},
title = {The compatibility analysis of thread migration and {DVFS} in multi-core
processor},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {866--871},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450478},
doi = {10.1109/ISQED.2010.5450478},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/OhCKH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/GunadiSKL10,
author = {Erika Gunadi and
Abhishek A. Sinkar and
Nam Sung Kim and
Mikko H. Lipasti},
title = {Combating Aging with the Colt Duty Cycle Equalizer},
booktitle = {43rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2010, 4-8 December 2010, Atlanta, Georgia, {USA}},
pages = {103--114},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/MICRO.2010.37},
doi = {10.1109/MICRO.2010.37},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/GunadiSKL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LeeK09,
author = {Jungseob Lee and
Nam Sung Kim},
title = {Optimizing throughput of power- and thermal-constrained multicore
processors using {DVFS} and per-core power-gating},
booktitle = {Proceedings of the 46th Design Automation Conference, {DAC} 2009,
San Francisco, CA, USA, July 26-31, 2009},
pages = {47--50},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629911.1629926},
doi = {10.1145/1629911.1629926},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/LeeK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/AndersonDLSK09,
author = {Michael J. Anderson and
Azadeh Davoodi and
Jungseob Lee and
Abhishek A. Sinkar and
Nam Sung Kim},
editor = {J{\"{o}}rg Henkel and
Ali Keshavarzi and
Naehyuck Chang and
Tahir Ghani},
title = {Statistical static timing analysis considering leakage variability
in power gated designs},
booktitle = {Proceedings of the 2009 International Symposium on Low Power Electronics
and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009},
pages = {57--62},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1594233.1594247},
doi = {10.1145/1594233.1594247},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/AndersonDLSK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/KimSSLHCS09,
author = {Nam Sung Kim and
Jun Seomun and
Abhishek A. Sinkar and
Jungseob Lee and
Tae Hee Han and
Ken Choi and
Youngsoo Shin},
editor = {J{\"{o}}rg Henkel and
Ali Keshavarzi and
Naehyuck Chang and
Tahir Ghani},
title = {Frequency and yield optimization using power gates in power-constrained
designs},
booktitle = {Proceedings of the 2009 International Symposium on Low Power Electronics
and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009},
pages = {121--126},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1594233.1594263},
doi = {10.1145/1594233.1594263},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/KimSSLHCS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/SinkarK09,
author = {Abhishek A. Sinkar and
Nam Sung Kim},
editor = {J{\"{o}}rg Henkel and
Ali Keshavarzi and
Naehyuck Chang and
Tahir Ghani},
title = {Analyzing potential power reduction with adaptive voltage positioning
optimized for multicore processors},
booktitle = {Proceedings of the 2009 International Symposium on Low Power Electronics
and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009},
pages = {189--194},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1594233.1594281},
doi = {10.1145/1594233.1594281},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/SinkarK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/LeeK09,
author = {Jungseob Lee and
Nam Sung Kim},
editor = {J{\"{o}}rg Henkel and
Ali Keshavarzi and
Naehyuck Chang and
Tahir Ghani},
title = {Optimizing total power of many-core processors considering voltage
scaling limit and process variations},
booktitle = {Proceedings of the 2009 International Symposium on Low Power Electronics
and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009},
pages = {201--206},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1594233.1594283},
doi = {10.1145/1594233.1594283},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/LeeK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/RobertsKM08,
author = {David Roberts and
Nam Sung Kim and
Trevor N. Mudge},
title = {On-chip cache device scaling limits and effective fault repair techniques
in future nanoscale technology},
journal = {Microprocess. Microsystems},
volume = {32},
number = {5-6},
pages = {244--253},
year = {2008},
url = {https://doi.org/10.1016/j.micpro.2008.03.012},
doi = {10.1016/J.MICPRO.2008.03.012},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/RobertsKM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/RobertsKM07,
author = {David Roberts and
Nam Sung Kim and
Trevor N. Mudge},
title = {On-Chip Cache Device Scaling Limits and Effective Fault Repair Techniques
in Future Nanoscale Technology},
booktitle = {Tenth Euromicro Conference on Digital System Design: Architectures,
Methods and Tools {(DSD} 2007), 29-31 August 2007, L{\"{u}}beck,
Germany},
pages = {570--578},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DSD.2007.4341526},
doi = {10.1109/DSD.2007.4341526},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/dsd/RobertsKM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChenBMSK07,
author = {Gregory K. Chen and
David T. Blaauw and
Trevor N. Mudge and
Dennis Sylvester and
Nam Sung Kim},
editor = {Georges G. E. Gielen},
title = {Yield-driven near-threshold {SRAM} design},
booktitle = {2007 International Conference on Computer-Aided Design, {ICCAD} 2007,
San Jose, CA, USA, November 5-8, 2007},
pages = {660--666},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICCAD.2007.4397341},
doi = {10.1109/ICCAD.2007.4397341},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChenBMSK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-0710-4794,
author = {Robert Bai and
Nam Sung Kim and
Taeho Kgil and
Dennis Sylvester and
Trevor N. Mudge},
title = {Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches
Considering Total Leakage},
journal = {CoRR},
volume = {abs/0710.4794},
year = {2007},
url = {http://arxiv.org/abs/0710.4794},
eprinttype = {arXiv},
eprint = {0710.4794},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-0710-4794.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/KimBM05,
author = {Nam Sung Kim and
David T. Blaauw and
Trevor N. Mudge},
title = {Quantitative analysis and optimization techniques for on-chip cache
leakage power},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {13},
number = {10},
pages = {1147--1156},
year = {2005},
url = {https://doi.org/10.1109/TVLSI.2005.859476},
doi = {10.1109/TVLSI.2005.859476},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/KimBM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BaiKKSM05,
author = {Robert Bai and
Nam Sung Kim and
Taeho Kgil and
Dennis Sylvester and
Trevor N. Mudge},
title = {Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches
Considering Total Leakage},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {650--651},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.243},
doi = {10.1109/DATE.2005.243},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/BaiKKSM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BaiKSM05,
author = {Robert Bai and
Nam Sung Kim and
Dennis Sylvester and
Trevor N. Mudge},
editor = {John C. Lach and
Gang Qu and
Yehea I. Ismail},
title = {Total leakage optimization strategies for multi-level caches},
booktitle = {Proceedings of the 15th {ACM} Great Lakes Symposium on {VLSI} 2005,
Chicago, Illinois, USA, April 17-19, 2005},
pages = {381--384},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1057661.1057752},
doi = {10.1145/1057661.1057752},
timestamp = {Wed, 15 Dec 2021 17:59:57 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BaiKSM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/ErnstDLBAMKF04,
author = {Dan Ernst and
Shidhartha Das and
Seokwoo Lee and
David T. Blaauw and
Todd M. Austin and
Trevor N. Mudge and
Nam Sung Kim and
Kriszti{\'{a}}n Flautner},
title = {Razor: Circuit-Level Correction of Timing Errors for Low-Power Operation},
journal = {{IEEE} Micro},
volume = {24},
number = {6},
pages = {10--20},
year = {2004},
url = {https://doi.org/10.1109/MM.2004.85},
doi = {10.1109/MM.2004.85},
timestamp = {Tue, 31 Jul 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/ErnstDLBAMKF04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/KimFBM04,
author = {Nam Sung Kim and
Kriszti{\'{a}}n Flautner and
David T. Blaauw and
Trevor N. Mudge},
title = {Circuit and microarchitectural techniques for reducing cache leakage
power},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {2},
pages = {167--184},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2003.821550},
doi = {10.1109/TVLSI.2003.821550},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/KimFBM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/KimKBAM04,
author = {Nam Sung Kim and
Taeho Kgil and
Valeria Bertacco and
Todd M. Austin and
Trevor N. Mudge},
editor = {Rajiv V. Joshi and
Kiyoung Choi and
Vivek Tiwari and
Kaushik Roy},
title = {Microarchitectural power modeling techniques for deep sub-micron microprocessors},
booktitle = {Proceedings of the 2004 International Symposium on Low Power Electronics
and Design, 2004, Newport Beach, California, USA, August 9-11, 2004},
pages = {212--217},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1013235.1013290},
doi = {10.1145/1013235.1013290},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/KimKBAM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/KimABMFHIKV03,
author = {Nam Sung Kim and
Todd M. Austin and
David T. Blaauw and
Trevor N. Mudge and
Kriszti{\'{a}}n Flautner and
Jie S. Hu and
Mary Jane Irwin and
Mahmut T. Kandemir and
Narayanan Vijaykrishnan},
title = {Leakage Current: Moore's Law Meets Static Power},
journal = {Computer},
volume = {36},
number = {12},
pages = {68--75},
year = {2003},
url = {https://doi.org/10.1109/MC.2003.1250885},
doi = {10.1109/MC.2003.1250885},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/KimABMFHIKV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/KimMB03,
author = {Nam Sung Kim and
Trevor N. Mudge and
Richard B. Brown},
title = {A 2.3Gb/s fully integrated and synthesizable {AES} Rijndael core},
booktitle = {Proceedings of the {IEEE} Custom Integrated Circuits Conference, {CICC}
2003, San Jose, CA, USA, September 21 - 24, 2003},
pages = {193--196},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/CICC.2003.1249389},
doi = {10.1109/CICC.2003.1249389},
timestamp = {Mon, 15 Nov 2021 17:53:34 +0100},
biburl = {https://dblp.org/rec/conf/cicc/KimMB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/KimBM03,
author = {Nam Sung Kim and
David T. Blaauw and
Trevor N. Mudge},
title = {Leakage Power Optimization Techniques for Ultra Deep Sub-Micron Multi-Level
Caches},
booktitle = {2003 International Conference on Computer-Aided Design, {ICCAD} 2003,
San Jose, CA, USA, November 9-13, 2003},
pages = {627--632},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2003},
url = {https://doi.org/10.1109/ICCAD.2003.1257876},
doi = {10.1109/ICCAD.2003.1257876},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/KimBM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/KimM03,
author = {Nam Sung Kim and
Trevor N. Mudge},
editor = {Utpal Banerjee and
Kyle A. Gallivan and
Antonio Gonz{\'{a}}lez},
title = {Reducing register ports using delayed write-back queues and operand
pre-fetch},
booktitle = {Proceedings of the 17th Annual International Conference on Supercomputing,
{ICS} 2003, San Francisco, CA, USA, June 23-26, 2003},
pages = {172--182},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/782814.782839},
doi = {10.1145/782814.782839},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/KimM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/KimM03,
author = {Nam Sung Kim and
Trevor N. Mudge},
editor = {Ingrid Verbauwhede and
Hyung Roh},
title = {The microarchitecture of a low power register file},
booktitle = {Proceedings of the 2003 International Symposium on Low Power Electronics
and Design, 2003, Seoul, Korea, August 25-27, 2003},
pages = {384--389},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/871506.871602},
doi = {10.1145/871506.871602},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/KimM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ErnstKDPRPZBAFM03,
author = {Dan Ernst and
Nam Sung Kim and
Shidhartha Das and
Sanjay Pant and
Rajeev R. Rao and
Toan Pham and
Conrad H. Ziesler and
David T. Blaauw and
Todd M. Austin and
Kriszti{\'{a}}n Flautner and
Trevor N. Mudge},
title = {Razor: {A} Low-Power Pipeline Based on Circuit-Level Timing Speculation},
booktitle = {Proceedings of the 36th Annual International Symposium on Microarchitecture,
San Diego, CA, USA, December 3-5, 2003},
pages = {7--18},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/MICRO.2003.1253179},
doi = {10.1109/MICRO.2003.1253179},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/ErnstKDPRPZBAFM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FlautnerKMBM02,
author = {Kriszti{\'{a}}n Flautner and
Nam Sung Kim and
Steven M. Martin and
David T. Blaauw and
Trevor N. Mudge},
editor = {Yale N. Patt and
Dirk Grunwald and
Kevin Skadron},
title = {Drowsy Caches: Simple Techniques for Reducing Leakage Power},
booktitle = {29th International Symposium on Computer Architecture {(ISCA} 2002),
25-29 May 2002, Anchorage, AK, {USA}},
pages = {148--157},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ISCA.2002.1003572},
doi = {10.1109/ISCA.2002.1003572},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/FlautnerKMBM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KimFBM02,
author = {Nam Sung Kim and
Kriszti{\'{a}}n Flautner and
David T. Blaauw and
Trevor N. Mudge},
editor = {Erik R. Altman and
Kemal Ebcioglu and
Scott A. Mahlke and
B. Ramakrishna Rau and
Sanjay J. Patel},
title = {Drowsy instruction caches: leakage power reduction using dynamic voltage
scaling and cache sub-bank prediction},
booktitle = {Proceedings of the 35th Annual International Symposium on Microarchitecture,
Istanbul, Turkey, November 18-22, 2002},
pages = {219--230},
publisher = {{ACM/IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/MICRO.2002.1176252},
doi = {10.1109/MICRO.2002.1176252},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/KimFBM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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