BibTeX records: Chein-Wei Jen

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@inproceedings{DBLP:conf/iscas/HsiaoLLJ07,
  author       = {Pi{-}Chen Hsiao and
                  Tay{-}Jyi Lin and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  title        = {Latency-Tolerant Virtual Cluster Architecture for {VLIW} {DSP}},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
                  May 2007, New Orleans, Louisiana, {USA}},
  pages        = {3506--3509},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISCAS.2007.378438},
  doi          = {10.1109/ISCAS.2007.378438},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiaoLLJ07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/OuLHKCLJ06,
  author       = {Shih{-}Hao Ou and
                  Tay{-}Jyi Lin and
                  Chao{-}Wei Huang and
                  Yu{-}Ting Kuo and
                  Chie{-}Min Chao and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  editor       = {Fumiyasu Hirose},
  title        = {A 52mW 1200MIPS compact {DSP} for multi-core media SoC},
  booktitle    = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation:
                  {ASP-DAC} 2006, Yokohama, Japan, January 24-27, 2006},
  pages        = {118--119},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ASPDAC.2006.1594665},
  doi          = {10.1109/ASPDAC.2006.1594665},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/OuLHKCLJ06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icmcs/ChangLLCTJ06,
  author       = {David Chih{-}Wei Chang and
                  I{-}Tao Liao and
                  Jenq Kuen Lee and
                  Wen{-}Feng Chen and
                  Shau{-}Yin Tseng and
                  Chein{-}Wei Jen},
  title        = {{PAC} {DSP} Core and Application Processors},
  booktitle    = {Proceedings of the 2006 {IEEE} International Conference on Multimedia
                  and Expo, {ICME} 2006, July 9-12 2006, Toronto, Ontario, Canada},
  pages        = {289--292},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/ICME.2006.262455},
  doi          = {10.1109/ICME.2006.262455},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icmcs/ChangLLCTJ06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/KuoLCLJ06,
  author       = {Yu{-}Ting Kuo and
                  Tay{-}Jyi Lin and
                  Yi Cho and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  title        = {Programmable {FIR} filter with adder-based computing engine},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
                  May 2006, Island of Kos, Greece},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISCAS.2006.1692945},
  doi          = {10.1109/ISCAS.2006.1692945},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KuoLCLJ06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieicet/ChenCGJ05,
  author       = {Hun{-}Chen Chen and
                  Tian{-}Sheuan Chang and
                  Jiun{-}In Guo and
                  Chein{-}Wei Jen},
  title        = {The Long Length {DHT} Design with a New Hardware Efficient Distributed
                  Arithmetic Approach and Cyclic Preserving Partitioning},
  journal      = {{IEICE} Trans. Electron.},
  volume       = {88-C},
  number       = {5},
  pages        = {1061--1069},
  year         = {2005},
  url          = {https://doi.org/10.1093/ietele/e88-c.5.1061},
  doi          = {10.1093/IETELE/E88-C.5.1061},
  timestamp    = {Sat, 11 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/ChenCGJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcsv/LeeLJ05,
  author       = {Kun{-}Bin Lee and
                  Jih{-}Yiing Lin and
                  Chein{-}Wei Jen},
  title        = {A multisymbol context-based arithmetic coding architecture for {MPEG-4}
                  shape coding},
  journal      = {{IEEE} Trans. Circuits Syst. Video Technol.},
  volume       = {15},
  number       = {2},
  pages        = {283--295},
  year         = {2005},
  url          = {https://doi.org/10.1109/TCSVT.2004.841724},
  doi          = {10.1109/TCSVT.2004.841724},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcsv/LeeLJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcsv/ChenGCJ05,
  author       = {Hun{-}Chen Chen and
                  Jiun{-}In Guo and
                  Tian{-}Sheuan Chang and
                  Chein{-}Wei Jen},
  title        = {A memory-efficient realization of cyclic convolution and its application
                  to discrete cosine transform},
  journal      = {{IEEE} Trans. Circuits Syst. Video Technol.},
  volume       = {15},
  number       = {3},
  pages        = {445--453},
  year         = {2005},
  url          = {https://doi.org/10.1109/TCSVT.2004.842608},
  doi          = {10.1109/TCSVT.2004.842608},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcsv/ChenGCJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcsv/LeeLJ05a,
  author       = {Kun{-}Bin Lee and
                  Tzu{-}Chieh Lin and
                  Chein{-}Wei Jen},
  title        = {An Efficient Quality-Aware Memory Controller for Multimedia Platform
                  SoC},
  journal      = {{IEEE} Trans. Circuits Syst. Video Technol.},
  volume       = {15},
  number       = {5},
  pages        = {620--633},
  year         = {2005},
  url          = {https://doi.org/10.1109/TCSVT.2005.846412},
  doi          = {10.1109/TCSVT.2005.846412},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcsv/LeeLJ05a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/LinCLHCLLJ05,
  author       = {Tay{-}Jyi Lin and
                  Chie{-}Min Chao and
                  Chia{-}Hsien Liu and
                  Pi{-}Chen Hsiao and
                  Shin{-}Kai Chen and
                  Li{-}Chun Lin and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  editor       = {John C. Lach and
                  Gang Qu and
                  Yehea I. Ismail},
  title        = {A unified processor architecture for {RISC} {\&} {VLIW} {DSP}},
  booktitle    = {Proceedings of the 15th {ACM} Great Lakes Symposium on {VLSI} 2005,
                  Chicago, Illinois, USA, April 17-19, 2005},
  pages        = {50--55},
  publisher    = {{ACM}},
  year         = {2005},
  url          = {https://doi.org/10.1145/1057661.1057675},
  doi          = {10.1145/1057661.1057675},
  timestamp    = {Wed, 15 Dec 2021 17:59:57 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/LinCLHCLLJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icmcs/KuoLLJ05,
  author       = {Yu{-}Ting Kuo and
                  Tay{-}Jyi Lin and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  title        = {Architecture for area-efficient 2-D transform in {H.264/AVC}},
  booktitle    = {Proceedings of the 2005 {IEEE} International Conference on Multimedia
                  and Expo, {ICME} 2005, July 6-9, 2005, Amsterdam, The Netherlands},
  pages        = {1126--1129},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/ICME.2005.1521624},
  doi          = {10.1109/ICME.2005.1521624},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icmcs/KuoLLJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/HuangLOLJ05,
  author       = {Wei{-}Sheng Huang and
                  Tay{-}Jyi Lin and
                  Shih{-}Hao Ou and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  title        = {Pipelining technique for energy-aware datapaths},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {1218--1221},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1464813},
  doi          = {10.1109/ISCAS.2005.1464813},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HuangLOLJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LiuLCHLCHLJ05,
  author       = {Chia{-}Hsien Liu and
                  Tay{-}Jyi Lin and
                  Chie{-}Min Chao and
                  Pi{-}Chen Hsiao and
                  Li{-}Chun Lin and
                  Shin{-}Kai Chen and
                  Chao{-}Wei Huang and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  title        = {Hierarchical instruction encoding for {VLIW} digital signal processors},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {3503--3506},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1465384},
  doi          = {10.1109/ISCAS.2005.1465384},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LiuLCHLCHLJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tce/LeeCCHJ04,
  author       = {Kun{-}Bin Lee and
                  Hao{-}Yun Chin and
                  Nelson Yen{-}Chung Chang and
                  Hui{-}Cheng Hsu and
                  Chein{-}Wei Jen},
  title        = {Optimal frame memory and data transfer scheme for {MPEG-4} shape coding},
  journal      = {{IEEE} Trans. Consumer Electron.},
  volume       = {50},
  number       = {1},
  pages        = {342--348},
  year         = {2004},
  url          = {https://doi.org/10.1109/TCE.2004.1277883},
  doi          = {10.1109/TCE.2004.1277883},
  timestamp    = {Thu, 09 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tce/LeeCCHJ04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/LeeCCHJ04,
  author       = {Kun{-}Bin Lee and
                  Nelson Yen{-}Chung Chang and
                  Hao{-}Yun Chin and
                  Hui{-}Cheng Hsu and
                  Chein{-}Wei Jen},
  editor       = {Masaharu Imai},
  title        = {A bandwidth and memory efficient {MPEG-4} shape encoder},
  booktitle    = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
                  Electronic Design and Solution Fair 2004, Yokohama, Japan, January
                  27-30, 2004},
  pages        = {525--526},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.5},
  doi          = {10.1109/ASPDAC.2004.5},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/LeeCCHJ04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/LinLCLJ04,
  author       = {Tay{-}Jyi Lin and
                  Hung{-}Yueh Lin and
                  Chie{-}Min Chao and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  editor       = {David Garrett and
                  John C. Lach and
                  Charles A. Zukowski},
  title        = {A compact {DSP} core with static floating-point unit {\&} its
                  microcode generation},
  booktitle    = {Proceedings of the 14th {ACM} Great Lakes Symposium on {VLSI} 2004,
                  Boston, MA, USA, April 26-28, 2004},
  pages        = {57--60},
  publisher    = {{ACM}},
  year         = {2004},
  url          = {https://doi.org/10.1145/988952.988966},
  doi          = {10.1145/988952.988966},
  timestamp    = {Fri, 20 Aug 2021 16:30:37 +0200},
  biburl       = {https://dblp.org/rec/conf/glvlsi/LinLCLJ04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/ChangLJ04,
  author       = {Nelson Yen{-}Chung Chang and
                  Kun{-}Bin Lee and
                  Chein{-}Wei Jen},
  title        = {Trace-path analysis and performance estimation for multimedia application
                  in embedded system},
  booktitle    = {Proceedings of the 2004 International Symposium on Circuits and Systems,
                  {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
  pages        = {129--132},
  publisher    = {{IEEE}},
  year         = {2004},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChangLJ04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LeeCHJ04,
  author       = {Kun{-}Bin Lee and
                  Hao{-}Yun Chin and
                  Hui{-}Cheng Hsu and
                  Chein{-}Wei Jen},
  title        = {{QME:} an efficient subsampling-based block matching algorithm for
                  motion estimation},
  booktitle    = {Proceedings of the 2004 International Symposium on Circuits and Systems,
                  {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
  pages        = {305--308},
  publisher    = {{IEEE}},
  year         = {2004},
  timestamp    = {Fri, 20 May 2016 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeCHJ04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LeeLJ04,
  author       = {Kun{-}Bin Lee and
                  Jih{-}Yiing Lin and
                  Chein{-}Wei Jen},
  title        = {A fast dual symbol context-based arithmetic coding for {MPEG-4} shape
                  coding},
  booktitle    = {Proceedings of the 2004 International Symposium on Circuits and Systems,
                  {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
  pages        = {317--320},
  publisher    = {{IEEE}},
  year         = {2004},
  timestamp    = {Fri, 20 May 2016 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeLJ04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LeeHJ04,
  author       = {Kun{-}Bin Lee and
                  Hui{-}Cheng Hsu and
                  Chein{-}Wei Jen},
  title        = {A cost-effective {MPEG-4} shape-adaptive {DCT} with auto-aligned transpose
                  memory organization},
  booktitle    = {Proceedings of the 2004 International Symposium on Circuits and Systems,
                  {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
  pages        = {777--780},
  publisher    = {{IEEE}},
  year         = {2004},
  timestamp    = {Fri, 20 May 2016 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeHJ04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LinLCLLJ04,
  author       = {Hung{-}Yueh Lin and
                  Tay{-}Jyi Lin and
                  Chie{-}Min Chao and
                  Yen{-}Chin Liao and
                  Chih{-}Wei Liu and
                  Chein{-}Wei Jen},
  title        = {Static floating-point unit with implicit exponent tracking for embedded
                  {DSP}},
  booktitle    = {Proceedings of the 2004 International Symposium on Circuits and Systems,
                  {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
  pages        = {821--824},
  publisher    = {{IEEE}},
  year         = {2004},
  timestamp    = {Fri, 20 May 2016 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LinLCLLJ04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tc/YehJ03,
  author       = {Wen{-}Chang Yeh and
                  Chein{-}Wei Jen},
  title        = {Generalized Earliest-First Fast Addition Algorithm},
  journal      = {{IEEE} Trans. Computers},
  volume       = {52},
  number       = {10},
  pages        = {1233--1242},
  year         = {2003},
  url          = {https://doi.org/10.1109/TC.2003.1234522},
  doi          = {10.1109/TC.2003.1234522},
  timestamp    = {Sat, 20 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tc/YehJ03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tsp/YehJ03,
  author       = {Wen{-}Chang Yeh and
                  Chein{-}Wei Jen},
  title        = {High-speed and low-power split-radix {FFT}},
  journal      = {{IEEE} Trans. Signal Process.},
  volume       = {51},
  number       = {3},
  pages        = {864--874},
  year         = {2003},
  url          = {https://doi.org/10.1109/TSP.2002.806904},
  doi          = {10.1109/TSP.2002.806904},
  timestamp    = {Tue, 10 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tsp/YehJ03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vc/LeeJ03,
  author       = {Yuan{-}Chung Lee and
                  Chein{-}Wei Jen},
  title        = {Edge-preserving texture filtering for real-time rendering},
  journal      = {Vis. Comput.},
  volume       = {19},
  number       = {1},
  pages        = {10--22},
  year         = {2003},
  url          = {https://doi.org/10.1007/s00371-002-0169-8},
  doi          = {10.1007/S00371-002-0169-8},
  timestamp    = {Thu, 04 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vc/LeeJ03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/LinCLJ03,
  author       = {Tay{-}Jyi Lin and
                  Chin{-}Chi Chang and
                  Chen{-}Chia Lee and
                  Chein{-}Wei Jen},
  title        = {An Efficient {VLIW} {DSP} Architecture for Baseband Processing},
  booktitle    = {21st International Conference on Computer Design {(ICCD} 2003),VLSI
                  in Computers and Processors, 13-15 October 2003, San Jose, CA, USA,
                  Proceedings},
  pages        = {307--312},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/ICCD.2003.1240911},
  doi          = {10.1109/ICCD.2003.1240911},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/LinCLJ03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icmcs/LinCYCLLLJ03,
  author       = {Tay{-}Jyi Lin and
                  Chin{-}Chi Chang and
                  Tsung{-}Hsun Yang and
                  Yu{-}Ming Chang and
                  Chien{-}Hung Lin and
                  Chen{-}Chia Lee and
                  Hung{-}Yueh Lin and
                  Chein{-}Wei Jen},
  title        = {Performance evaluation of ring-structure register file in multimedia
                  applications},
  booktitle    = {Proceedings of the 2003 {IEEE} International Conference on Multimedia
                  and Expo, {ICME} 2003, 6-9 July 2003, Baltimore, MD, {USA}},
  pages        = {121--124},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/ICME.2003.1220869},
  doi          = {10.1109/ICME.2003.1220869},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icmcs/LinCYCLLLJ03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icmcs/LinYJ03,
  author       = {Tay{-}Jyi Lin and
                  Tsung{-}Hsun Yang and
                  Chein{-}Wei Jen},
  title        = {Coefficient optimization for area-effective multiplier-less {FIR}
                  filters},
  booktitle    = {Proceedings of the 2003 {IEEE} International Conference on Multimedia
                  and Expo, {ICME} 2003, 6-9 July 2003, Baltimore, MD, {USA}},
  pages        = {125--128},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/ICME.2003.1220870},
  doi          = {10.1109/ICME.2003.1220870},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icmcs/LinYJ03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/ChenGJ03,
  author       = {Hun{-}Chen Chen and
                  Jiun{-}In Guo and
                  Chein{-}Wei Jen},
  title        = {A memory efficient realization of cyclic convolution and its application
                  to discrete cosine transform},
  booktitle    = {Proceedings of the 2003 International Symposium on Circuits and Systems,
                  {ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
  pages        = {33--36},
  publisher    = {{IEEE}},
  year         = {2003},
  url          = {https://doi.org/10.1109/ISCAS.2003.1205766},
  doi          = {10.1109/ISCAS.2003.1205766},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChenGJ03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LinYJ03,
  author       = {Tay{-}Jyi Lin and
                  Tsung{-}Hsun Yang and
                  Chein{-}Wei Jen},
  title        = {Area-effective {FIR} filter design for multiplier-less implementation},
  booktitle    = {Proceedings of the 2003 International Symposium on Circuits and Systems,
                  {ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
  pages        = {173--176},
  publisher    = {{IEEE}},
  year         = {2003},
  url          = {https://doi.org/10.1109/ISCAS.2003.1206222},
  doi          = {10.1109/ISCAS.2003.1206222},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LinYJ03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcsv/TuanCJ02,
  author       = {Jen{-}Chieh Tuan and
                  Tian{-}Sheuan Chang and
                  Chein{-}Wei Jen},
  title        = {On the data reuse and memory bandwidth analysis for full-search block-matching
                  {VLSI} architecture},
  journal      = {{IEEE} Trans. Circuits Syst. Video Technol.},
  volume       = {12},
  number       = {1},
  pages        = {61--72},
  year         = {2002},
  url          = {https://doi.org/10.1109/76.981846},
  doi          = {10.1109/76.981846},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcsv/TuanCJ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tmm/LiangLYJ02,
  author       = {Bor{-}Sung Liang and
                  Yuan{-}Chung Lee and
                  Wen{-}Chang Yeh and
                  Chein{-}Wei Jen},
  title        = {Index rendering: hardware-efficient architecture for 3-D graphics
                  in multimedia system},
  journal      = {{IEEE} Trans. Multim.},
  volume       = {4},
  number       = {3},
  pages        = {343--360},
  year         = {2002},
  url          = {https://doi.org/10.1109/TMM.2002.802008},
  doi          = {10.1109/TMM.2002.802008},
  timestamp    = {Thu, 01 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tmm/LiangLYJ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/HsiaoLLJ02,
  author       = {Yun{-}Tai Hsiao and
                  Hung{-}Der Lin and
                  Kun{-}Bin Lee and
                  Chein{-}Wei Jen},
  title        = {High-speed memory-saving architecture for the embedded block coding
                  in {JPEG2000}},
  booktitle    = {Proceedings of the 2002 International Symposium on Circuits and Systems,
                  {ISCAS} 2002, Scottsdale, Arizona, USA, May 26-29, 2002},
  pages        = {133--136},
  publisher    = {{IEEE}},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISCAS.2002.1010658},
  doi          = {10.1109/ISCAS.2002.1010658},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiaoLLJ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/ChenGJ02,
  author       = {Hun{-}Chen Chen and
                  Jiun{-}In Guo and
                  Chein{-}Wei Jen},
  title        = {A new group distributed arithmetic design for the one dimensional
                  discrete Fourier transform},
  booktitle    = {Proceedings of the 2002 International Symposium on Circuits and Systems,
                  {ISCAS} 2002, Scottsdale, Arizona, USA, May 26-29, 2002},
  pages        = {421--424},
  publisher    = {{IEEE}},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISCAS.2002.1009867},
  doi          = {10.1109/ISCAS.2002.1009867},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChenGJ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LinJ02,
  author       = {Tay{-}Jyi Lin and
                  Chein{-}Wei Jen},
  title        = {{CASCADE} - configurable and scalable {DSP} environment},
  booktitle    = {Proceedings of the 2002 International Symposium on Circuits and Systems,
                  {ISCAS} 2002, Scottsdale, Arizona, USA, May 26-29, 2002},
  pages        = {870--873},
  publisher    = {{IEEE}},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISCAS.2002.1010596},
  doi          = {10.1109/ISCAS.2002.1010596},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LinJ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vc/LeeJ01,
  author       = {Yuan{-}Chung Lee and
                  Chein{-}Wei Jen},
  title        = {Improved quadratic normal vector interpolation for realistic shading},
  journal      = {Vis. Comput.},
  volume       = {17},
  number       = {6},
  pages        = {337--352},
  year         = {2001},
  url          = {https://doi.org/10.1007/s003710100111},
  doi          = {10.1007/S003710100111},
  timestamp    = {Thu, 04 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vc/LeeJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LeeJ01,
  author       = {Yuan{-}Chung Lee and
                  Chein{-}Wei Jen},
  title        = {Arbitrarily scalable edge-preserving interpolation for 3-D graphics
                  and video resizing},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {317--320},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.921071},
  doi          = {10.1109/ISCAS.2001.921071},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LinJ01a,
  author       = {Tay{-}Jyi Lin and
                  Chein{-}Wei Jen},
  title        = {An efficient 2-D {DWT} architecture via resource cycling},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {914--917},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922387},
  doi          = {10.1109/ISCAS.2001.922387},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LinJ01a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/HsiaoWJ01,
  author       = {Ilion Yi{-}Liang Hsiao and
                  Ding{-}Hao Wang and
                  Chein{-}Wei Jen},
  title        = {Power modeling and low-power design of content addressable memories},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {926--929},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922390},
  doi          = {10.1109/ISCAS.2001.922390},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiaoWJ01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tc/YehJ00,
  author       = {Wen{-}Chang Yeh and
                  Chein{-}Wei Jen},
  title        = {High-Speed Booth Encoded Parallel Multiplier Design},
  journal      = {{IEEE} Trans. Computers},
  volume       = {49},
  number       = {7},
  pages        = {692--701},
  year         = {2000},
  url          = {https://doi.org/10.1109/12.863039},
  doi          = {10.1109/12.863039},
  timestamp    = {Sat, 20 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tc/YehJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tce/LiangJ00,
  author       = {Bor{-}Sung Liang and
                  Chein{-}Wei Jen},
  title        = {Computation-effective 3-D graphics rendering architecture for embedded
                  multimedia system},
  journal      = {{IEEE} Trans. Consumer Electron.},
  volume       = {46},
  number       = {3},
  pages        = {735--743},
  year         = {2000},
  url          = {https://doi.org/10.1109/30.883440},
  doi          = {10.1109/30.883440},
  timestamp    = {Thu, 09 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tce/LiangJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcsv/ChangKJ00,
  author       = {Tian{-}Sheuan Chang and
                  Chin{-}Sheng Kung and
                  Chein{-}Wei Jen},
  title        = {A simple processor core design for {DCT/IDCT}},
  journal      = {{IEEE} Trans. Circuits Syst. Video Technol.},
  volume       = {10},
  number       = {3},
  pages        = {439--447},
  year         = {2000},
  url          = {https://doi.org/10.1109/76.836290},
  doi          = {10.1109/76.836290},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcsv/ChangKJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/gmp/LeeJ00,
  author       = {Yuan{-}Chung Lee and
                  Chein{-}Wei Jen},
  title        = {On-Line Polygon Refining Using a Low Computation Subdivision Algorithm},
  booktitle    = {Geometric Modeling and Processing 2000, Hong Kong, China, April 10-12,
                  2000},
  pages        = {209--219},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/GMAP.2000.838253},
  doi          = {10.1109/GMAP.2000.838253},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/gmp/LeeJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/YehJ00,
  author       = {Wen{-}Chang Yeh and
                  Chein{-}Wei Jen},
  title        = {A high performance carry-save to signed-digit recoder for fused addition-multiplication},
  booktitle    = {{IEEE} International Conference on Acoustics, Speech, and Signal Processing.
                  {ICASSP} 2000, 5-9 June, 2000, Hilton Hotel and Convention Center,
                  Istanbul, Turkey},
  pages        = {3259--3262},
  publisher    = {{IEEE}},
  year         = {2000},
  url          = {https://doi.org/10.1109/ICASSP.2000.860095},
  doi          = {10.1109/ICASSP.2000.860095},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icassp/YehJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/HsiaoJ00,
  author       = {Ilion Yi{-}Liang Hsiao and
                  Chein{-}Wei Jen},
  title        = {A new hardware design and {FPGA} implementation for Internet routing
                  towards {IP} over {WDM} and terabit routers},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
                  Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
                  May 2000, Proceedings},
  pages        = {387--390},
  publisher    = {{IEEE}},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISCAS.2000.857111},
  doi          = {10.1109/ISCAS.2000.857111},
  timestamp    = {Fri, 13 Aug 2021 09:26:01 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiaoJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LiangYLJ00,
  author       = {Bor{-}Sung Liang and
                  Wen{-}Chang Yeh and
                  Yuan{-}Chung Lee and
                  Chein{-}Wei Jen},
  title        = {Deferred lighting: a computation-efficient approach for real-time
                  3-D graphics},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
                  Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
                  May 2000, Proceedings},
  pages        = {657--660},
  publisher    = {{IEEE}},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISCAS.2000.858837},
  doi          = {10.1109/ISCAS.2000.858837},
  timestamp    = {Sun, 22 Oct 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LiangYLJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/SuJ00,
  author       = {Ching{-}Long Su and
                  Chein{-}Wei Jen},
  title        = {Motion estimation using on-line arithmetic},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
                  Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
                  May 2000, Proceedings},
  pages        = {683--686},
  publisher    = {{IEEE}},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISCAS.2000.857187},
  doi          = {10.1109/ISCAS.2000.857187},
  timestamp    = {Sun, 22 Oct 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SuJ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icecsys/LeeLJ99,
  author       = {Kun{-}Bin Lee and
                  Chia{-}Hsing Lin and
                  Chein{-}Wei Jen},
  title        = {Bus buffer modeling and optimization in video processing {IP}},
  booktitle    = {6th {IEEE} International Conference on Electronics, Circuits and Systems,
                  {ICECS} 1999, Pafos, Cyprus, September 5-8, 1999},
  pages        = {1779--1782},
  publisher    = {{IEEE}},
  year         = {1999},
  url          = {https://doi.org/10.1109/ICECS.1999.814546},
  doi          = {10.1109/ICECS.1999.814546},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/icecsys/LeeLJ99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/TuanJ98,
  author       = {Jen{-}Chien Tuan and
                  Chein{-}Wei Jen},
  title        = {An Architecture of Full-Search Block Matching for Minimum Memory Bandwidth
                  Requirement},
  booktitle    = {8th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '98), 19-21 February
                  1998, Lafayette, LA, {USA}},
  pages        = {152--156},
  publisher    = {{IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/GLSV.1998.665217},
  doi          = {10.1109/GLSV.1998.665217},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/TuanJ98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/ChangJ98,
  author       = {Tian{-}Sheuan Chang and
                  Chein{-}Wei Jen},
  title        = {Low power {FIR} filter realization with differential coefficients
                  and input},
  booktitle    = {Proceedings of the 1998 {IEEE} International Conference on Acoustics,
                  Speech and Signal Processing, {ICASSP} '98, Seattle, Washington, USA,
                  May 12-15, 1998},
  pages        = {3009--3012},
  publisher    = {{IEEE}},
  year         = {1998},
  url          = {https://doi.org/10.1109/ICASSP.1998.678159},
  doi          = {10.1109/ICASSP.1998.678159},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/icassp/ChangJ98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/YehCJ96,
  author       = {Jinn{-}Wang Yeh and
                  Wen{-}Jiunn Cheng and
                  Chein{-}Wei Jen},
  title        = {{VASS} - {A} {VLSI} array system synthesizer},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {12},
  number       = {2},
  pages        = {135--158},
  year         = {1996},
  url          = {https://doi.org/10.1007/BF00924523},
  doi          = {10.1007/BF00924523},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/YehCJ96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icip/ChenJ96,
  author       = {Chih{-}Chin Chen and
                  Chein{-}Wei Jen},
  title        = {A programmable concurrent video signal processor},
  booktitle    = {Proceedings 1996 International Conference on Image Processing, Lausanne,
                  Switzerland, September 16-19, 1996},
  pages        = {1039--1042},
  publisher    = {{IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ICIP.1996.561085},
  doi          = {10.1109/ICIP.1996.561085},
  timestamp    = {Fri, 13 Aug 2021 09:26:01 +0200},
  biburl       = {https://dblp.org/rec/conf/icip/ChenJ96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcsv/ChangHJ95,
  author       = {Shifan Chang and
                  Juin{-}Haur Hwang and
                  Chein{-}Wei Jen},
  title        = {Scalable array architecture design for full search block matching},
  journal      = {{IEEE} Trans. Circuits Syst. Video Technol.},
  volume       = {5},
  number       = {4},
  pages        = {332--343},
  year         = {1995},
  url          = {https://doi.org/10.1109/76.465086},
  doi          = {10.1109/76.465086},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcsv/ChangHJ95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/spic/ChangJL94,
  author       = {Shifan Chang and
                  Chein{-}Wei Jen and
                  Charng Long Lee},
  title        = {A motion detection scheme for motion adaptive pro-scan conversion},
  journal      = {Signal Process. Image Commun.},
  volume       = {6},
  number       = {4},
  pages        = {349--356},
  year         = {1994},
  url          = {https://doi.org/10.1016/0923-5965(94)90020-5},
  doi          = {10.1016/0923-5965(94)90020-5},
  timestamp    = {Mon, 24 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/spic/ChangJL94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/GuoLJ94,
  author       = {Jiun{-}In Guo and
                  Chi{-}Min Liu and
                  Chein{-}Wei Jen},
  title        = {A novel {VLSI} array design for the discrete Hartley transform using
                  cyclic convolution},
  booktitle    = {Proceedings of {ICASSP} '94: {IEEE} International Conference on Acoustics,
                  Speech and Signal Processing, Adelaide, South Australia, Australia,
                  April 19-22, 1994},
  pages        = {501--504},
  publisher    = {{IEEE} Computer Society},
  year         = {1994},
  url          = {https://doi.org/10.1109/ICASSP.1994.389609},
  doi          = {10.1109/ICASSP.1994.389609},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icassp/GuoLJ94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/GuoLJ94,
  author       = {Jiun{-}In Guo and
                  Chi{-}Min Liu and
                  Chein{-}Wei Jen},
  title        = {A General Approach to Design {VLSI} Arrays for the Multi-dimensional
                  Discrete Hartley Transform},
  booktitle    = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  1994, London, England, UK, May 30 - June 2, 1994},
  pages        = {235--238},
  publisher    = {{IEEE}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISCAS.1994.409240},
  doi          = {10.1109/ISCAS.1994.409240},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/GuoLJ94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tsp/GuoLJ93,
  author       = {Jiun{-}In Guo and
                  Chi{-}Min Liu and
                  Chein{-}Wei Jen},
  title        = {A New Array Architecture for Prime-Length Discrete Cosine Transform},
  journal      = {{IEEE} Trans. Signal Process.},
  volume       = {41},
  number       = {1},
  pages        = {436--441},
  year         = {1993},
  url          = {https://doi.org/10.1109/TSP.1993.193173},
  doi          = {10.1109/TSP.1993.193173},
  timestamp    = {Tue, 10 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tsp/GuoLJ93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tsp/LeeJ93,
  author       = {Chamg Long Lee and
                  Chein{-}Wei Jen},
  title        = {Binary partition algorithms and {VLSI} architectures for median and
                  rank order filtering},
  journal      = {{IEEE} Trans. Signal Process.},
  volume       = {41},
  number       = {9},
  pages        = {2937--2942},
  year         = {1993},
  url          = {https://doi.org/10.1109/78.236516},
  doi          = {10.1109/78.236516},
  timestamp    = {Tue, 10 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tsp/LeeJ93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/GuoLJ93,
  author       = {Jiun{-}In Guo and
                  Chi{-}Min Liu and
                  Chein{-}Wei Jen},
  title        = {A CORDIC-based {VLSI} Array for Computing 2-D Discrete Hartley Transform},
  booktitle    = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  1993, Chicago, Illinois, USA, May 3-6, 1993},
  pages        = {1571--1574},
  publisher    = {{IEEE}},
  year         = {1993},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/GuoLJ93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LinGSJ93,
  author       = {Yu{-}Sheng Lin and
                  Jiun{-}In Guo and
                  C. Bernard Shung and
                  Chein{-}Wei Jen},
  title        = {A Multi-phase Shared Bus Structure for the Fast Fourier Transform},
  booktitle    = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  1993, Chicago, Illinois, USA, May 3-6, 1993},
  pages        = {1575--1578},
  publisher    = {{IEEE}},
  year         = {1993},
  timestamp    = {Fri, 20 May 2016 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LinGSJ93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/WangJ93,
  author       = {Jiann{-}Jenn Wang and
                  Chein{-}Wei Jen},
  title        = {A High Throughput Systolic Design for {QR} Algorithm},
  booktitle    = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  1993, Chicago, Illinois, USA, May 3-6, 1993},
  pages        = {1742--1745},
  publisher    = {{IEEE}},
  year         = {1993},
  timestamp    = {Fri, 20 May 2016 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WangJ93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jcsc/JenL92,
  author       = {Chein{-}Wei Jen and
                  Chi{-}Min Liu},
  title        = {Design of Two-Level Pipelined Systolic Array and its Application to
                  Image},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {2},
  number       = {3},
  pages        = {247--264},
  year         = {1992},
  url          = {https://doi.org/10.1142/S0218126692000167},
  doi          = {10.1142/S0218126692000167},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/JenL92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tc/JenK92,
  author       = {Chein{-}Wei Jen and
                  Ding{-}Ming Kwai},
  title        = {Data Flow Representation of Iterative Algorithms for Systolic Arrays},
  journal      = {{IEEE} Trans. Computers},
  volume       = {41},
  number       = {3},
  pages        = {351--355},
  year         = {1992},
  url          = {https://doi.org/10.1109/12.127448},
  doi          = {10.1109/12.127448},
  timestamp    = {Sat, 20 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tc/JenK92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tsp/LiuJ92,
  author       = {Chi{-}Min Liu and
                  Chein{-}Wei Jen},
  title        = {A parallel adaptive algorithm for moving target detection and its
                  {VLSI} array realization},
  journal      = {{IEEE} Trans. Signal Process.},
  volume       = {40},
  number       = {11},
  pages        = {2841--2848},
  year         = {1992},
  url          = {https://doi.org/10.1109/78.165677},
  doi          = {10.1109/78.165677},
  timestamp    = {Tue, 10 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tsp/LiuJ92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/LanWJ92,
  author       = {Chien{-}Piao Lan and
                  Shih{-}Chieh Wen and
                  Chein{-}Wei Jen},
  title        = {Efficient synthesis and high-speed implementation of look-ahead recursive
                  filters},
  booktitle    = {1992 {IEEE} International Conference on Acoustics, Speech, and Signal
                  Processing, {ICASSP} '92, San Francisco, California, USA, March 23-26,
                  1992},
  pages        = {305--308},
  publisher    = {{IEEE} Computer Society},
  year         = {1992},
  url          = {https://doi.org/10.1109/ICASSP.1992.226375},
  doi          = {10.1109/ICASSP.1992.226375},
  timestamp    = {Mon, 09 Aug 2021 14:54:02 +0200},
  biburl       = {https://dblp.org/rec/conf/icassp/LanWJ92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/GuoLJ92,
  author       = {Jiun{-}In Guo and
                  Chi{-}Min Liu and
                  Chein{-}Wei Jen},
  title        = {A memory-based approach to design and implement systolic arrays for
                  {DFT} and {DCT}},
  booktitle    = {1992 {IEEE} International Conference on Acoustics, Speech, and Signal
                  Processing, {ICASSP} '92, San Francisco, California, USA, March 23-26,
                  1992},
  pages        = {621--624},
  publisher    = {{IEEE} Computer Society},
  year         = {1992},
  url          = {https://doi.org/10.1109/ICASSP.1992.226543},
  doi          = {10.1109/ICASSP.1992.226543},
  timestamp    = {Mon, 29 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icassp/GuoLJ92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/HuangLJ91,
  author       = {Tung{-}Hao Huang and
                  Chi{-}Min Liu and
                  Chein{-}Wei Jen},
  title        = {A high-level synthesizer for {VLSI} array architectures dedicated
                  to digital signal processing},
  booktitle    = {1991 International Conference on Acoustics, Speech, and Signal Processing,
                  {ICASSP} '91, Toronto, Ontario, Canada, May 14-17, 1991},
  pages        = {1221--1224},
  publisher    = {{IEEE} Computer Society},
  year         = {1991},
  url          = {https://doi.org/10.1109/ICASSP.1991.150612},
  doi          = {10.1109/ICASSP.1991.150612},
  timestamp    = {Mon, 09 Aug 2021 14:54:02 +0200},
  biburl       = {https://dblp.org/rec/conf/icassp/HuangLJ91.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/asap/LiuJ90,
  author       = {Chi{-}Min Liu and
                  Chein{-}Wei Jen},
  title        = {Recursive algorithms for {AR} spectral estimation and their array
                  realizations},
  booktitle    = {Application Specific Array Processors, {ASAP} 1990. Proceedings of
                  the International Conference on, Princeton, NJ, USA, 5-7 Sept., 1990},
  pages        = {121--132},
  publisher    = {{IEEE}},
  year         = {1990},
  url          = {https://doi.org/10.1109/ASAP.1990.145449},
  doi          = {10.1109/ASAP.1990.145449},
  timestamp    = {Sun, 08 Aug 2021 01:40:48 +0200},
  biburl       = {https://dblp.org/rec/conf/asap/LiuJ90.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/LiuYJ90,
  author       = {Chi{-}Min Liu and
                  Bor{-}Shyong Yang and
                  Chein{-}Wei Jen},
  title        = {Parallel adaptive algorithm for moving target indicator and its {VLSI}
                  array realization},
  booktitle    = {1990 International Conference on Acoustics, Speech, and Signal Processing,
                  {ICASSP} '90, Albuquerque, New Mexico, USA, April 3-6, 1990},
  pages        = {1795--1798},
  publisher    = {{IEEE}},
  year         = {1990},
  url          = {https://doi.org/10.1109/ICASSP.1990.115837},
  doi          = {10.1109/ICASSP.1990.115837},
  timestamp    = {Mon, 09 Aug 2021 14:54:02 +0200},
  biburl       = {https://dblp.org/rec/conf/icassp/LiuYJ90.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/JenK89,
  author       = {Chein{-}Wei Jen and
                  Ding{-}Ming Kwai},
  title        = {Multi-dimensional parallel computing structures for regular iterative
                  algorithms},
  journal      = {Integr.},
  volume       = {8},
  number       = {3},
  pages        = {331--340},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90024-2},
  doi          = {10.1016/0167-9260(89)90024-2},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/JenK89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/JenL89,
  author       = {Chein{-}Wei Jen and
                  Chi{-}Min Liu},
  title        = {Two-level pipeline design for image resampling},
  booktitle    = {{IEEE} International Conference on Acoustics, Speech, and Signal Processing,
                  {ICASSP} '89, Glasgow, Scotland, May 23-26, 1989},
  pages        = {2441--2444},
  publisher    = {{IEEE}},
  year         = {1989},
  url          = {https://doi.org/10.1109/ICASSP.1989.266961},
  doi          = {10.1109/ICASSP.1989.266961},
  timestamp    = {Mon, 09 Aug 2021 14:54:02 +0200},
  biburl       = {https://dblp.org/rec/conf/icassp/JenL89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/rtss/KungCJ86,
  author       = {Sun{-}Yuan Kung and
                  Chih{-}Wei Jim Chang and
                  Chein{-}Wei Jen},
  title        = {Real-Time Configuration for Fault-Tolerant {VLSI} Array Processors},
  booktitle    = {Proceedings of the 7th {IEEE} Real-Time Systems Symposium {(RTSS}
                  '86), December 2-4, 1986, New Orleans, Louisiana, {USA}},
  pages        = {46--54},
  publisher    = {{IEEE} Computer Society},
  year         = {1986},
  timestamp    = {Wed, 23 Jan 2013 07:55:26 +0100},
  biburl       = {https://dblp.org/rec/conf/rtss/KungCJ86.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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